1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Google Evoker board device tree source 4 * 5 * Copyright 2022 Google LLC. 6 */ 7 8#include "sc7280-herobrine.dtsi" 9#include "sc7280-herobrine-audio-rt5682-3mic.dtsi" 10 11/* 12 * ADDITIONS TO FIXED REGULATORS DEFINED IN PARENT DEVICE TREE FILES 13 * 14 * Sort order matches the order in the parent files (parents before children). 15 */ 16 17&pp3300_codec { 18 status = "okay"; 19}; 20 21/* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */ 22 23ap_tp_i2c: &i2c0 { 24 status = "okay"; 25 clock-frequency = <400000>; 26 27 trackpad: trackpad@15 { 28 compatible = "elan,ekth3000"; 29 reg = <0x15>; 30 pinctrl-names = "default"; 31 pinctrl-0 = <&tp_int_odl>; 32 33 interrupt-parent = <&tlmm>; 34 interrupts = <7 IRQ_TYPE_EDGE_FALLING>; 35 36 vcc-supply = <&pp3300_z1>; 37 38 wakeup-source; 39 }; 40}; 41 42ts_i2c: &i2c13 { 43 status = "okay"; 44 clock-frequency = <400000>; 45 46 ap_ts: touchscreen@5d { 47 compatible = "goodix,gt7986u", "goodix,gt7375p"; 48 reg = <0x5d>; 49 pinctrl-names = "default"; 50 pinctrl-0 = <&ts_int_conn>, <&ts_rst_conn>; 51 52 interrupt-parent = <&tlmm>; 53 interrupts = <55 IRQ_TYPE_LEVEL_LOW>; 54 55 reset-gpios = <&tlmm 54 GPIO_ACTIVE_LOW>; 56 57 vdd-supply = <&ts_avdd>; 58 mainboard-vddio-supply = <&ts_avccio>; 59 }; 60}; 61 62&ap_sar_sensor_i2c { 63 status = "okay"; 64}; 65 66&ap_sar_sensor0 { 67 status = "okay"; 68}; 69 70&ap_sar_sensor1 { 71 status = "okay"; 72}; 73 74&mdss_edp { 75 status = "okay"; 76}; 77 78&mdss_edp_phy { 79 status = "okay"; 80}; 81 82/* For nvme */ 83&pcie1 { 84 status = "okay"; 85}; 86 87/* For nvme */ 88&pcie1_phy { 89 status = "okay"; 90}; 91 92&pwmleds { 93 status = "okay"; 94}; 95 96/* For eMMC */ 97&sdhc_1 { 98 status = "okay"; 99}; 100 101/* PINCTRL - ADDITIONS TO NODES IN PARENT DEVICE TREE FILES */ 102 103&ts_rst_conn { 104 bias-disable; 105}; 106 107/* PINCTRL - BOARD-SPECIFIC */ 108 109/* 110 * Methodology for gpio-line-names: 111 * - If a pin goes to herobrine board and is named it gets that name. 112 * - If a pin goes to herobrine board and is not named, it gets no name. 113 * - If a pin is totally internal to Qcard then it gets Qcard name. 114 * - If a pin is not hooked up on Qcard, it gets no name. 115 */ 116 117&pm8350c_gpios { 118 gpio-line-names = "FLASH_STROBE_1", /* 1 */ 119 "AP_SUSPEND", 120 "PM8008_1_RST_N", 121 "", 122 "", 123 "", 124 "PMIC_EDP_BL_EN", 125 "PMIC_EDP_BL_PWM", 126 ""; 127}; 128 129&tlmm { 130 gpio-line-names = "AP_TP_I2C_SDA", /* 0 */ 131 "AP_TP_I2C_SCL", 132 "SSD_RST_L", 133 "PE_WAKE_ODL", 134 "AP_SAR_SDA", 135 "AP_SAR_SCL", 136 "PRB_SC_GPIO_6", 137 "TP_INT_ODL", 138 "HP_I2C_SDA", 139 "HP_I2C_SCL", 140 141 "GNSS_L1_EN", /* 10 */ 142 "GNSS_L5_EN", 143 "SPI_AP_MOSI", 144 "SPI_AP_MISO", 145 "SPI_AP_CLK", 146 "SPI_AP_CS0_L", 147 /* 148 * AP_FLASH_WP is crossystem ABI. Schematics 149 * call it BIOS_FLASH_WP_OD. 150 */ 151 "AP_FLASH_WP", 152 "", 153 "AP_EC_INT_L", 154 "", 155 156 "UF_CAM_RST_L", /* 20 */ 157 "WF_CAM_RST_L", 158 "UART_AP_TX_DBG_RX", 159 "UART_DBG_TX_AP_RX", 160 "", 161 "PM8008_IRQ_1", 162 "HOST2WLAN_SOL", 163 "WLAN2HOST_SOL", 164 "MOS_BT_UART_CTS", 165 "MOS_BT_UART_RFR", 166 167 "MOS_BT_UART_TX", /* 30 */ 168 "MOS_BT_UART_RX", 169 "PRB_SC_GPIO_32", 170 "HUB_RST_L", 171 "", 172 "", 173 "AP_SPI_FP_MISO", 174 "AP_SPI_FP_MOSI", 175 "AP_SPI_FP_CLK", 176 "AP_SPI_FP_CS_L", 177 178 "AP_EC_SPI_MISO", /* 40 */ 179 "AP_EC_SPI_MOSI", 180 "AP_EC_SPI_CLK", 181 "AP_EC_SPI_CS_L", 182 "LCM_RST_L", 183 "EARLY_EUD_N", 184 "", 185 "DP_HOT_PLUG_DET", 186 "IO_BRD_MLB_ID0", 187 "IO_BRD_MLB_ID1", 188 189 "IO_BRD_MLB_ID2", /* 50 */ 190 "SSD_EN", 191 "TS_I2C_SDA_CONN", 192 "TS_I2C_CLK_CONN", 193 "TS_RST_CONN", 194 "TS_INT_CONN", 195 "AP_I2C_TPM_SDA", 196 "AP_I2C_TPM_SCL", 197 "PRB_SC_GPIO_58", 198 "PRB_SC_GPIO_59", 199 200 "EDP_HOT_PLUG_DET_N", /* 60 */ 201 "FP_TO_AP_IRQ_L", 202 "", 203 "AMP_EN", 204 "CAM0_MCLK_GPIO_64", 205 "CAM1_MCLK_GPIO_65", 206 "WF_CAM_MCLK", 207 "PRB_SC_GPIO_67", 208 "FPMCU_BOOT0", 209 "UF_CAM_SDA", 210 211 "UF_CAM_SCL", /* 70 */ 212 "", 213 "", 214 "WF_CAM_SDA", 215 "WF_CAM_SCL", 216 "", 217 "", 218 "EN_FP_RAILS", 219 "FP_RST_L", 220 "PCIE1_CLKREQ_ODL", 221 222 "EN_PP3300_DX_EDP", /* 80 */ 223 "SC_GPIO_81", 224 "FORCED_USB_BOOT", 225 "WCD_RESET_N", 226 "MOS_WLAN_EN", 227 "MOS_BT_EN", 228 "MOS_SW_CTRL", 229 "MOS_PCIE0_RST", 230 "MOS_PCIE0_CLKREQ_N", 231 "MOS_PCIE0_WAKE_N", 232 233 "MOS_LAA_AS_EN", /* 90 */ 234 "SD_CD_ODL", 235 "", 236 "", 237 "MOS_BT_WLAN_SLIMBUS_CLK", 238 "MOS_BT_WLAN_SLIMBUS_DAT0", 239 "HP_MCLK", 240 "HP_BCLK", 241 "HP_DOUT", 242 "HP_DIN", 243 244 "HP_LRCLK", /* 100 */ 245 "HP_IRQ", 246 "", 247 "", 248 "GSC_AP_INT_ODL", 249 "EN_PP3300_CODEC", 250 "AMP_BCLK", 251 "AMP_DIN", 252 "AMP_LRCLK", 253 "UIM1_DATA_GPIO_109", 254 255 "UIM1_CLK_GPIO_110", /* 110 */ 256 "UIM1_RESET_GPIO_111", 257 "PRB_SC_GPIO_112", 258 "UIM0_DATA", 259 "UIM0_CLK", 260 "UIM0_RST", 261 "UIM0_PRESENT_ODL", 262 "SDM_RFFE0_CLK", 263 "SDM_RFFE0_DATA", 264 "WF_CAM_EN", 265 266 "FASTBOOT_SEL_0", /* 120 */ 267 "SC_GPIO_121", 268 "FASTBOOT_SEL_1", 269 "SC_GPIO_123", 270 "FASTBOOT_SEL_2", 271 "SM_RFFE4_CLK_GRFC_8", 272 "SM_RFFE4_DATA_GRFC_9", 273 "WLAN_COEX_UART1_RX", 274 "WLAN_COEX_UART1_TX", 275 "PRB_SC_GPIO_129", 276 277 "LCM_ID0", /* 130 */ 278 "LCM_ID1", 279 "", 280 "SDR_QLINK_REQ", 281 "SDR_QLINK_EN", 282 "QLINK0_WMSS_RESET_N", 283 "SMR526_QLINK1_REQ", 284 "SMR526_QLINK1_EN", 285 "SMR526_QLINK1_WMSS_RESET_N", 286 "PRB_SC_GPIO_139", 287 288 "SAR1_IRQ_ODL", /* 140 */ 289 "SAR0_IRQ_ODL", 290 "PRB_SC_GPIO_142", 291 "", 292 "WCD_SWR_TX_CLK", 293 "WCD_SWR_TX_DATA0", 294 "WCD_SWR_TX_DATA1", 295 "WCD_SWR_RX_CLK", 296 "WCD_SWR_RX_DATA0", 297 "WCD_SWR_RX_DATA1", 298 299 "DMIC01_CLK", /* 150 */ 300 "DMIC01_DATA", 301 "DMIC23_CLK", 302 "DMIC23_DATA", 303 "", 304 "", 305 "EC_IN_RW_ODL", 306 "HUB_EN", 307 "WCD_SWR_TX_DATA2", 308 "", 309 310 "", /* 160 */ 311 "", 312 "", 313 "", 314 "", 315 "", 316 "", 317 "", 318 "", 319 "", 320 321 "", /* 170 */ 322 "MOS_BLE_UART_TX", 323 "MOS_BLE_UART_RX", 324 "", 325 ""; 326}; 327