1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the R-Car V3U (R8A779A0) SoC 4 * 5 * Copyright (C) 2020 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/clock/r8a779a0-cpg-mssr.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/power/r8a779a0-sysc.h> 11 12/ { 13 compatible = "renesas,r8a779a0"; 14 #address-cells = <2>; 15 #size-cells = <2>; 16 17 /* External CAN clock - to be overridden by boards that provide it */ 18 can_clk: can { 19 compatible = "fixed-clock"; 20 #clock-cells = <0>; 21 clock-frequency = <0>; 22 }; 23 24 cpus { 25 #address-cells = <1>; 26 #size-cells = <0>; 27 28 a76_0: cpu@0 { 29 compatible = "arm,cortex-a76"; 30 reg = <0>; 31 device_type = "cpu"; 32 power-domains = <&sysc R8A779A0_PD_A1E0D0C0>; 33 next-level-cache = <&L3_CA76_0>; 34 clocks = <&cpg CPG_CORE R8A779A0_CLK_Z0>; 35 }; 36 37 L3_CA76_0: cache-controller-0 { 38 compatible = "cache"; 39 power-domains = <&sysc R8A779A0_PD_A2E0D0>; 40 cache-unified; 41 cache-level = <3>; 42 }; 43 }; 44 45 extal_clk: extal { 46 compatible = "fixed-clock"; 47 #clock-cells = <0>; 48 /* This value must be overridden by the board */ 49 clock-frequency = <0>; 50 }; 51 52 extalr_clk: extalr { 53 compatible = "fixed-clock"; 54 #clock-cells = <0>; 55 /* This value must be overridden by the board */ 56 clock-frequency = <0>; 57 }; 58 59 pmu_a76 { 60 compatible = "arm,cortex-a76-pmu"; 61 interrupts-extended = <&gic GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>; 62 }; 63 64 /* External SCIF clock - to be overridden by boards that provide it */ 65 scif_clk: scif { 66 compatible = "fixed-clock"; 67 #clock-cells = <0>; 68 clock-frequency = <0>; 69 }; 70 71 soc: soc { 72 compatible = "simple-bus"; 73 interrupt-parent = <&gic>; 74 #address-cells = <2>; 75 #size-cells = <2>; 76 ranges; 77 78 rwdt: watchdog@e6020000 { 79 compatible = "renesas,r8a779a0-wdt", 80 "renesas,rcar-gen4-wdt"; 81 reg = <0 0xe6020000 0 0x0c>; 82 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 83 clocks = <&cpg CPG_MOD 907>; 84 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 85 resets = <&cpg 907>; 86 status = "disabled"; 87 }; 88 89 pfc: pinctrl@e6050000 { 90 compatible = "renesas,pfc-r8a779a0"; 91 reg = <0 0xe6050000 0 0x16c>, <0 0xe6050800 0 0x16c>, 92 <0 0xe6058000 0 0x16c>, <0 0xe6058800 0 0x16c>, 93 <0 0xe6060000 0 0x16c>, <0 0xe6060800 0 0x16c>, 94 <0 0xe6068000 0 0x16c>, <0 0xe6068800 0 0x16c>, 95 <0 0xe6069000 0 0x16c>, <0 0xe6069800 0 0x16c>; 96 }; 97 98 gpio0: gpio@e6058180 { 99 compatible = "renesas,gpio-r8a779a0", 100 "renesas,rcar-gen4-gpio"; 101 reg = <0 0xe6058180 0 0x54>; 102 interrupts = <GIC_SPI 832 IRQ_TYPE_LEVEL_HIGH>; 103 clocks = <&cpg CPG_MOD 916>; 104 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 105 resets = <&cpg 916>; 106 gpio-controller; 107 #gpio-cells = <2>; 108 gpio-ranges = <&pfc 0 0 28>; 109 interrupt-controller; 110 #interrupt-cells = <2>; 111 }; 112 113 gpio1: gpio@e6050180 { 114 compatible = "renesas,gpio-r8a779a0", 115 "renesas,rcar-gen4-gpio"; 116 reg = <0 0xe6050180 0 0x54>; 117 interrupts = <GIC_SPI 836 IRQ_TYPE_LEVEL_HIGH>; 118 clocks = <&cpg CPG_MOD 915>; 119 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 120 resets = <&cpg 915>; 121 gpio-controller; 122 #gpio-cells = <2>; 123 gpio-ranges = <&pfc 0 32 31>; 124 interrupt-controller; 125 #interrupt-cells = <2>; 126 }; 127 128 gpio2: gpio@e6050980 { 129 compatible = "renesas,gpio-r8a779a0", 130 "renesas,rcar-gen4-gpio"; 131 reg = <0 0xe6050980 0 0x54>; 132 interrupts = <GIC_SPI 840 IRQ_TYPE_LEVEL_HIGH>; 133 clocks = <&cpg CPG_MOD 915>; 134 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 135 resets = <&cpg 915>; 136 gpio-controller; 137 #gpio-cells = <2>; 138 gpio-ranges = <&pfc 0 64 25>; 139 interrupt-controller; 140 #interrupt-cells = <2>; 141 }; 142 143 gpio3: gpio@e6058980 { 144 compatible = "renesas,gpio-r8a779a0", 145 "renesas,rcar-gen4-gpio"; 146 reg = <0 0xe6058980 0 0x54>; 147 interrupts = <GIC_SPI 844 IRQ_TYPE_LEVEL_HIGH>; 148 clocks = <&cpg CPG_MOD 916>; 149 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 150 resets = <&cpg 916>; 151 gpio-controller; 152 #gpio-cells = <2>; 153 gpio-ranges = <&pfc 0 96 17>; 154 interrupt-controller; 155 #interrupt-cells = <2>; 156 }; 157 158 gpio4: gpio@e6060180 { 159 compatible = "renesas,gpio-r8a779a0", 160 "renesas,rcar-gen4-gpio"; 161 reg = <0 0xe6060180 0 0x54>; 162 interrupts = <GIC_SPI 848 IRQ_TYPE_LEVEL_HIGH>; 163 clocks = <&cpg CPG_MOD 917>; 164 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 165 resets = <&cpg 917>; 166 gpio-controller; 167 #gpio-cells = <2>; 168 gpio-ranges = <&pfc 0 128 27>; 169 interrupt-controller; 170 #interrupt-cells = <2>; 171 }; 172 173 gpio5: gpio@e6060980 { 174 compatible = "renesas,gpio-r8a779a0", 175 "renesas,rcar-gen4-gpio"; 176 reg = <0 0xe6060980 0 0x54>; 177 interrupts = <GIC_SPI 852 IRQ_TYPE_LEVEL_HIGH>; 178 clocks = <&cpg CPG_MOD 917>; 179 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 180 resets = <&cpg 917>; 181 gpio-controller; 182 #gpio-cells = <2>; 183 gpio-ranges = <&pfc 0 160 21>; 184 interrupt-controller; 185 #interrupt-cells = <2>; 186 }; 187 188 gpio6: gpio@e6068180 { 189 compatible = "renesas,gpio-r8a779a0", 190 "renesas,rcar-gen4-gpio"; 191 reg = <0 0xe6068180 0 0x54>; 192 interrupts = <GIC_SPI 856 IRQ_TYPE_LEVEL_HIGH>; 193 clocks = <&cpg CPG_MOD 918>; 194 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 195 resets = <&cpg 918>; 196 gpio-controller; 197 #gpio-cells = <2>; 198 gpio-ranges = <&pfc 0 192 21>; 199 interrupt-controller; 200 #interrupt-cells = <2>; 201 }; 202 203 gpio7: gpio@e6068980 { 204 compatible = "renesas,gpio-r8a779a0", 205 "renesas,rcar-gen4-gpio"; 206 reg = <0 0xe6068980 0 0x54>; 207 interrupts = <GIC_SPI 860 IRQ_TYPE_LEVEL_HIGH>; 208 clocks = <&cpg CPG_MOD 918>; 209 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 210 resets = <&cpg 918>; 211 gpio-controller; 212 #gpio-cells = <2>; 213 gpio-ranges = <&pfc 0 224 21>; 214 interrupt-controller; 215 #interrupt-cells = <2>; 216 }; 217 218 gpio8: gpio@e6069180 { 219 compatible = "renesas,gpio-r8a779a0", 220 "renesas,rcar-gen4-gpio"; 221 reg = <0 0xe6069180 0 0x54>; 222 interrupts = <GIC_SPI 864 IRQ_TYPE_LEVEL_HIGH>; 223 clocks = <&cpg CPG_MOD 918>; 224 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 225 resets = <&cpg 918>; 226 gpio-controller; 227 #gpio-cells = <2>; 228 gpio-ranges = <&pfc 0 256 21>; 229 interrupt-controller; 230 #interrupt-cells = <2>; 231 }; 232 233 gpio9: gpio@e6069980 { 234 compatible = "renesas,gpio-r8a779a0", 235 "renesas,rcar-gen4-gpio"; 236 reg = <0 0xe6069980 0 0x54>; 237 interrupts = <GIC_SPI 868 IRQ_TYPE_LEVEL_HIGH>; 238 clocks = <&cpg CPG_MOD 918>; 239 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 240 resets = <&cpg 918>; 241 gpio-controller; 242 #gpio-cells = <2>; 243 gpio-ranges = <&pfc 0 288 21>; 244 interrupt-controller; 245 #interrupt-cells = <2>; 246 }; 247 248 cmt0: timer@e60f0000 { 249 compatible = "renesas,r8a779a0-cmt0", 250 "renesas,rcar-gen4-cmt0"; 251 reg = <0 0xe60f0000 0 0x1004>; 252 interrupts = <GIC_SPI 500 IRQ_TYPE_LEVEL_HIGH>, 253 <GIC_SPI 501 IRQ_TYPE_LEVEL_HIGH>; 254 clocks = <&cpg CPG_MOD 910>; 255 clock-names = "fck"; 256 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 257 resets = <&cpg 910>; 258 status = "disabled"; 259 }; 260 261 cmt1: timer@e6130000 { 262 compatible = "renesas,r8a779a0-cmt1", 263 "renesas,rcar-gen4-cmt1"; 264 reg = <0 0xe6130000 0 0x1004>; 265 interrupts = <GIC_SPI 448 IRQ_TYPE_LEVEL_HIGH>, 266 <GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>, 267 <GIC_SPI 450 IRQ_TYPE_LEVEL_HIGH>, 268 <GIC_SPI 451 IRQ_TYPE_LEVEL_HIGH>, 269 <GIC_SPI 452 IRQ_TYPE_LEVEL_HIGH>, 270 <GIC_SPI 453 IRQ_TYPE_LEVEL_HIGH>, 271 <GIC_SPI 454 IRQ_TYPE_LEVEL_HIGH>, 272 <GIC_SPI 455 IRQ_TYPE_LEVEL_HIGH>; 273 clocks = <&cpg CPG_MOD 911>; 274 clock-names = "fck"; 275 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 276 resets = <&cpg 911>; 277 status = "disabled"; 278 }; 279 280 cmt2: timer@e6140000 { 281 compatible = "renesas,r8a779a0-cmt1", 282 "renesas,rcar-gen4-cmt1"; 283 reg = <0 0xe6140000 0 0x1004>; 284 interrupts = <GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>, 285 <GIC_SPI 457 IRQ_TYPE_LEVEL_HIGH>, 286 <GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH>, 287 <GIC_SPI 459 IRQ_TYPE_LEVEL_HIGH>, 288 <GIC_SPI 460 IRQ_TYPE_LEVEL_HIGH>, 289 <GIC_SPI 461 IRQ_TYPE_LEVEL_HIGH>, 290 <GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH>, 291 <GIC_SPI 463 IRQ_TYPE_LEVEL_HIGH>; 292 clocks = <&cpg CPG_MOD 912>; 293 clock-names = "fck"; 294 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 295 resets = <&cpg 912>; 296 status = "disabled"; 297 }; 298 299 cmt3: timer@e6148000 { 300 compatible = "renesas,r8a779a0-cmt1", 301 "renesas,rcar-gen4-cmt1"; 302 reg = <0 0xe6148000 0 0x1004>; 303 interrupts = <GIC_SPI 464 IRQ_TYPE_LEVEL_HIGH>, 304 <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>, 305 <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>, 306 <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>, 307 <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>, 308 <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>, 309 <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>, 310 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>; 311 clocks = <&cpg CPG_MOD 913>; 312 clock-names = "fck"; 313 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 314 resets = <&cpg 913>; 315 status = "disabled"; 316 }; 317 318 cpg: clock-controller@e6150000 { 319 compatible = "renesas,r8a779a0-cpg-mssr"; 320 reg = <0 0xe6150000 0 0x4000>; 321 clocks = <&extal_clk>, <&extalr_clk>; 322 clock-names = "extal", "extalr"; 323 #clock-cells = <2>; 324 #power-domain-cells = <0>; 325 #reset-cells = <1>; 326 }; 327 328 rst: reset-controller@e6160000 { 329 compatible = "renesas,r8a779a0-rst"; 330 reg = <0 0xe6160000 0 0x4000>; 331 }; 332 333 sysc: system-controller@e6180000 { 334 compatible = "renesas,r8a779a0-sysc"; 335 reg = <0 0xe6180000 0 0x4000>; 336 #power-domain-cells = <1>; 337 }; 338 339 tsc: thermal@e6190000 { 340 compatible = "renesas,r8a779a0-thermal"; 341 reg = <0 0xe6190000 0 0x200>, 342 <0 0xe6198000 0 0x200>, 343 <0 0xe61a0000 0 0x200>, 344 <0 0xe61a8000 0 0x200>, 345 <0 0xe61b0000 0 0x200>; 346 clocks = <&cpg CPG_MOD 919>; 347 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 348 resets = <&cpg 919>; 349 #thermal-sensor-cells = <1>; 350 }; 351 352 intc_ex: interrupt-controller@e61c0000 { 353 compatible = "renesas,intc-ex-r8a779a0", "renesas,irqc"; 354 #interrupt-cells = <2>; 355 interrupt-controller; 356 reg = <0 0xe61c0000 0 0x200>; 357 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 358 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 359 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 360 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 361 <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, 362 <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 363 clocks = <&cpg CPG_CORE R8A779A0_CLK_CP>; 364 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 365 }; 366 367 tmu0: timer@e61e0000 { 368 compatible = "renesas,tmu-r8a779a0", "renesas,tmu"; 369 reg = <0 0xe61e0000 0 0x30>; 370 interrupts = <GIC_SPI 512 IRQ_TYPE_LEVEL_HIGH>, 371 <GIC_SPI 513 IRQ_TYPE_LEVEL_HIGH>, 372 <GIC_SPI 514 IRQ_TYPE_LEVEL_HIGH>; 373 clocks = <&cpg CPG_MOD 713>; 374 clock-names = "fck"; 375 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 376 resets = <&cpg 713>; 377 status = "disabled"; 378 }; 379 380 tmu1: timer@e6fc0000 { 381 compatible = "renesas,tmu-r8a779a0", "renesas,tmu"; 382 reg = <0 0xe6fc0000 0 0x30>; 383 interrupts = <GIC_SPI 504 IRQ_TYPE_LEVEL_HIGH>, 384 <GIC_SPI 505 IRQ_TYPE_LEVEL_HIGH>, 385 <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>; 386 clocks = <&cpg CPG_MOD 714>; 387 clock-names = "fck"; 388 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 389 resets = <&cpg 714>; 390 status = "disabled"; 391 }; 392 393 tmu2: timer@e6fd0000 { 394 compatible = "renesas,tmu-r8a779a0", "renesas,tmu"; 395 reg = <0 0xe6fd0000 0 0x30>; 396 interrupts = <GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>, 397 <GIC_SPI 509 IRQ_TYPE_LEVEL_HIGH>, 398 <GIC_SPI 510 IRQ_TYPE_LEVEL_HIGH>; 399 clocks = <&cpg CPG_MOD 715>; 400 clock-names = "fck"; 401 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 402 resets = <&cpg 715>; 403 status = "disabled"; 404 }; 405 406 tmu3: timer@e6fe0000 { 407 compatible = "renesas,tmu-r8a779a0", "renesas,tmu"; 408 reg = <0 0xe6fe0000 0 0x30>; 409 interrupts = <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>, 410 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, 411 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>; 412 clocks = <&cpg CPG_MOD 716>; 413 clock-names = "fck"; 414 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 415 resets = <&cpg 716>; 416 status = "disabled"; 417 }; 418 419 tmu4: timer@ffc00000 { 420 compatible = "renesas,tmu-r8a779a0", "renesas,tmu"; 421 reg = <0 0xffc00000 0 0x30>; 422 interrupts = <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>, 423 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>, 424 <GIC_SPI 478 IRQ_TYPE_LEVEL_HIGH>; 425 clocks = <&cpg CPG_MOD 717>; 426 clock-names = "fck"; 427 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 428 resets = <&cpg 717>; 429 status = "disabled"; 430 }; 431 432 i2c0: i2c@e6500000 { 433 compatible = "renesas,i2c-r8a779a0", 434 "renesas,rcar-gen4-i2c"; 435 reg = <0 0xe6500000 0 0x40>; 436 interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>; 437 clocks = <&cpg CPG_MOD 518>; 438 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 439 resets = <&cpg 518>; 440 dmas = <&dmac1 0x91>, <&dmac1 0x90>; 441 dma-names = "tx", "rx"; 442 i2c-scl-internal-delay-ns = <110>; 443 #address-cells = <1>; 444 #size-cells = <0>; 445 status = "disabled"; 446 }; 447 448 i2c1: i2c@e6508000 { 449 compatible = "renesas,i2c-r8a779a0", 450 "renesas,rcar-gen4-i2c"; 451 reg = <0 0xe6508000 0 0x40>; 452 interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>; 453 clocks = <&cpg CPG_MOD 519>; 454 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 455 resets = <&cpg 519>; 456 dmas = <&dmac1 0x93>, <&dmac1 0x92>; 457 dma-names = "tx", "rx"; 458 i2c-scl-internal-delay-ns = <110>; 459 #address-cells = <1>; 460 #size-cells = <0>; 461 status = "disabled"; 462 }; 463 464 i2c2: i2c@e6510000 { 465 compatible = "renesas,i2c-r8a779a0", 466 "renesas,rcar-gen4-i2c"; 467 reg = <0 0xe6510000 0 0x40>; 468 interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>; 469 clocks = <&cpg CPG_MOD 520>; 470 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 471 resets = <&cpg 520>; 472 dmas = <&dmac1 0x95>, <&dmac1 0x94>; 473 dma-names = "tx", "rx"; 474 i2c-scl-internal-delay-ns = <110>; 475 #address-cells = <1>; 476 #size-cells = <0>; 477 status = "disabled"; 478 }; 479 480 i2c3: i2c@e66d0000 { 481 compatible = "renesas,i2c-r8a779a0", 482 "renesas,rcar-gen4-i2c"; 483 reg = <0 0xe66d0000 0 0x40>; 484 interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>; 485 clocks = <&cpg CPG_MOD 521>; 486 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 487 resets = <&cpg 521>; 488 dmas = <&dmac1 0x97>, <&dmac1 0x96>; 489 dma-names = "tx", "rx"; 490 i2c-scl-internal-delay-ns = <110>; 491 #address-cells = <1>; 492 #size-cells = <0>; 493 status = "disabled"; 494 }; 495 496 i2c4: i2c@e66d8000 { 497 compatible = "renesas,i2c-r8a779a0", 498 "renesas,rcar-gen4-i2c"; 499 reg = <0 0xe66d8000 0 0x40>; 500 interrupts = <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>; 501 clocks = <&cpg CPG_MOD 522>; 502 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 503 resets = <&cpg 522>; 504 dmas = <&dmac1 0x99>, <&dmac1 0x98>; 505 dma-names = "tx", "rx"; 506 i2c-scl-internal-delay-ns = <110>; 507 #address-cells = <1>; 508 #size-cells = <0>; 509 status = "disabled"; 510 }; 511 512 i2c5: i2c@e66e0000 { 513 compatible = "renesas,i2c-r8a779a0", 514 "renesas,rcar-gen4-i2c"; 515 reg = <0 0xe66e0000 0 0x40>; 516 interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; 517 clocks = <&cpg CPG_MOD 523>; 518 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 519 resets = <&cpg 523>; 520 dmas = <&dmac1 0x9b>, <&dmac1 0x9a>; 521 dma-names = "tx", "rx"; 522 i2c-scl-internal-delay-ns = <110>; 523 #address-cells = <1>; 524 #size-cells = <0>; 525 status = "disabled"; 526 }; 527 528 i2c6: i2c@e66e8000 { 529 compatible = "renesas,i2c-r8a779a0", 530 "renesas,rcar-gen4-i2c"; 531 reg = <0 0xe66e8000 0 0x40>; 532 interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>; 533 clocks = <&cpg CPG_MOD 524>; 534 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 535 resets = <&cpg 524>; 536 dmas = <&dmac1 0x9d>, <&dmac1 0x9c>; 537 dma-names = "tx", "rx"; 538 i2c-scl-internal-delay-ns = <110>; 539 #address-cells = <1>; 540 #size-cells = <0>; 541 status = "disabled"; 542 }; 543 544 hscif0: serial@e6540000 { 545 compatible = "renesas,hscif-r8a779a0", 546 "renesas,rcar-gen4-hscif", "renesas,hscif"; 547 reg = <0 0xe6540000 0 0x60>; 548 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; 549 clocks = <&cpg CPG_MOD 514>, 550 <&cpg CPG_CORE R8A779A0_CLK_S1D2>, 551 <&scif_clk>; 552 clock-names = "fck", "brg_int", "scif_clk"; 553 dmas = <&dmac1 0x31>, <&dmac1 0x30>; 554 dma-names = "tx", "rx"; 555 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 556 resets = <&cpg 514>; 557 status = "disabled"; 558 }; 559 560 hscif1: serial@e6550000 { 561 compatible = "renesas,hscif-r8a779a0", 562 "renesas,rcar-gen4-hscif", "renesas,hscif"; 563 reg = <0 0xe6550000 0 0x60>; 564 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; 565 clocks = <&cpg CPG_MOD 515>, 566 <&cpg CPG_CORE R8A779A0_CLK_S1D2>, 567 <&scif_clk>; 568 clock-names = "fck", "brg_int", "scif_clk"; 569 dmas = <&dmac1 0x33>, <&dmac1 0x32>; 570 dma-names = "tx", "rx"; 571 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 572 resets = <&cpg 515>; 573 status = "disabled"; 574 }; 575 576 hscif2: serial@e6560000 { 577 compatible = "renesas,hscif-r8a779a0", 578 "renesas,rcar-gen4-hscif", "renesas,hscif"; 579 reg = <0 0xe6560000 0 0x60>; 580 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 581 clocks = <&cpg CPG_MOD 516>, 582 <&cpg CPG_CORE R8A779A0_CLK_S1D2>, 583 <&scif_clk>; 584 clock-names = "fck", "brg_int", "scif_clk"; 585 dmas = <&dmac1 0x35>, <&dmac1 0x34>; 586 dma-names = "tx", "rx"; 587 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 588 resets = <&cpg 516>; 589 status = "disabled"; 590 }; 591 592 hscif3: serial@e66a0000 { 593 compatible = "renesas,hscif-r8a779a0", 594 "renesas,rcar-gen4-hscif", "renesas,hscif"; 595 reg = <0 0xe66a0000 0 0x60>; 596 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; 597 clocks = <&cpg CPG_MOD 517>, 598 <&cpg CPG_CORE R8A779A0_CLK_S1D2>, 599 <&scif_clk>; 600 clock-names = "fck", "brg_int", "scif_clk"; 601 dmas = <&dmac1 0x37>, <&dmac1 0x36>; 602 dma-names = "tx", "rx"; 603 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 604 resets = <&cpg 517>; 605 status = "disabled"; 606 }; 607 608 canfd: can@e6660000 { 609 compatible = "renesas,r8a779a0-canfd"; 610 reg = <0 0xe6660000 0 0x8000>; 611 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>, 612 <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; 613 interrupt-names = "ch_int", "g_int"; 614 clocks = <&cpg CPG_MOD 328>, 615 <&cpg CPG_CORE R8A779A0_CLK_CANFD>, 616 <&can_clk>; 617 clock-names = "fck", "canfd", "can_clk"; 618 assigned-clocks = <&cpg CPG_CORE R8A779A0_CLK_CANFD>; 619 assigned-clock-rates = <80000000>; 620 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 621 resets = <&cpg 328>; 622 status = "disabled"; 623 624 channel0 { 625 status = "disabled"; 626 }; 627 628 channel1 { 629 status = "disabled"; 630 }; 631 632 channel2 { 633 status = "disabled"; 634 }; 635 636 channel3 { 637 status = "disabled"; 638 }; 639 640 channel4 { 641 status = "disabled"; 642 }; 643 644 channel5 { 645 status = "disabled"; 646 }; 647 648 channel6 { 649 status = "disabled"; 650 }; 651 652 channel7 { 653 status = "disabled"; 654 }; 655 }; 656 657 avb0: ethernet@e6800000 { 658 compatible = "renesas,etheravb-r8a779a0", 659 "renesas,etheravb-rcar-gen4"; 660 reg = <0 0xe6800000 0 0x800>; 661 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 662 <GIC_SPI 257 IRQ_TYPE_LEVEL_HIGH>, 663 <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>, 664 <GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH>, 665 <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, 666 <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>, 667 <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>, 668 <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>, 669 <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>, 670 <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>, 671 <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>, 672 <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>, 673 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, 674 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>, 675 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>, 676 <GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>, 677 <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>, 678 <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>, 679 <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>, 680 <GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>, 681 <GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>, 682 <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>, 683 <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>, 684 <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>, 685 <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>; 686 interrupt-names = "ch0", "ch1", "ch2", "ch3", 687 "ch4", "ch5", "ch6", "ch7", 688 "ch8", "ch9", "ch10", "ch11", 689 "ch12", "ch13", "ch14", "ch15", 690 "ch16", "ch17", "ch18", "ch19", 691 "ch20", "ch21", "ch22", "ch23", 692 "ch24"; 693 clocks = <&cpg CPG_MOD 211>; 694 clock-names = "fck"; 695 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 696 resets = <&cpg 211>; 697 phy-mode = "rgmii"; 698 rx-internal-delay-ps = <0>; 699 tx-internal-delay-ps = <0>; 700 #address-cells = <1>; 701 #size-cells = <0>; 702 status = "disabled"; 703 }; 704 705 avb1: ethernet@e6810000 { 706 compatible = "renesas,etheravb-r8a779a0", 707 "renesas,etheravb-rcar-gen4"; 708 reg = <0 0xe6810000 0 0x800>; 709 interrupts = <GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>, 710 <GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>, 711 <GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>, 712 <GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>, 713 <GIC_SPI 285 IRQ_TYPE_LEVEL_HIGH>, 714 <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>, 715 <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>, 716 <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>, 717 <GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH>, 718 <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>, 719 <GIC_SPI 291 IRQ_TYPE_LEVEL_HIGH>, 720 <GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>, 721 <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>, 722 <GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH>, 723 <GIC_SPI 295 IRQ_TYPE_LEVEL_HIGH>, 724 <GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>, 725 <GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>, 726 <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>, 727 <GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>, 728 <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>, 729 <GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH>, 730 <GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>, 731 <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, 732 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, 733 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>; 734 interrupt-names = "ch0", "ch1", "ch2", "ch3", 735 "ch4", "ch5", "ch6", "ch7", 736 "ch8", "ch9", "ch10", "ch11", 737 "ch12", "ch13", "ch14", "ch15", 738 "ch16", "ch17", "ch18", "ch19", 739 "ch20", "ch21", "ch22", "ch23", 740 "ch24"; 741 clocks = <&cpg CPG_MOD 212>; 742 clock-names = "fck"; 743 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 744 resets = <&cpg 212>; 745 phy-mode = "rgmii"; 746 rx-internal-delay-ps = <0>; 747 tx-internal-delay-ps = <0>; 748 #address-cells = <1>; 749 #size-cells = <0>; 750 status = "disabled"; 751 }; 752 753 avb2: ethernet@e6820000 { 754 compatible = "renesas,etheravb-r8a779a0", 755 "renesas,etheravb-rcar-gen4"; 756 reg = <0 0xe6820000 0 0x1000>; 757 interrupts = <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>, 758 <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>, 759 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, 760 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, 761 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, 762 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, 763 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, 764 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, 765 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, 766 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 767 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 768 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 769 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, 770 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>, 771 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 772 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 773 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 774 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 775 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 776 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 777 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 778 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 779 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 780 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 781 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>; 782 interrupt-names = "ch0", "ch1", "ch2", "ch3", 783 "ch4", "ch5", "ch6", "ch7", 784 "ch8", "ch9", "ch10", "ch11", 785 "ch12", "ch13", "ch14", "ch15", 786 "ch16", "ch17", "ch18", "ch19", 787 "ch20", "ch21", "ch22", "ch23", 788 "ch24"; 789 clocks = <&cpg CPG_MOD 213>; 790 clock-names = "fck"; 791 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 792 resets = <&cpg 213>; 793 phy-mode = "rgmii"; 794 rx-internal-delay-ps = <0>; 795 tx-internal-delay-ps = <0>; 796 #address-cells = <1>; 797 #size-cells = <0>; 798 status = "disabled"; 799 }; 800 801 avb3: ethernet@e6830000 { 802 compatible = "renesas,etheravb-r8a779a0", 803 "renesas,etheravb-rcar-gen4"; 804 reg = <0 0xe6830000 0 0x1000>; 805 interrupts = <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 806 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, 807 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, 808 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, 809 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>, 810 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 811 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 812 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 813 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 814 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 815 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 816 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 817 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 818 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 819 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, 820 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, 821 <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, 822 <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, 823 <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>, 824 <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, 825 <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>, 826 <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>, 827 <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>, 828 <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>, 829 <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 830 interrupt-names = "ch0", "ch1", "ch2", "ch3", 831 "ch4", "ch5", "ch6", "ch7", 832 "ch8", "ch9", "ch10", "ch11", 833 "ch12", "ch13", "ch14", "ch15", 834 "ch16", "ch17", "ch18", "ch19", 835 "ch20", "ch21", "ch22", "ch23", 836 "ch24"; 837 clocks = <&cpg CPG_MOD 214>; 838 clock-names = "fck"; 839 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 840 resets = <&cpg 214>; 841 phy-mode = "rgmii"; 842 rx-internal-delay-ps = <0>; 843 tx-internal-delay-ps = <0>; 844 #address-cells = <1>; 845 #size-cells = <0>; 846 status = "disabled"; 847 }; 848 849 avb4: ethernet@e6840000 { 850 compatible = "renesas,etheravb-r8a779a0", 851 "renesas,etheravb-rcar-gen4"; 852 reg = <0 0xe6840000 0 0x1000>; 853 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>, 854 <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>, 855 <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>, 856 <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>, 857 <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>, 858 <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>, 859 <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>, 860 <GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH>, 861 <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>, 862 <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>, 863 <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>, 864 <GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH>, 865 <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>, 866 <GIC_SPI 369 IRQ_TYPE_LEVEL_HIGH>, 867 <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>, 868 <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>, 869 <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>, 870 <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>, 871 <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>, 872 <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>, 873 <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>, 874 <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>, 875 <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>, 876 <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>, 877 <GIC_SPI 380 IRQ_TYPE_LEVEL_HIGH>; 878 interrupt-names = "ch0", "ch1", "ch2", "ch3", 879 "ch4", "ch5", "ch6", "ch7", 880 "ch8", "ch9", "ch10", "ch11", 881 "ch12", "ch13", "ch14", "ch15", 882 "ch16", "ch17", "ch18", "ch19", 883 "ch20", "ch21", "ch22", "ch23", 884 "ch24"; 885 clocks = <&cpg CPG_MOD 215>; 886 clock-names = "fck"; 887 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 888 resets = <&cpg 215>; 889 phy-mode = "rgmii"; 890 rx-internal-delay-ps = <0>; 891 tx-internal-delay-ps = <0>; 892 #address-cells = <1>; 893 #size-cells = <0>; 894 status = "disabled"; 895 }; 896 897 avb5: ethernet@e6850000 { 898 compatible = "renesas,etheravb-r8a779a0", 899 "renesas,etheravb-rcar-gen4"; 900 reg = <0 0xe6850000 0 0x1000>; 901 interrupts = <GIC_SPI 381 IRQ_TYPE_LEVEL_HIGH>, 902 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>, 903 <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>, 904 <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>, 905 <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>, 906 <GIC_SPI 386 IRQ_TYPE_LEVEL_HIGH>, 907 <GIC_SPI 387 IRQ_TYPE_LEVEL_HIGH>, 908 <GIC_SPI 388 IRQ_TYPE_LEVEL_HIGH>, 909 <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>, 910 <GIC_SPI 390 IRQ_TYPE_LEVEL_HIGH>, 911 <GIC_SPI 391 IRQ_TYPE_LEVEL_HIGH>, 912 <GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH>, 913 <GIC_SPI 393 IRQ_TYPE_LEVEL_HIGH>, 914 <GIC_SPI 394 IRQ_TYPE_LEVEL_HIGH>, 915 <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>, 916 <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>, 917 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>, 918 <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 919 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 920 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 921 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 922 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 923 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 924 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 925 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>; 926 interrupt-names = "ch0", "ch1", "ch2", "ch3", 927 "ch4", "ch5", "ch6", "ch7", 928 "ch8", "ch9", "ch10", "ch11", 929 "ch12", "ch13", "ch14", "ch15", 930 "ch16", "ch17", "ch18", "ch19", 931 "ch20", "ch21", "ch22", "ch23", 932 "ch24"; 933 clocks = <&cpg CPG_MOD 216>; 934 clock-names = "fck"; 935 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 936 resets = <&cpg 216>; 937 phy-mode = "rgmii"; 938 rx-internal-delay-ps = <0>; 939 tx-internal-delay-ps = <0>; 940 #address-cells = <1>; 941 #size-cells = <0>; 942 status = "disabled"; 943 }; 944 945 scif0: serial@e6e60000 { 946 compatible = "renesas,scif-r8a779a0", 947 "renesas,rcar-gen4-scif", "renesas,scif"; 948 reg = <0 0xe6e60000 0 64>; 949 interrupts = <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>; 950 clocks = <&cpg CPG_MOD 702>, 951 <&cpg CPG_CORE R8A779A0_CLK_S1D2>, 952 <&scif_clk>; 953 clock-names = "fck", "brg_int", "scif_clk"; 954 dmas = <&dmac1 0x51>, <&dmac1 0x50>; 955 dma-names = "tx", "rx"; 956 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 957 resets = <&cpg 702>; 958 status = "disabled"; 959 }; 960 961 scif1: serial@e6e68000 { 962 compatible = "renesas,scif-r8a779a0", 963 "renesas,rcar-gen4-scif", "renesas,scif"; 964 reg = <0 0xe6e68000 0 64>; 965 interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>; 966 clocks = <&cpg CPG_MOD 703>, 967 <&cpg CPG_CORE R8A779A0_CLK_S1D2>, 968 <&scif_clk>; 969 clock-names = "fck", "brg_int", "scif_clk"; 970 dmas = <&dmac1 0x53>, <&dmac1 0x52>; 971 dma-names = "tx", "rx"; 972 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 973 resets = <&cpg 703>; 974 status = "disabled"; 975 }; 976 977 scif3: serial@e6c50000 { 978 compatible = "renesas,scif-r8a779a0", 979 "renesas,rcar-gen4-scif", "renesas,scif"; 980 reg = <0 0xe6c50000 0 64>; 981 interrupts = <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>; 982 clocks = <&cpg CPG_MOD 704>, 983 <&cpg CPG_CORE R8A779A0_CLK_S1D2>, 984 <&scif_clk>; 985 clock-names = "fck", "brg_int", "scif_clk"; 986 dmas = <&dmac1 0x57>, <&dmac1 0x56>; 987 dma-names = "tx", "rx"; 988 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 989 resets = <&cpg 704>; 990 status = "disabled"; 991 }; 992 993 scif4: serial@e6c40000 { 994 compatible = "renesas,scif-r8a779a0", 995 "renesas,rcar-gen4-scif", "renesas,scif"; 996 reg = <0 0xe6c40000 0 64>; 997 interrupts = <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>; 998 clocks = <&cpg CPG_MOD 705>, 999 <&cpg CPG_CORE R8A779A0_CLK_S1D2>, 1000 <&scif_clk>; 1001 clock-names = "fck", "brg_int", "scif_clk"; 1002 dmas = <&dmac1 0x59>, <&dmac1 0x58>; 1003 dma-names = "tx", "rx"; 1004 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1005 resets = <&cpg 705>; 1006 status = "disabled"; 1007 }; 1008 1009 tpu: pwm@e6e80000 { 1010 compatible = "renesas,tpu-r8a779a0", "renesas,tpu"; 1011 reg = <0 0xe6e80000 0 0x148>; 1012 interrupts = <GIC_SPI 515 IRQ_TYPE_LEVEL_HIGH>; 1013 clocks = <&cpg CPG_MOD 718>; 1014 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1015 resets = <&cpg 718>; 1016 #pwm-cells = <3>; 1017 status = "disabled"; 1018 }; 1019 1020 msiof0: spi@e6e90000 { 1021 compatible = "renesas,msiof-r8a779a0", 1022 "renesas,rcar-gen4-msiof"; 1023 reg = <0 0xe6e90000 0 0x0064>; 1024 interrupts = <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>; 1025 clocks = <&cpg CPG_MOD 618>; 1026 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1027 resets = <&cpg 618>; 1028 dmas = <&dmac1 0x41>, <&dmac1 0x40>; 1029 dma-names = "tx", "rx"; 1030 #address-cells = <1>; 1031 #size-cells = <0>; 1032 status = "disabled"; 1033 }; 1034 1035 msiof1: spi@e6ea0000 { 1036 compatible = "renesas,msiof-r8a779a0", 1037 "renesas,rcar-gen4-msiof"; 1038 reg = <0 0xe6ea0000 0 0x0064>; 1039 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 1040 clocks = <&cpg CPG_MOD 619>; 1041 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1042 resets = <&cpg 619>; 1043 dmas = <&dmac1 0x43>, <&dmac1 0x42>; 1044 dma-names = "tx", "rx"; 1045 #address-cells = <1>; 1046 #size-cells = <0>; 1047 status = "disabled"; 1048 }; 1049 1050 msiof2: spi@e6c00000 { 1051 compatible = "renesas,msiof-r8a779a0", 1052 "renesas,rcar-gen4-msiof"; 1053 reg = <0 0xe6c00000 0 0x0064>; 1054 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>; 1055 clocks = <&cpg CPG_MOD 620>; 1056 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1057 resets = <&cpg 620>; 1058 dmas = <&dmac1 0x45>, <&dmac1 0x44>; 1059 dma-names = "tx", "rx"; 1060 #address-cells = <1>; 1061 #size-cells = <0>; 1062 status = "disabled"; 1063 }; 1064 1065 msiof3: spi@e6c10000 { 1066 compatible = "renesas,msiof-r8a779a0", 1067 "renesas,rcar-gen4-msiof"; 1068 reg = <0 0xe6c10000 0 0x0064>; 1069 interrupts = <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>; 1070 clocks = <&cpg CPG_MOD 621>; 1071 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1072 resets = <&cpg 621>; 1073 dmas = <&dmac1 0x47>, <&dmac1 0x46>; 1074 dma-names = "tx", "rx"; 1075 #address-cells = <1>; 1076 #size-cells = <0>; 1077 status = "disabled"; 1078 }; 1079 1080 msiof4: spi@e6c20000 { 1081 compatible = "renesas,msiof-r8a779a0", 1082 "renesas,rcar-gen4-msiof"; 1083 reg = <0 0xe6c20000 0 0x0064>; 1084 interrupts = <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>; 1085 clocks = <&cpg CPG_MOD 622>; 1086 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1087 resets = <&cpg 622>; 1088 dmas = <&dmac1 0x49>, <&dmac1 0x48>; 1089 dma-names = "tx", "rx"; 1090 #address-cells = <1>; 1091 #size-cells = <0>; 1092 status = "disabled"; 1093 }; 1094 1095 msiof5: spi@e6c28000 { 1096 compatible = "renesas,msiof-r8a779a0", 1097 "renesas,rcar-gen4-msiof"; 1098 reg = <0 0xe6c28000 0 0x0064>; 1099 interrupts = <GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH>; 1100 clocks = <&cpg CPG_MOD 623>; 1101 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1102 resets = <&cpg 623>; 1103 dmas = <&dmac1 0x4b>, <&dmac1 0x4a>; 1104 dma-names = "tx", "rx"; 1105 #address-cells = <1>; 1106 #size-cells = <0>; 1107 status = "disabled"; 1108 }; 1109 1110 vin00: video@e6ef0000 { 1111 compatible = "renesas,vin-r8a779a0"; 1112 reg = <0 0xe6ef0000 0 0x1000>; 1113 interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>; 1114 clocks = <&cpg CPG_MOD 730>; 1115 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1116 resets = <&cpg 730>; 1117 renesas,id = <0>; 1118 status = "disabled"; 1119 1120 ports { 1121 #address-cells = <1>; 1122 #size-cells = <0>; 1123 1124 port@2 { 1125 #address-cells = <1>; 1126 #size-cells = <0>; 1127 1128 reg = <2>; 1129 1130 vin00isp0: endpoint@0 { 1131 reg = <0>; 1132 remote-endpoint = <&isp0vin00>; 1133 }; 1134 }; 1135 }; 1136 }; 1137 1138 vin01: video@e6ef1000 { 1139 compatible = "renesas,vin-r8a779a0"; 1140 reg = <0 0xe6ef1000 0 0x1000>; 1141 interrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 1142 clocks = <&cpg CPG_MOD 731>; 1143 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1144 resets = <&cpg 731>; 1145 renesas,id = <1>; 1146 status = "disabled"; 1147 1148 ports { 1149 #address-cells = <1>; 1150 #size-cells = <0>; 1151 1152 port@2 { 1153 #address-cells = <1>; 1154 #size-cells = <0>; 1155 1156 reg = <2>; 1157 1158 vin01isp0: endpoint@0 { 1159 reg = <0>; 1160 remote-endpoint = <&isp0vin01>; 1161 }; 1162 }; 1163 }; 1164 }; 1165 1166 vin02: video@e6ef2000 { 1167 compatible = "renesas,vin-r8a779a0"; 1168 reg = <0 0xe6ef2000 0 0x1000>; 1169 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>; 1170 clocks = <&cpg CPG_MOD 800>; 1171 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1172 resets = <&cpg 800>; 1173 renesas,id = <2>; 1174 status = "disabled"; 1175 1176 ports { 1177 #address-cells = <1>; 1178 #size-cells = <0>; 1179 1180 port@2 { 1181 #address-cells = <1>; 1182 #size-cells = <0>; 1183 1184 reg = <2>; 1185 1186 vin02isp0: endpoint@0 { 1187 reg = <0>; 1188 remote-endpoint = <&isp0vin02>; 1189 }; 1190 }; 1191 }; 1192 }; 1193 1194 vin03: video@e6ef3000 { 1195 compatible = "renesas,vin-r8a779a0"; 1196 reg = <0 0xe6ef3000 0 0x1000>; 1197 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; 1198 clocks = <&cpg CPG_MOD 801>; 1199 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1200 resets = <&cpg 801>; 1201 renesas,id = <3>; 1202 status = "disabled"; 1203 1204 ports { 1205 #address-cells = <1>; 1206 #size-cells = <0>; 1207 1208 port@2 { 1209 #address-cells = <1>; 1210 #size-cells = <0>; 1211 1212 reg = <2>; 1213 1214 vin03isp0: endpoint@0 { 1215 reg = <0>; 1216 remote-endpoint = <&isp0vin03>; 1217 }; 1218 }; 1219 }; 1220 }; 1221 1222 vin04: video@e6ef4000 { 1223 compatible = "renesas,vin-r8a779a0"; 1224 reg = <0 0xe6ef4000 0 0x1000>; 1225 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 1226 clocks = <&cpg CPG_MOD 802>; 1227 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1228 resets = <&cpg 802>; 1229 renesas,id = <4>; 1230 status = "disabled"; 1231 1232 ports { 1233 #address-cells = <1>; 1234 #size-cells = <0>; 1235 1236 port@2 { 1237 #address-cells = <1>; 1238 #size-cells = <0>; 1239 1240 reg = <2>; 1241 1242 vin04isp0: endpoint@0 { 1243 reg = <0>; 1244 remote-endpoint = <&isp0vin04>; 1245 }; 1246 }; 1247 }; 1248 }; 1249 1250 vin05: video@e6ef5000 { 1251 compatible = "renesas,vin-r8a779a0"; 1252 reg = <0 0xe6ef5000 0 0x1000>; 1253 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 1254 clocks = <&cpg CPG_MOD 803>; 1255 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1256 resets = <&cpg 803>; 1257 renesas,id = <5>; 1258 status = "disabled"; 1259 1260 ports { 1261 #address-cells = <1>; 1262 #size-cells = <0>; 1263 1264 port@2 { 1265 #address-cells = <1>; 1266 #size-cells = <0>; 1267 1268 reg = <2>; 1269 1270 vin05isp0: endpoint@0 { 1271 reg = <0>; 1272 remote-endpoint = <&isp0vin05>; 1273 }; 1274 }; 1275 }; 1276 }; 1277 1278 vin06: video@e6ef6000 { 1279 compatible = "renesas,vin-r8a779a0"; 1280 reg = <0 0xe6ef6000 0 0x1000>; 1281 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 1282 clocks = <&cpg CPG_MOD 804>; 1283 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1284 resets = <&cpg 804>; 1285 renesas,id = <6>; 1286 status = "disabled"; 1287 1288 ports { 1289 #address-cells = <1>; 1290 #size-cells = <0>; 1291 1292 port@2 { 1293 #address-cells = <1>; 1294 #size-cells = <0>; 1295 1296 reg = <2>; 1297 1298 vin06isp0: endpoint@0 { 1299 reg = <0>; 1300 remote-endpoint = <&isp0vin06>; 1301 }; 1302 }; 1303 }; 1304 }; 1305 1306 vin07: video@e6ef7000 { 1307 compatible = "renesas,vin-r8a779a0"; 1308 reg = <0 0xe6ef7000 0 0x1000>; 1309 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 1310 clocks = <&cpg CPG_MOD 805>; 1311 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1312 resets = <&cpg 805>; 1313 renesas,id = <7>; 1314 status = "disabled"; 1315 1316 ports { 1317 #address-cells = <1>; 1318 #size-cells = <0>; 1319 1320 port@2 { 1321 #address-cells = <1>; 1322 #size-cells = <0>; 1323 1324 reg = <2>; 1325 1326 vin07isp0: endpoint@0 { 1327 reg = <0>; 1328 remote-endpoint = <&isp0vin07>; 1329 }; 1330 }; 1331 }; 1332 }; 1333 1334 vin08: video@e6ef8000 { 1335 compatible = "renesas,vin-r8a779a0"; 1336 reg = <0 0xe6ef8000 0 0x1000>; 1337 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 1338 clocks = <&cpg CPG_MOD 806>; 1339 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1340 resets = <&cpg 806>; 1341 renesas,id = <8>; 1342 status = "disabled"; 1343 1344 ports { 1345 #address-cells = <1>; 1346 #size-cells = <0>; 1347 1348 port@2 { 1349 #address-cells = <1>; 1350 #size-cells = <0>; 1351 1352 reg = <2>; 1353 1354 vin08isp1: endpoint@1 { 1355 reg = <1>; 1356 remote-endpoint = <&isp1vin08>; 1357 }; 1358 }; 1359 }; 1360 }; 1361 1362 vin09: video@e6ef9000 { 1363 compatible = "renesas,vin-r8a779a0"; 1364 reg = <0 0xe6ef9000 0 0x1000>; 1365 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; 1366 clocks = <&cpg CPG_MOD 807>; 1367 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1368 resets = <&cpg 807>; 1369 renesas,id = <9>; 1370 status = "disabled"; 1371 1372 ports { 1373 #address-cells = <1>; 1374 #size-cells = <0>; 1375 1376 port@2 { 1377 #address-cells = <1>; 1378 #size-cells = <0>; 1379 1380 reg = <2>; 1381 1382 vin09isp1: endpoint@1 { 1383 reg = <1>; 1384 remote-endpoint = <&isp1vin09>; 1385 }; 1386 }; 1387 }; 1388 }; 1389 1390 vin10: video@e6efa000 { 1391 compatible = "renesas,vin-r8a779a0"; 1392 reg = <0 0xe6efa000 0 0x1000>; 1393 interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>; 1394 clocks = <&cpg CPG_MOD 808>; 1395 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1396 resets = <&cpg 808>; 1397 renesas,id = <10>; 1398 status = "disabled"; 1399 1400 ports { 1401 #address-cells = <1>; 1402 #size-cells = <0>; 1403 1404 port@2 { 1405 #address-cells = <1>; 1406 #size-cells = <0>; 1407 1408 reg = <2>; 1409 1410 vin10isp1: endpoint@1 { 1411 reg = <1>; 1412 remote-endpoint = <&isp1vin10>; 1413 }; 1414 }; 1415 }; 1416 }; 1417 1418 vin11: video@e6efb000 { 1419 compatible = "renesas,vin-r8a779a0"; 1420 reg = <0 0xe6efb000 0 0x1000>; 1421 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; 1422 clocks = <&cpg CPG_MOD 809>; 1423 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1424 resets = <&cpg 809>; 1425 renesas,id = <11>; 1426 status = "disabled"; 1427 1428 ports { 1429 #address-cells = <1>; 1430 #size-cells = <0>; 1431 1432 port@2 { 1433 #address-cells = <1>; 1434 #size-cells = <0>; 1435 1436 reg = <2>; 1437 1438 vin11isp1: endpoint@1 { 1439 reg = <1>; 1440 remote-endpoint = <&isp1vin11>; 1441 }; 1442 }; 1443 }; 1444 }; 1445 1446 vin12: video@e6efc000 { 1447 compatible = "renesas,vin-r8a779a0"; 1448 reg = <0 0xe6efc000 0 0x1000>; 1449 interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>; 1450 clocks = <&cpg CPG_MOD 810>; 1451 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1452 resets = <&cpg 810>; 1453 renesas,id = <12>; 1454 status = "disabled"; 1455 1456 ports { 1457 #address-cells = <1>; 1458 #size-cells = <0>; 1459 1460 port@2 { 1461 #address-cells = <1>; 1462 #size-cells = <0>; 1463 1464 reg = <2>; 1465 1466 vin12isp1: endpoint@1 { 1467 reg = <1>; 1468 remote-endpoint = <&isp1vin12>; 1469 }; 1470 }; 1471 }; 1472 }; 1473 1474 vin13: video@e6efd000 { 1475 compatible = "renesas,vin-r8a779a0"; 1476 reg = <0 0xe6efd000 0 0x1000>; 1477 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 1478 clocks = <&cpg CPG_MOD 811>; 1479 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1480 resets = <&cpg 811>; 1481 renesas,id = <13>; 1482 status = "disabled"; 1483 1484 ports { 1485 #address-cells = <1>; 1486 #size-cells = <0>; 1487 1488 port@2 { 1489 #address-cells = <1>; 1490 #size-cells = <0>; 1491 1492 reg = <2>; 1493 1494 vin13isp1: endpoint@1 { 1495 reg = <1>; 1496 remote-endpoint = <&isp1vin13>; 1497 }; 1498 }; 1499 }; 1500 }; 1501 1502 vin14: video@e6efe000 { 1503 compatible = "renesas,vin-r8a779a0"; 1504 reg = <0 0xe6efe000 0 0x1000>; 1505 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 1506 clocks = <&cpg CPG_MOD 812>; 1507 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1508 resets = <&cpg 812>; 1509 renesas,id = <14>; 1510 status = "disabled"; 1511 1512 ports { 1513 #address-cells = <1>; 1514 #size-cells = <0>; 1515 1516 port@2 { 1517 #address-cells = <1>; 1518 #size-cells = <0>; 1519 1520 reg = <2>; 1521 1522 vin14isp1: endpoint@1 { 1523 reg = <1>; 1524 remote-endpoint = <&isp1vin14>; 1525 }; 1526 }; 1527 }; 1528 }; 1529 1530 vin15: video@e6eff000 { 1531 compatible = "renesas,vin-r8a779a0"; 1532 reg = <0 0xe6eff000 0 0x1000>; 1533 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 1534 clocks = <&cpg CPG_MOD 813>; 1535 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1536 resets = <&cpg 813>; 1537 renesas,id = <15>; 1538 status = "disabled"; 1539 1540 ports { 1541 #address-cells = <1>; 1542 #size-cells = <0>; 1543 1544 port@2 { 1545 #address-cells = <1>; 1546 #size-cells = <0>; 1547 1548 reg = <2>; 1549 1550 vin15isp1: endpoint@1 { 1551 reg = <1>; 1552 remote-endpoint = <&isp1vin15>; 1553 }; 1554 }; 1555 }; 1556 }; 1557 1558 vin16: video@e6ed0000 { 1559 compatible = "renesas,vin-r8a779a0"; 1560 reg = <0 0xe6ed0000 0 0x1000>; 1561 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; 1562 clocks = <&cpg CPG_MOD 814>; 1563 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1564 resets = <&cpg 814>; 1565 renesas,id = <16>; 1566 status = "disabled"; 1567 1568 ports { 1569 #address-cells = <1>; 1570 #size-cells = <0>; 1571 1572 port@2 { 1573 #address-cells = <1>; 1574 #size-cells = <0>; 1575 1576 reg = <2>; 1577 1578 vin16isp2: endpoint@2 { 1579 reg = <2>; 1580 remote-endpoint = <&isp2vin16>; 1581 }; 1582 }; 1583 }; 1584 }; 1585 1586 vin17: video@e6ed1000 { 1587 compatible = "renesas,vin-r8a779a0"; 1588 reg = <0 0xe6ed1000 0 0x1000>; 1589 interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>; 1590 clocks = <&cpg CPG_MOD 815>; 1591 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1592 resets = <&cpg 815>; 1593 renesas,id = <17>; 1594 status = "disabled"; 1595 1596 ports { 1597 #address-cells = <1>; 1598 #size-cells = <0>; 1599 1600 port@2 { 1601 #address-cells = <1>; 1602 #size-cells = <0>; 1603 1604 reg = <2>; 1605 1606 vin17isp2: endpoint@2 { 1607 reg = <2>; 1608 remote-endpoint = <&isp2vin17>; 1609 }; 1610 }; 1611 }; 1612 }; 1613 1614 vin18: video@e6ed2000 { 1615 compatible = "renesas,vin-r8a779a0"; 1616 reg = <0 0xe6ed2000 0 0x1000>; 1617 interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>; 1618 clocks = <&cpg CPG_MOD 816>; 1619 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1620 resets = <&cpg 816>; 1621 renesas,id = <18>; 1622 status = "disabled"; 1623 1624 ports { 1625 #address-cells = <1>; 1626 #size-cells = <0>; 1627 1628 port@2 { 1629 #address-cells = <1>; 1630 #size-cells = <0>; 1631 1632 reg = <2>; 1633 1634 vin18isp2: endpoint@2 { 1635 reg = <2>; 1636 remote-endpoint = <&isp2vin18>; 1637 }; 1638 }; 1639 }; 1640 }; 1641 1642 vin19: video@e6ed3000 { 1643 compatible = "renesas,vin-r8a779a0"; 1644 reg = <0 0xe6ed3000 0 0x1000>; 1645 interrupts = <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>; 1646 clocks = <&cpg CPG_MOD 817>; 1647 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1648 resets = <&cpg 817>; 1649 renesas,id = <19>; 1650 status = "disabled"; 1651 1652 ports { 1653 #address-cells = <1>; 1654 #size-cells = <0>; 1655 1656 port@2 { 1657 #address-cells = <1>; 1658 #size-cells = <0>; 1659 1660 reg = <2>; 1661 1662 vin19isp2: endpoint@2 { 1663 reg = <2>; 1664 remote-endpoint = <&isp2vin19>; 1665 }; 1666 }; 1667 }; 1668 }; 1669 1670 vin20: video@e6ed4000 { 1671 compatible = "renesas,vin-r8a779a0"; 1672 reg = <0 0xe6ed4000 0 0x1000>; 1673 interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>; 1674 clocks = <&cpg CPG_MOD 818>; 1675 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1676 resets = <&cpg 818>; 1677 renesas,id = <20>; 1678 status = "disabled"; 1679 1680 ports { 1681 #address-cells = <1>; 1682 #size-cells = <0>; 1683 1684 port@2 { 1685 #address-cells = <1>; 1686 #size-cells = <0>; 1687 1688 reg = <2>; 1689 1690 vin20isp2: endpoint@2 { 1691 reg = <2>; 1692 remote-endpoint = <&isp2vin20>; 1693 }; 1694 }; 1695 }; 1696 }; 1697 1698 vin21: video@e6ed5000 { 1699 compatible = "renesas,vin-r8a779a0"; 1700 reg = <0 0xe6ed5000 0 0x1000>; 1701 interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>; 1702 clocks = <&cpg CPG_MOD 819>; 1703 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1704 resets = <&cpg 819>; 1705 renesas,id = <21>; 1706 status = "disabled"; 1707 1708 ports { 1709 #address-cells = <1>; 1710 #size-cells = <0>; 1711 1712 port@2 { 1713 #address-cells = <1>; 1714 #size-cells = <0>; 1715 1716 reg = <2>; 1717 1718 vin21isp2: endpoint@2 { 1719 reg = <2>; 1720 remote-endpoint = <&isp2vin21>; 1721 }; 1722 }; 1723 }; 1724 }; 1725 1726 vin22: video@e6ed6000 { 1727 compatible = "renesas,vin-r8a779a0"; 1728 reg = <0 0xe6ed6000 0 0x1000>; 1729 interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>; 1730 clocks = <&cpg CPG_MOD 820>; 1731 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1732 resets = <&cpg 820>; 1733 renesas,id = <22>; 1734 status = "disabled"; 1735 1736 ports { 1737 #address-cells = <1>; 1738 #size-cells = <0>; 1739 1740 port@2 { 1741 #address-cells = <1>; 1742 #size-cells = <0>; 1743 1744 reg = <2>; 1745 1746 vin22isp2: endpoint@2 { 1747 reg = <2>; 1748 remote-endpoint = <&isp2vin22>; 1749 }; 1750 }; 1751 }; 1752 }; 1753 1754 vin23: video@e6ed7000 { 1755 compatible = "renesas,vin-r8a779a0"; 1756 reg = <0 0xe6ed7000 0 0x1000>; 1757 interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>; 1758 clocks = <&cpg CPG_MOD 821>; 1759 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1760 resets = <&cpg 821>; 1761 renesas,id = <23>; 1762 status = "disabled"; 1763 1764 ports { 1765 #address-cells = <1>; 1766 #size-cells = <0>; 1767 1768 port@2 { 1769 #address-cells = <1>; 1770 #size-cells = <0>; 1771 1772 reg = <2>; 1773 1774 vin23isp2: endpoint@2 { 1775 reg = <2>; 1776 remote-endpoint = <&isp2vin23>; 1777 }; 1778 }; 1779 }; 1780 }; 1781 1782 vin24: video@e6ed8000 { 1783 compatible = "renesas,vin-r8a779a0"; 1784 reg = <0 0xe6ed8000 0 0x1000>; 1785 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 1786 clocks = <&cpg CPG_MOD 822>; 1787 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1788 resets = <&cpg 822>; 1789 renesas,id = <24>; 1790 status = "disabled"; 1791 1792 ports { 1793 #address-cells = <1>; 1794 #size-cells = <0>; 1795 1796 port@2 { 1797 #address-cells = <1>; 1798 #size-cells = <0>; 1799 1800 reg = <2>; 1801 1802 vin24isp3: endpoint@3 { 1803 reg = <3>; 1804 remote-endpoint = <&isp3vin24>; 1805 }; 1806 }; 1807 }; 1808 }; 1809 1810 vin25: video@e6ed9000 { 1811 compatible = "renesas,vin-r8a779a0"; 1812 reg = <0 0xe6ed9000 0 0x1000>; 1813 interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>; 1814 clocks = <&cpg CPG_MOD 823>; 1815 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1816 resets = <&cpg 823>; 1817 renesas,id = <25>; 1818 status = "disabled"; 1819 1820 ports { 1821 #address-cells = <1>; 1822 #size-cells = <0>; 1823 1824 port@2 { 1825 #address-cells = <1>; 1826 #size-cells = <0>; 1827 1828 reg = <2>; 1829 1830 vin25isp3: endpoint@3 { 1831 reg = <3>; 1832 remote-endpoint = <&isp3vin25>; 1833 }; 1834 }; 1835 }; 1836 }; 1837 1838 vin26: video@e6eda000 { 1839 compatible = "renesas,vin-r8a779a0"; 1840 reg = <0 0xe6eda000 0 0x1000>; 1841 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 1842 clocks = <&cpg CPG_MOD 824>; 1843 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1844 resets = <&cpg 824>; 1845 renesas,id = <26>; 1846 status = "disabled"; 1847 1848 ports { 1849 #address-cells = <1>; 1850 #size-cells = <0>; 1851 1852 port@2 { 1853 #address-cells = <1>; 1854 #size-cells = <0>; 1855 1856 reg = <2>; 1857 1858 vin26isp3: endpoint@3 { 1859 reg = <3>; 1860 remote-endpoint = <&isp3vin26>; 1861 }; 1862 }; 1863 }; 1864 }; 1865 1866 vin27: video@e6edb000 { 1867 compatible = "renesas,vin-r8a779a0"; 1868 reg = <0 0xe6edb000 0 0x1000>; 1869 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 1870 clocks = <&cpg CPG_MOD 825>; 1871 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1872 resets = <&cpg 825>; 1873 renesas,id = <27>; 1874 status = "disabled"; 1875 1876 ports { 1877 #address-cells = <1>; 1878 #size-cells = <0>; 1879 1880 port@2 { 1881 #address-cells = <1>; 1882 #size-cells = <0>; 1883 1884 reg = <2>; 1885 1886 vin27isp3: endpoint@3 { 1887 reg = <3>; 1888 remote-endpoint = <&isp3vin27>; 1889 }; 1890 }; 1891 }; 1892 }; 1893 1894 vin28: video@e6edc000 { 1895 compatible = "renesas,vin-r8a779a0"; 1896 reg = <0 0xe6edc000 0 0x1000>; 1897 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 1898 clocks = <&cpg CPG_MOD 826>; 1899 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1900 resets = <&cpg 826>; 1901 renesas,id = <28>; 1902 status = "disabled"; 1903 1904 ports { 1905 #address-cells = <1>; 1906 #size-cells = <0>; 1907 1908 port@2 { 1909 #address-cells = <1>; 1910 #size-cells = <0>; 1911 1912 reg = <2>; 1913 1914 vin28isp3: endpoint@3 { 1915 reg = <3>; 1916 remote-endpoint = <&isp3vin28>; 1917 }; 1918 }; 1919 }; 1920 }; 1921 1922 vin29: video@e6edd000 { 1923 compatible = "renesas,vin-r8a779a0"; 1924 reg = <0 0xe6edd000 0 0x1000>; 1925 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 1926 clocks = <&cpg CPG_MOD 827>; 1927 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1928 resets = <&cpg 827>; 1929 renesas,id = <29>; 1930 status = "disabled"; 1931 1932 ports { 1933 #address-cells = <1>; 1934 #size-cells = <0>; 1935 1936 port@2 { 1937 #address-cells = <1>; 1938 #size-cells = <0>; 1939 1940 reg = <2>; 1941 1942 vin29isp3: endpoint@3 { 1943 reg = <3>; 1944 remote-endpoint = <&isp3vin29>; 1945 }; 1946 }; 1947 }; 1948 }; 1949 1950 vin30: video@e6ede000 { 1951 compatible = "renesas,vin-r8a779a0"; 1952 reg = <0 0xe6ede000 0 0x1000>; 1953 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; 1954 clocks = <&cpg CPG_MOD 828>; 1955 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1956 resets = <&cpg 828>; 1957 renesas,id = <30>; 1958 status = "disabled"; 1959 1960 ports { 1961 #address-cells = <1>; 1962 #size-cells = <0>; 1963 1964 port@2 { 1965 #address-cells = <1>; 1966 #size-cells = <0>; 1967 1968 reg = <2>; 1969 1970 vin30isp3: endpoint@3 { 1971 reg = <3>; 1972 remote-endpoint = <&isp3vin30>; 1973 }; 1974 }; 1975 }; 1976 }; 1977 1978 vin31: video@e6edf000 { 1979 compatible = "renesas,vin-r8a779a0"; 1980 reg = <0 0xe6edf000 0 0x1000>; 1981 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; 1982 clocks = <&cpg CPG_MOD 829>; 1983 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1984 resets = <&cpg 829>; 1985 renesas,id = <31>; 1986 status = "disabled"; 1987 1988 ports { 1989 #address-cells = <1>; 1990 #size-cells = <0>; 1991 1992 port@2 { 1993 #address-cells = <1>; 1994 #size-cells = <0>; 1995 1996 reg = <2>; 1997 1998 vin31isp3: endpoint@3 { 1999 reg = <3>; 2000 remote-endpoint = <&isp3vin31>; 2001 }; 2002 }; 2003 }; 2004 }; 2005 2006 dmac1: dma-controller@e7350000 { 2007 compatible = "renesas,dmac-r8a779a0", 2008 "renesas,rcar-gen4-dmac"; 2009 reg = <0 0xe7350000 0 0x1000>, 2010 <0 0xe7300000 0 0x10000>; 2011 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, 2012 <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>, 2013 <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, 2014 <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, 2015 <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>, 2016 <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>, 2017 <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>, 2018 <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>, 2019 <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 2020 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 2021 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 2022 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 2023 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 2024 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 2025 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 2026 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 2027 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; 2028 interrupt-names = "error", 2029 "ch0", "ch1", "ch2", "ch3", "ch4", 2030 "ch5", "ch6", "ch7", "ch8", "ch9", 2031 "ch10", "ch11", "ch12", "ch13", 2032 "ch14", "ch15"; 2033 clocks = <&cpg CPG_MOD 709>; 2034 clock-names = "fck"; 2035 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2036 resets = <&cpg 709>; 2037 #dma-cells = <1>; 2038 dma-channels = <16>; 2039 }; 2040 2041 dmac2: dma-controller@e7351000 { 2042 compatible = "renesas,dmac-r8a779a0", 2043 "renesas,rcar-gen4-dmac"; 2044 reg = <0 0xe7351000 0 0x1000>, 2045 <0 0xe7310000 0 0x10000>; 2046 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, 2047 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 2048 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 2049 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 2050 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 2051 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 2052 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 2053 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 2054 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; 2055 interrupt-names = "error", 2056 "ch0", "ch1", "ch2", "ch3", "ch4", 2057 "ch5", "ch6", "ch7"; 2058 clocks = <&cpg CPG_MOD 710>; 2059 clock-names = "fck"; 2060 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2061 resets = <&cpg 710>; 2062 #dma-cells = <1>; 2063 dma-channels = <8>; 2064 }; 2065 2066 mmc0: mmc@ee140000 { 2067 compatible = "renesas,sdhi-r8a779a0", 2068 "renesas,rcar-gen4-sdhi"; 2069 reg = <0 0xee140000 0 0x2000>; 2070 interrupts = <GIC_SPI 236 IRQ_TYPE_LEVEL_HIGH>; 2071 clocks = <&cpg CPG_MOD 706>, <&cpg CPG_CORE R8A779A0_CLK_SD0H>; 2072 clock-names = "core", "clkh"; 2073 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2074 resets = <&cpg 706>; 2075 max-frequency = <200000000>; 2076 iommus = <&ipmmu_ds0 32>; 2077 status = "disabled"; 2078 }; 2079 2080 rpc: spi@ee200000 { 2081 compatible = "renesas,r8a779a0-rpc-if", 2082 "renesas,rcar-gen3-rpc-if"; 2083 reg = <0 0xee200000 0 0x200>, 2084 <0 0x08000000 0 0x04000000>, 2085 <0 0xee208000 0 0x100>; 2086 reg-names = "regs", "dirmap", "wbuf"; 2087 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>; 2088 clocks = <&cpg CPG_MOD 629>; 2089 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2090 resets = <&cpg 629>; 2091 #address-cells = <1>; 2092 #size-cells = <0>; 2093 status = "disabled"; 2094 }; 2095 2096 ipmmu_rt0: iommu@ee480000 { 2097 compatible = "renesas,ipmmu-r8a779a0", 2098 "renesas,rcar-gen4-ipmmu-vmsa"; 2099 reg = <0 0xee480000 0 0x20000>; 2100 renesas,ipmmu-main = <&ipmmu_mm 10>; 2101 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2102 #iommu-cells = <1>; 2103 }; 2104 2105 ipmmu_rt1: iommu@ee4c0000 { 2106 compatible = "renesas,ipmmu-r8a779a0", 2107 "renesas,rcar-gen4-ipmmu-vmsa"; 2108 reg = <0 0xee4c0000 0 0x20000>; 2109 renesas,ipmmu-main = <&ipmmu_mm 19>; 2110 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2111 #iommu-cells = <1>; 2112 }; 2113 2114 ipmmu_ds0: iommu@eed00000 { 2115 compatible = "renesas,ipmmu-r8a779a0", 2116 "renesas,rcar-gen4-ipmmu-vmsa"; 2117 reg = <0 0xeed00000 0 0x20000>; 2118 renesas,ipmmu-main = <&ipmmu_mm 0>; 2119 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2120 #iommu-cells = <1>; 2121 }; 2122 2123 ipmmu_ds1: iommu@eed40000 { 2124 compatible = "renesas,ipmmu-r8a779a0", 2125 "renesas,rcar-gen4-ipmmu-vmsa"; 2126 reg = <0 0xeed40000 0 0x20000>; 2127 renesas,ipmmu-main = <&ipmmu_mm 1>; 2128 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2129 #iommu-cells = <1>; 2130 }; 2131 2132 ipmmu_ir: iommu@eed80000 { 2133 compatible = "renesas,ipmmu-r8a779a0", 2134 "renesas,rcar-gen4-ipmmu-vmsa"; 2135 reg = <0 0xeed80000 0 0x20000>; 2136 renesas,ipmmu-main = <&ipmmu_mm 3>; 2137 power-domains = <&sysc R8A779A0_PD_A3IR>; 2138 #iommu-cells = <1>; 2139 }; 2140 2141 ipmmu_vc0: iommu@eedc0000 { 2142 compatible = "renesas,ipmmu-r8a779a0", 2143 "renesas,rcar-gen4-ipmmu-vmsa"; 2144 reg = <0 0xeedc0000 0 0x20000>; 2145 renesas,ipmmu-main = <&ipmmu_mm 12>; 2146 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2147 #iommu-cells = <1>; 2148 }; 2149 2150 ipmmu_vi0: iommu@eee80000 { 2151 compatible = "renesas,ipmmu-r8a779a0", 2152 "renesas,rcar-gen4-ipmmu-vmsa"; 2153 reg = <0 0xeee80000 0 0x20000>; 2154 renesas,ipmmu-main = <&ipmmu_mm 14>; 2155 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2156 #iommu-cells = <1>; 2157 }; 2158 2159 ipmmu_vi1: iommu@eeec0000 { 2160 compatible = "renesas,ipmmu-r8a779a0", 2161 "renesas,rcar-gen4-ipmmu-vmsa"; 2162 reg = <0 0xeeec0000 0 0x20000>; 2163 renesas,ipmmu-main = <&ipmmu_mm 15>; 2164 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2165 #iommu-cells = <1>; 2166 }; 2167 2168 ipmmu_3dg: iommu@eee00000 { 2169 compatible = "renesas,ipmmu-r8a779a0", 2170 "renesas,rcar-gen4-ipmmu-vmsa"; 2171 reg = <0 0xeee00000 0 0x20000>; 2172 renesas,ipmmu-main = <&ipmmu_mm 6>; 2173 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2174 #iommu-cells = <1>; 2175 }; 2176 2177 ipmmu_vip0: iommu@eef00000 { 2178 compatible = "renesas,ipmmu-r8a779a0", 2179 "renesas,rcar-gen4-ipmmu-vmsa"; 2180 reg = <0 0xeef00000 0 0x20000>; 2181 renesas,ipmmu-main = <&ipmmu_mm 5>; 2182 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2183 #iommu-cells = <1>; 2184 }; 2185 2186 ipmmu_vip1: iommu@eef40000 { 2187 compatible = "renesas,ipmmu-r8a779a0", 2188 "renesas,rcar-gen4-ipmmu-vmsa"; 2189 reg = <0 0xeef40000 0 0x20000>; 2190 renesas,ipmmu-main = <&ipmmu_mm 11>; 2191 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2192 #iommu-cells = <1>; 2193 }; 2194 2195 ipmmu_mm: iommu@eefc0000 { 2196 compatible = "renesas,ipmmu-r8a779a0", 2197 "renesas,rcar-gen4-ipmmu-vmsa"; 2198 reg = <0 0xeefc0000 0 0x20000>; 2199 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>, 2200 <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; 2201 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2202 #iommu-cells = <1>; 2203 }; 2204 2205 gic: interrupt-controller@f1000000 { 2206 compatible = "arm,gic-v3"; 2207 #interrupt-cells = <3>; 2208 #address-cells = <0>; 2209 interrupt-controller; 2210 reg = <0x0 0xf1000000 0 0x20000>, 2211 <0x0 0xf1060000 0 0x110000>; 2212 interrupts = <GIC_PPI 9 2213 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>; 2214 }; 2215 2216 fcpvd0: fcp@fea10000 { 2217 compatible = "renesas,fcpv"; 2218 reg = <0 0xfea10000 0 0x200>; 2219 clocks = <&cpg CPG_MOD 508>; 2220 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2221 resets = <&cpg 508>; 2222 }; 2223 2224 fcpvd1: fcp@fea11000 { 2225 compatible = "renesas,fcpv"; 2226 reg = <0 0xfea11000 0 0x200>; 2227 clocks = <&cpg CPG_MOD 509>; 2228 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2229 resets = <&cpg 509>; 2230 }; 2231 2232 vspd0: vsp@fea20000 { 2233 compatible = "renesas,vsp2"; 2234 reg = <0 0xfea20000 0 0x5000>; 2235 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>; 2236 clocks = <&cpg CPG_MOD 830>; 2237 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2238 resets = <&cpg 830>; 2239 2240 renesas,fcp = <&fcpvd0>; 2241 }; 2242 2243 vspd1: vsp@fea28000 { 2244 compatible = "renesas,vsp2"; 2245 reg = <0 0xfea28000 0 0x5000>; 2246 interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>; 2247 clocks = <&cpg CPG_MOD 831>; 2248 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2249 resets = <&cpg 831>; 2250 2251 renesas,fcp = <&fcpvd1>; 2252 }; 2253 2254 csi40: csi2@feaa0000 { 2255 compatible = "renesas,r8a779a0-csi2"; 2256 reg = <0 0xfeaa0000 0 0x10000>; 2257 interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>; 2258 clocks = <&cpg CPG_MOD 331>; 2259 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2260 resets = <&cpg 331>; 2261 status = "disabled"; 2262 2263 ports { 2264 #address-cells = <1>; 2265 #size-cells = <0>; 2266 2267 port@0 { 2268 reg = <0>; 2269 }; 2270 2271 port@1 { 2272 reg = <1>; 2273 csi40isp0: endpoint { 2274 remote-endpoint = <&isp0csi40>; 2275 }; 2276 }; 2277 }; 2278 }; 2279 2280 csi41: csi2@feab0000 { 2281 compatible = "renesas,r8a779a0-csi2"; 2282 reg = <0 0xfeab0000 0 0x10000>; 2283 interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>; 2284 clocks = <&cpg CPG_MOD 400>; 2285 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2286 resets = <&cpg 400>; 2287 status = "disabled"; 2288 2289 ports { 2290 #address-cells = <1>; 2291 #size-cells = <0>; 2292 2293 port@0 { 2294 reg = <0>; 2295 }; 2296 2297 port@1 { 2298 reg = <1>; 2299 csi41isp1: endpoint { 2300 remote-endpoint = <&isp1csi41>; 2301 }; 2302 }; 2303 }; 2304 }; 2305 2306 csi42: csi2@fed60000 { 2307 compatible = "renesas,r8a779a0-csi2"; 2308 reg = <0 0xfed60000 0 0x10000>; 2309 interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>; 2310 clocks = <&cpg CPG_MOD 401>; 2311 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2312 resets = <&cpg 401>; 2313 status = "disabled"; 2314 2315 ports { 2316 #address-cells = <1>; 2317 #size-cells = <0>; 2318 2319 port@0 { 2320 reg = <0>; 2321 }; 2322 2323 port@1 { 2324 reg = <1>; 2325 csi42isp2: endpoint { 2326 remote-endpoint = <&isp2csi42>; 2327 }; 2328 }; 2329 }; 2330 }; 2331 2332 csi43: csi2@fed70000 { 2333 compatible = "renesas,r8a779a0-csi2"; 2334 reg = <0 0xfed70000 0 0x10000>; 2335 interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>; 2336 clocks = <&cpg CPG_MOD 402>; 2337 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2338 resets = <&cpg 402>; 2339 status = "disabled"; 2340 2341 ports { 2342 #address-cells = <1>; 2343 #size-cells = <0>; 2344 2345 port@0 { 2346 reg = <0>; 2347 }; 2348 2349 port@1 { 2350 reg = <1>; 2351 csi43isp3: endpoint { 2352 remote-endpoint = <&isp3csi43>; 2353 }; 2354 }; 2355 }; 2356 }; 2357 2358 du: display@feb00000 { 2359 compatible = "renesas,du-r8a779a0"; 2360 reg = <0 0xfeb00000 0 0x40000>; 2361 interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>, 2362 <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 2363 clocks = <&cpg CPG_MOD 411>; 2364 clock-names = "du.0"; 2365 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2366 resets = <&cpg 411>; 2367 reset-names = "du.0"; 2368 renesas,vsps = <&vspd0 0>, <&vspd1 0>; 2369 2370 status = "disabled"; 2371 2372 ports { 2373 #address-cells = <1>; 2374 #size-cells = <0>; 2375 2376 port@0 { 2377 reg = <0>; 2378 du_out_dsi0: endpoint { 2379 remote-endpoint = <&dsi0_in>; 2380 }; 2381 }; 2382 2383 port@1 { 2384 reg = <1>; 2385 du_out_dsi1: endpoint { 2386 remote-endpoint = <&dsi1_in>; 2387 }; 2388 }; 2389 }; 2390 }; 2391 2392 isp0: isp@fed00000 { 2393 compatible = "renesas,r8a779a0-isp"; 2394 reg = <0 0xfed00000 0 0x10000>; 2395 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 2396 clocks = <&cpg CPG_MOD 612>; 2397 power-domains = <&sysc R8A779A0_PD_A3ISP01>; 2398 resets = <&cpg 612>; 2399 status = "disabled"; 2400 2401 ports { 2402 #address-cells = <1>; 2403 #size-cells = <0>; 2404 2405 port@0 { 2406 #address-cells = <1>; 2407 #size-cells = <0>; 2408 2409 reg = <0>; 2410 2411 isp0csi40: endpoint@0 { 2412 reg = <0>; 2413 remote-endpoint = <&csi40isp0>; 2414 }; 2415 }; 2416 2417 port@1 { 2418 reg = <1>; 2419 isp0vin00: endpoint { 2420 remote-endpoint = <&vin00isp0>; 2421 }; 2422 }; 2423 2424 port@2 { 2425 reg = <2>; 2426 isp0vin01: endpoint { 2427 remote-endpoint = <&vin01isp0>; 2428 }; 2429 }; 2430 2431 port@3 { 2432 reg = <3>; 2433 isp0vin02: endpoint { 2434 remote-endpoint = <&vin02isp0>; 2435 }; 2436 }; 2437 2438 port@4 { 2439 reg = <4>; 2440 isp0vin03: endpoint { 2441 remote-endpoint = <&vin03isp0>; 2442 }; 2443 }; 2444 2445 port@5 { 2446 reg = <5>; 2447 isp0vin04: endpoint { 2448 remote-endpoint = <&vin04isp0>; 2449 }; 2450 }; 2451 2452 port@6 { 2453 reg = <6>; 2454 isp0vin05: endpoint { 2455 remote-endpoint = <&vin05isp0>; 2456 }; 2457 }; 2458 2459 port@7 { 2460 reg = <7>; 2461 isp0vin06: endpoint { 2462 remote-endpoint = <&vin06isp0>; 2463 }; 2464 }; 2465 2466 port@8 { 2467 reg = <8>; 2468 isp0vin07: endpoint { 2469 remote-endpoint = <&vin07isp0>; 2470 }; 2471 }; 2472 }; 2473 }; 2474 2475 isp1: isp@fed20000 { 2476 compatible = "renesas,r8a779a0-isp"; 2477 reg = <0 0xfed20000 0 0x10000>; 2478 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 2479 clocks = <&cpg CPG_MOD 613>; 2480 power-domains = <&sysc R8A779A0_PD_A3ISP01>; 2481 resets = <&cpg 613>; 2482 status = "disabled"; 2483 2484 ports { 2485 #address-cells = <1>; 2486 #size-cells = <0>; 2487 2488 port@0 { 2489 #address-cells = <1>; 2490 #size-cells = <0>; 2491 2492 reg = <0>; 2493 2494 isp1csi41: endpoint@1 { 2495 reg = <1>; 2496 remote-endpoint = <&csi41isp1>; 2497 }; 2498 }; 2499 2500 port@1 { 2501 reg = <1>; 2502 isp1vin08: endpoint { 2503 remote-endpoint = <&vin08isp1>; 2504 }; 2505 }; 2506 2507 port@2 { 2508 reg = <2>; 2509 isp1vin09: endpoint { 2510 remote-endpoint = <&vin09isp1>; 2511 }; 2512 }; 2513 2514 port@3 { 2515 reg = <3>; 2516 isp1vin10: endpoint { 2517 remote-endpoint = <&vin10isp1>; 2518 }; 2519 }; 2520 2521 port@4 { 2522 reg = <4>; 2523 isp1vin11: endpoint { 2524 remote-endpoint = <&vin11isp1>; 2525 }; 2526 }; 2527 2528 port@5 { 2529 reg = <5>; 2530 isp1vin12: endpoint { 2531 remote-endpoint = <&vin12isp1>; 2532 }; 2533 }; 2534 2535 port@6 { 2536 reg = <6>; 2537 isp1vin13: endpoint { 2538 remote-endpoint = <&vin13isp1>; 2539 }; 2540 }; 2541 2542 port@7 { 2543 reg = <7>; 2544 isp1vin14: endpoint { 2545 remote-endpoint = <&vin14isp1>; 2546 }; 2547 }; 2548 2549 port@8 { 2550 reg = <8>; 2551 isp1vin15: endpoint { 2552 remote-endpoint = <&vin15isp1>; 2553 }; 2554 }; 2555 }; 2556 }; 2557 2558 isp2: isp@fed30000 { 2559 compatible = "renesas,r8a779a0-isp"; 2560 reg = <0 0xfed30000 0 0x10000>; 2561 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 2562 clocks = <&cpg CPG_MOD 614>; 2563 power-domains = <&sysc R8A779A0_PD_A3ISP23>; 2564 resets = <&cpg 614>; 2565 status = "disabled"; 2566 2567 ports { 2568 #address-cells = <1>; 2569 #size-cells = <0>; 2570 2571 port@0 { 2572 #address-cells = <1>; 2573 #size-cells = <0>; 2574 2575 reg = <0>; 2576 2577 isp2csi42: endpoint@0 { 2578 reg = <0>; 2579 remote-endpoint = <&csi42isp2>; 2580 }; 2581 }; 2582 2583 port@1 { 2584 reg = <1>; 2585 isp2vin16: endpoint { 2586 remote-endpoint = <&vin16isp2>; 2587 }; 2588 }; 2589 2590 port@2 { 2591 reg = <2>; 2592 isp2vin17: endpoint { 2593 remote-endpoint = <&vin17isp2>; 2594 }; 2595 }; 2596 2597 port@3 { 2598 reg = <3>; 2599 isp2vin18: endpoint { 2600 remote-endpoint = <&vin18isp2>; 2601 }; 2602 }; 2603 2604 port@4 { 2605 reg = <4>; 2606 isp2vin19: endpoint { 2607 remote-endpoint = <&vin19isp2>; 2608 }; 2609 }; 2610 2611 port@5 { 2612 reg = <5>; 2613 isp2vin20: endpoint { 2614 remote-endpoint = <&vin20isp2>; 2615 }; 2616 }; 2617 2618 port@6 { 2619 reg = <6>; 2620 isp2vin21: endpoint { 2621 remote-endpoint = <&vin21isp2>; 2622 }; 2623 }; 2624 2625 port@7 { 2626 reg = <7>; 2627 isp2vin22: endpoint { 2628 remote-endpoint = <&vin22isp2>; 2629 }; 2630 }; 2631 2632 port@8 { 2633 reg = <8>; 2634 isp2vin23: endpoint { 2635 remote-endpoint = <&vin23isp2>; 2636 }; 2637 }; 2638 }; 2639 }; 2640 2641 isp3: isp@fed40000 { 2642 compatible = "renesas,r8a779a0-isp"; 2643 reg = <0 0xfed40000 0 0x10000>; 2644 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 2645 clocks = <&cpg CPG_MOD 615>; 2646 power-domains = <&sysc R8A779A0_PD_A3ISP23>; 2647 resets = <&cpg 615>; 2648 status = "disabled"; 2649 2650 ports { 2651 #address-cells = <1>; 2652 #size-cells = <0>; 2653 2654 port@0 { 2655 #address-cells = <1>; 2656 #size-cells = <0>; 2657 2658 reg = <0>; 2659 2660 isp3csi43: endpoint@1 { 2661 reg = <1>; 2662 remote-endpoint = <&csi43isp3>; 2663 }; 2664 }; 2665 2666 port@1 { 2667 reg = <1>; 2668 isp3vin24: endpoint { 2669 remote-endpoint = <&vin24isp3>; 2670 }; 2671 }; 2672 2673 port@2 { 2674 reg = <2>; 2675 isp3vin25: endpoint { 2676 remote-endpoint = <&vin25isp3>; 2677 }; 2678 }; 2679 2680 port@3 { 2681 reg = <3>; 2682 isp3vin26: endpoint { 2683 remote-endpoint = <&vin26isp3>; 2684 }; 2685 }; 2686 2687 port@4 { 2688 reg = <4>; 2689 isp3vin27: endpoint { 2690 remote-endpoint = <&vin27isp3>; 2691 }; 2692 }; 2693 2694 port@5 { 2695 reg = <5>; 2696 isp3vin28: endpoint { 2697 remote-endpoint = <&vin28isp3>; 2698 }; 2699 }; 2700 2701 port@6 { 2702 reg = <6>; 2703 isp3vin29: endpoint { 2704 remote-endpoint = <&vin29isp3>; 2705 }; 2706 }; 2707 2708 port@7 { 2709 reg = <7>; 2710 isp3vin30: endpoint { 2711 remote-endpoint = <&vin30isp3>; 2712 }; 2713 }; 2714 2715 port@8 { 2716 reg = <8>; 2717 isp3vin31: endpoint { 2718 remote-endpoint = <&vin31isp3>; 2719 }; 2720 }; 2721 }; 2722 }; 2723 2724 dsi0: dsi-encoder@fed80000 { 2725 compatible = "renesas,r8a779a0-dsi-csi2-tx"; 2726 reg = <0 0xfed80000 0 0x10000>; 2727 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2728 clocks = <&cpg CPG_MOD 415>, 2729 <&cpg CPG_CORE R8A779A0_CLK_DSI>, 2730 <&cpg CPG_CORE R8A779A0_CLK_CL16MCK>; 2731 clock-names = "fck", "dsi", "pll"; 2732 resets = <&cpg 415>; 2733 status = "disabled"; 2734 2735 ports { 2736 #address-cells = <1>; 2737 #size-cells = <0>; 2738 2739 port@0 { 2740 reg = <0>; 2741 dsi0_in: endpoint { 2742 remote-endpoint = <&du_out_dsi0>; 2743 }; 2744 }; 2745 2746 port@1 { 2747 reg = <1>; 2748 }; 2749 }; 2750 }; 2751 2752 dsi1: dsi-encoder@fed90000 { 2753 compatible = "renesas,r8a779a0-dsi-csi2-tx"; 2754 reg = <0 0xfed90000 0 0x10000>; 2755 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2756 clocks = <&cpg CPG_MOD 416>, 2757 <&cpg CPG_CORE R8A779A0_CLK_DSI>, 2758 <&cpg CPG_CORE R8A779A0_CLK_CL16MCK>; 2759 clock-names = "fck", "dsi", "pll"; 2760 resets = <&cpg 416>; 2761 status = "disabled"; 2762 2763 ports { 2764 #address-cells = <1>; 2765 #size-cells = <0>; 2766 2767 port@0 { 2768 reg = <0>; 2769 dsi1_in: endpoint { 2770 remote-endpoint = <&du_out_dsi1>; 2771 }; 2772 }; 2773 2774 port@1 { 2775 reg = <1>; 2776 }; 2777 }; 2778 }; 2779 2780 prr: chipid@fff00044 { 2781 compatible = "renesas,prr"; 2782 reg = <0 0xfff00044 0 4>; 2783 }; 2784 }; 2785 2786 thermal-zones { 2787 sensor1_thermal: sensor1-thermal { 2788 polling-delay-passive = <250>; 2789 polling-delay = <1000>; 2790 thermal-sensors = <&tsc 0>; 2791 2792 trips { 2793 sensor1_crit: sensor1-crit { 2794 temperature = <120000>; 2795 hysteresis = <1000>; 2796 type = "critical"; 2797 }; 2798 }; 2799 }; 2800 2801 sensor2_thermal: sensor2-thermal { 2802 polling-delay-passive = <250>; 2803 polling-delay = <1000>; 2804 thermal-sensors = <&tsc 1>; 2805 2806 trips { 2807 sensor2_crit: sensor2-crit { 2808 temperature = <120000>; 2809 hysteresis = <1000>; 2810 type = "critical"; 2811 }; 2812 }; 2813 }; 2814 2815 sensor3_thermal: sensor3-thermal { 2816 polling-delay-passive = <250>; 2817 polling-delay = <1000>; 2818 thermal-sensors = <&tsc 2>; 2819 2820 trips { 2821 sensor3_crit: sensor3-crit { 2822 temperature = <120000>; 2823 hysteresis = <1000>; 2824 type = "critical"; 2825 }; 2826 }; 2827 }; 2828 2829 sensor4_thermal: sensor4-thermal { 2830 polling-delay-passive = <250>; 2831 polling-delay = <1000>; 2832 thermal-sensors = <&tsc 3>; 2833 2834 trips { 2835 sensor4_crit: sensor4-crit { 2836 temperature = <120000>; 2837 hysteresis = <1000>; 2838 type = "critical"; 2839 }; 2840 }; 2841 }; 2842 2843 sensor5_thermal: sensor5-thermal { 2844 polling-delay-passive = <250>; 2845 polling-delay = <1000>; 2846 thermal-sensors = <&tsc 4>; 2847 2848 trips { 2849 sensor5_crit: sensor5-crit { 2850 temperature = <120000>; 2851 hysteresis = <1000>; 2852 type = "critical"; 2853 }; 2854 }; 2855 }; 2856 }; 2857 2858 timer { 2859 compatible = "arm,armv8-timer"; 2860 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, 2861 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, 2862 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, 2863 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>; 2864 }; 2865}; 2866