1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Copyright (C) 2020 - Google Inc
4  * Author: Andrew Scull <ascull@google.com>
5  */
6 
7 #include <hyp/adjust_pc.h>
8 
9 #include <asm/pgtable-types.h>
10 #include <asm/kvm_asm.h>
11 #include <asm/kvm_emulate.h>
12 #include <asm/kvm_host.h>
13 #include <asm/kvm_hyp.h>
14 #include <asm/kvm_mmu.h>
15 
16 #include <nvhe/mem_protect.h>
17 #include <nvhe/mm.h>
18 #include <nvhe/pkvm.h>
19 #include <nvhe/trap_handler.h>
20 
21 DEFINE_PER_CPU(struct kvm_nvhe_init_params, kvm_init_params);
22 
23 void __kvm_hyp_host_forward_smc(struct kvm_cpu_context *host_ctxt);
24 
flush_hyp_vcpu(struct pkvm_hyp_vcpu * hyp_vcpu)25 static void flush_hyp_vcpu(struct pkvm_hyp_vcpu *hyp_vcpu)
26 {
27 	struct kvm_vcpu *host_vcpu = hyp_vcpu->host_vcpu;
28 
29 	hyp_vcpu->vcpu.arch.ctxt	= host_vcpu->arch.ctxt;
30 
31 	hyp_vcpu->vcpu.arch.sve_state	= kern_hyp_va(host_vcpu->arch.sve_state);
32 	hyp_vcpu->vcpu.arch.sve_max_vl	= host_vcpu->arch.sve_max_vl;
33 
34 	hyp_vcpu->vcpu.arch.hw_mmu	= host_vcpu->arch.hw_mmu;
35 
36 	hyp_vcpu->vcpu.arch.hcr_el2	= host_vcpu->arch.hcr_el2;
37 	hyp_vcpu->vcpu.arch.mdcr_el2	= host_vcpu->arch.mdcr_el2;
38 	hyp_vcpu->vcpu.arch.cptr_el2	= host_vcpu->arch.cptr_el2;
39 
40 	hyp_vcpu->vcpu.arch.iflags	= host_vcpu->arch.iflags;
41 	hyp_vcpu->vcpu.arch.fp_state	= host_vcpu->arch.fp_state;
42 
43 	hyp_vcpu->vcpu.arch.debug_ptr	= kern_hyp_va(host_vcpu->arch.debug_ptr);
44 	hyp_vcpu->vcpu.arch.host_fpsimd_state = host_vcpu->arch.host_fpsimd_state;
45 
46 	hyp_vcpu->vcpu.arch.vsesr_el2	= host_vcpu->arch.vsesr_el2;
47 
48 	hyp_vcpu->vcpu.arch.vgic_cpu.vgic_v3 = host_vcpu->arch.vgic_cpu.vgic_v3;
49 }
50 
sync_hyp_vcpu(struct pkvm_hyp_vcpu * hyp_vcpu)51 static void sync_hyp_vcpu(struct pkvm_hyp_vcpu *hyp_vcpu)
52 {
53 	struct kvm_vcpu *host_vcpu = hyp_vcpu->host_vcpu;
54 	struct vgic_v3_cpu_if *hyp_cpu_if = &hyp_vcpu->vcpu.arch.vgic_cpu.vgic_v3;
55 	struct vgic_v3_cpu_if *host_cpu_if = &host_vcpu->arch.vgic_cpu.vgic_v3;
56 	unsigned int i;
57 
58 	host_vcpu->arch.ctxt		= hyp_vcpu->vcpu.arch.ctxt;
59 
60 	host_vcpu->arch.hcr_el2		= hyp_vcpu->vcpu.arch.hcr_el2;
61 	host_vcpu->arch.cptr_el2	= hyp_vcpu->vcpu.arch.cptr_el2;
62 
63 	host_vcpu->arch.fault		= hyp_vcpu->vcpu.arch.fault;
64 
65 	host_vcpu->arch.iflags		= hyp_vcpu->vcpu.arch.iflags;
66 	host_vcpu->arch.fp_state	= hyp_vcpu->vcpu.arch.fp_state;
67 
68 	host_cpu_if->vgic_hcr		= hyp_cpu_if->vgic_hcr;
69 	for (i = 0; i < hyp_cpu_if->used_lrs; ++i)
70 		host_cpu_if->vgic_lr[i] = hyp_cpu_if->vgic_lr[i];
71 }
72 
handle___kvm_vcpu_run(struct kvm_cpu_context * host_ctxt)73 static void handle___kvm_vcpu_run(struct kvm_cpu_context *host_ctxt)
74 {
75 	DECLARE_REG(struct kvm_vcpu *, host_vcpu, host_ctxt, 1);
76 	int ret;
77 
78 	host_vcpu = kern_hyp_va(host_vcpu);
79 
80 	if (unlikely(is_protected_kvm_enabled())) {
81 		struct pkvm_hyp_vcpu *hyp_vcpu;
82 		struct kvm *host_kvm;
83 
84 		host_kvm = kern_hyp_va(host_vcpu->kvm);
85 		hyp_vcpu = pkvm_load_hyp_vcpu(host_kvm->arch.pkvm.handle,
86 					      host_vcpu->vcpu_idx);
87 		if (!hyp_vcpu) {
88 			ret = -EINVAL;
89 			goto out;
90 		}
91 
92 		flush_hyp_vcpu(hyp_vcpu);
93 
94 		ret = __kvm_vcpu_run(&hyp_vcpu->vcpu);
95 
96 		sync_hyp_vcpu(hyp_vcpu);
97 		pkvm_put_hyp_vcpu(hyp_vcpu);
98 	} else {
99 		/* The host is fully trusted, run its vCPU directly. */
100 		ret = __kvm_vcpu_run(host_vcpu);
101 	}
102 
103 out:
104 	cpu_reg(host_ctxt, 1) =  ret;
105 }
106 
handle___kvm_adjust_pc(struct kvm_cpu_context * host_ctxt)107 static void handle___kvm_adjust_pc(struct kvm_cpu_context *host_ctxt)
108 {
109 	DECLARE_REG(struct kvm_vcpu *, vcpu, host_ctxt, 1);
110 
111 	__kvm_adjust_pc(kern_hyp_va(vcpu));
112 }
113 
handle___kvm_flush_vm_context(struct kvm_cpu_context * host_ctxt)114 static void handle___kvm_flush_vm_context(struct kvm_cpu_context *host_ctxt)
115 {
116 	__kvm_flush_vm_context();
117 }
118 
handle___kvm_tlb_flush_vmid_ipa(struct kvm_cpu_context * host_ctxt)119 static void handle___kvm_tlb_flush_vmid_ipa(struct kvm_cpu_context *host_ctxt)
120 {
121 	DECLARE_REG(struct kvm_s2_mmu *, mmu, host_ctxt, 1);
122 	DECLARE_REG(phys_addr_t, ipa, host_ctxt, 2);
123 	DECLARE_REG(int, level, host_ctxt, 3);
124 
125 	__kvm_tlb_flush_vmid_ipa(kern_hyp_va(mmu), ipa, level);
126 }
127 
handle___kvm_tlb_flush_vmid(struct kvm_cpu_context * host_ctxt)128 static void handle___kvm_tlb_flush_vmid(struct kvm_cpu_context *host_ctxt)
129 {
130 	DECLARE_REG(struct kvm_s2_mmu *, mmu, host_ctxt, 1);
131 
132 	__kvm_tlb_flush_vmid(kern_hyp_va(mmu));
133 }
134 
handle___kvm_flush_cpu_context(struct kvm_cpu_context * host_ctxt)135 static void handle___kvm_flush_cpu_context(struct kvm_cpu_context *host_ctxt)
136 {
137 	DECLARE_REG(struct kvm_s2_mmu *, mmu, host_ctxt, 1);
138 
139 	__kvm_flush_cpu_context(kern_hyp_va(mmu));
140 }
141 
handle___kvm_timer_set_cntvoff(struct kvm_cpu_context * host_ctxt)142 static void handle___kvm_timer_set_cntvoff(struct kvm_cpu_context *host_ctxt)
143 {
144 	__kvm_timer_set_cntvoff(cpu_reg(host_ctxt, 1));
145 }
146 
handle___kvm_enable_ssbs(struct kvm_cpu_context * host_ctxt)147 static void handle___kvm_enable_ssbs(struct kvm_cpu_context *host_ctxt)
148 {
149 	u64 tmp;
150 
151 	tmp = read_sysreg_el2(SYS_SCTLR);
152 	tmp |= SCTLR_ELx_DSSBS;
153 	write_sysreg_el2(tmp, SYS_SCTLR);
154 }
155 
handle___vgic_v3_get_gic_config(struct kvm_cpu_context * host_ctxt)156 static void handle___vgic_v3_get_gic_config(struct kvm_cpu_context *host_ctxt)
157 {
158 	cpu_reg(host_ctxt, 1) = __vgic_v3_get_gic_config();
159 }
160 
handle___vgic_v3_read_vmcr(struct kvm_cpu_context * host_ctxt)161 static void handle___vgic_v3_read_vmcr(struct kvm_cpu_context *host_ctxt)
162 {
163 	cpu_reg(host_ctxt, 1) = __vgic_v3_read_vmcr();
164 }
165 
handle___vgic_v3_write_vmcr(struct kvm_cpu_context * host_ctxt)166 static void handle___vgic_v3_write_vmcr(struct kvm_cpu_context *host_ctxt)
167 {
168 	__vgic_v3_write_vmcr(cpu_reg(host_ctxt, 1));
169 }
170 
handle___vgic_v3_init_lrs(struct kvm_cpu_context * host_ctxt)171 static void handle___vgic_v3_init_lrs(struct kvm_cpu_context *host_ctxt)
172 {
173 	__vgic_v3_init_lrs();
174 }
175 
handle___kvm_get_mdcr_el2(struct kvm_cpu_context * host_ctxt)176 static void handle___kvm_get_mdcr_el2(struct kvm_cpu_context *host_ctxt)
177 {
178 	cpu_reg(host_ctxt, 1) = __kvm_get_mdcr_el2();
179 }
180 
handle___vgic_v3_save_aprs(struct kvm_cpu_context * host_ctxt)181 static void handle___vgic_v3_save_aprs(struct kvm_cpu_context *host_ctxt)
182 {
183 	DECLARE_REG(struct vgic_v3_cpu_if *, cpu_if, host_ctxt, 1);
184 
185 	__vgic_v3_save_aprs(kern_hyp_va(cpu_if));
186 }
187 
handle___vgic_v3_restore_aprs(struct kvm_cpu_context * host_ctxt)188 static void handle___vgic_v3_restore_aprs(struct kvm_cpu_context *host_ctxt)
189 {
190 	DECLARE_REG(struct vgic_v3_cpu_if *, cpu_if, host_ctxt, 1);
191 
192 	__vgic_v3_restore_aprs(kern_hyp_va(cpu_if));
193 }
194 
handle___pkvm_init(struct kvm_cpu_context * host_ctxt)195 static void handle___pkvm_init(struct kvm_cpu_context *host_ctxt)
196 {
197 	DECLARE_REG(phys_addr_t, phys, host_ctxt, 1);
198 	DECLARE_REG(unsigned long, size, host_ctxt, 2);
199 	DECLARE_REG(unsigned long, nr_cpus, host_ctxt, 3);
200 	DECLARE_REG(unsigned long *, per_cpu_base, host_ctxt, 4);
201 	DECLARE_REG(u32, hyp_va_bits, host_ctxt, 5);
202 
203 	/*
204 	 * __pkvm_init() will return only if an error occurred, otherwise it
205 	 * will tail-call in __pkvm_init_finalise() which will have to deal
206 	 * with the host context directly.
207 	 */
208 	cpu_reg(host_ctxt, 1) = __pkvm_init(phys, size, nr_cpus, per_cpu_base,
209 					    hyp_va_bits);
210 }
211 
handle___pkvm_cpu_set_vector(struct kvm_cpu_context * host_ctxt)212 static void handle___pkvm_cpu_set_vector(struct kvm_cpu_context *host_ctxt)
213 {
214 	DECLARE_REG(enum arm64_hyp_spectre_vector, slot, host_ctxt, 1);
215 
216 	cpu_reg(host_ctxt, 1) = pkvm_cpu_set_vector(slot);
217 }
218 
handle___pkvm_host_share_hyp(struct kvm_cpu_context * host_ctxt)219 static void handle___pkvm_host_share_hyp(struct kvm_cpu_context *host_ctxt)
220 {
221 	DECLARE_REG(u64, pfn, host_ctxt, 1);
222 
223 	cpu_reg(host_ctxt, 1) = __pkvm_host_share_hyp(pfn);
224 }
225 
handle___pkvm_host_unshare_hyp(struct kvm_cpu_context * host_ctxt)226 static void handle___pkvm_host_unshare_hyp(struct kvm_cpu_context *host_ctxt)
227 {
228 	DECLARE_REG(u64, pfn, host_ctxt, 1);
229 
230 	cpu_reg(host_ctxt, 1) = __pkvm_host_unshare_hyp(pfn);
231 }
232 
handle___pkvm_create_private_mapping(struct kvm_cpu_context * host_ctxt)233 static void handle___pkvm_create_private_mapping(struct kvm_cpu_context *host_ctxt)
234 {
235 	DECLARE_REG(phys_addr_t, phys, host_ctxt, 1);
236 	DECLARE_REG(size_t, size, host_ctxt, 2);
237 	DECLARE_REG(enum kvm_pgtable_prot, prot, host_ctxt, 3);
238 
239 	/*
240 	 * __pkvm_create_private_mapping() populates a pointer with the
241 	 * hypervisor start address of the allocation.
242 	 *
243 	 * However, handle___pkvm_create_private_mapping() hypercall crosses the
244 	 * EL1/EL2 boundary so the pointer would not be valid in this context.
245 	 *
246 	 * Instead pass the allocation address as the return value (or return
247 	 * ERR_PTR() on failure).
248 	 */
249 	unsigned long haddr;
250 	int err = __pkvm_create_private_mapping(phys, size, prot, &haddr);
251 
252 	if (err)
253 		haddr = (unsigned long)ERR_PTR(err);
254 
255 	cpu_reg(host_ctxt, 1) = haddr;
256 }
257 
handle___pkvm_prot_finalize(struct kvm_cpu_context * host_ctxt)258 static void handle___pkvm_prot_finalize(struct kvm_cpu_context *host_ctxt)
259 {
260 	cpu_reg(host_ctxt, 1) = __pkvm_prot_finalize();
261 }
262 
handle___pkvm_vcpu_init_traps(struct kvm_cpu_context * host_ctxt)263 static void handle___pkvm_vcpu_init_traps(struct kvm_cpu_context *host_ctxt)
264 {
265 	DECLARE_REG(struct kvm_vcpu *, vcpu, host_ctxt, 1);
266 
267 	__pkvm_vcpu_init_traps(kern_hyp_va(vcpu));
268 }
269 
handle___pkvm_init_vm(struct kvm_cpu_context * host_ctxt)270 static void handle___pkvm_init_vm(struct kvm_cpu_context *host_ctxt)
271 {
272 	DECLARE_REG(struct kvm *, host_kvm, host_ctxt, 1);
273 	DECLARE_REG(unsigned long, vm_hva, host_ctxt, 2);
274 	DECLARE_REG(unsigned long, pgd_hva, host_ctxt, 3);
275 
276 	host_kvm = kern_hyp_va(host_kvm);
277 	cpu_reg(host_ctxt, 1) = __pkvm_init_vm(host_kvm, vm_hva, pgd_hva);
278 }
279 
handle___pkvm_init_vcpu(struct kvm_cpu_context * host_ctxt)280 static void handle___pkvm_init_vcpu(struct kvm_cpu_context *host_ctxt)
281 {
282 	DECLARE_REG(pkvm_handle_t, handle, host_ctxt, 1);
283 	DECLARE_REG(struct kvm_vcpu *, host_vcpu, host_ctxt, 2);
284 	DECLARE_REG(unsigned long, vcpu_hva, host_ctxt, 3);
285 
286 	host_vcpu = kern_hyp_va(host_vcpu);
287 	cpu_reg(host_ctxt, 1) = __pkvm_init_vcpu(handle, host_vcpu, vcpu_hva);
288 }
289 
handle___pkvm_teardown_vm(struct kvm_cpu_context * host_ctxt)290 static void handle___pkvm_teardown_vm(struct kvm_cpu_context *host_ctxt)
291 {
292 	DECLARE_REG(pkvm_handle_t, handle, host_ctxt, 1);
293 
294 	cpu_reg(host_ctxt, 1) = __pkvm_teardown_vm(handle);
295 }
296 
297 typedef void (*hcall_t)(struct kvm_cpu_context *);
298 
299 #define HANDLE_FUNC(x)	[__KVM_HOST_SMCCC_FUNC_##x] = (hcall_t)handle_##x
300 
301 static const hcall_t host_hcall[] = {
302 	/* ___kvm_hyp_init */
303 	HANDLE_FUNC(__kvm_get_mdcr_el2),
304 	HANDLE_FUNC(__pkvm_init),
305 	HANDLE_FUNC(__pkvm_create_private_mapping),
306 	HANDLE_FUNC(__pkvm_cpu_set_vector),
307 	HANDLE_FUNC(__kvm_enable_ssbs),
308 	HANDLE_FUNC(__vgic_v3_init_lrs),
309 	HANDLE_FUNC(__vgic_v3_get_gic_config),
310 	HANDLE_FUNC(__pkvm_prot_finalize),
311 
312 	HANDLE_FUNC(__pkvm_host_share_hyp),
313 	HANDLE_FUNC(__pkvm_host_unshare_hyp),
314 	HANDLE_FUNC(__kvm_adjust_pc),
315 	HANDLE_FUNC(__kvm_vcpu_run),
316 	HANDLE_FUNC(__kvm_flush_vm_context),
317 	HANDLE_FUNC(__kvm_tlb_flush_vmid_ipa),
318 	HANDLE_FUNC(__kvm_tlb_flush_vmid),
319 	HANDLE_FUNC(__kvm_flush_cpu_context),
320 	HANDLE_FUNC(__kvm_timer_set_cntvoff),
321 	HANDLE_FUNC(__vgic_v3_read_vmcr),
322 	HANDLE_FUNC(__vgic_v3_write_vmcr),
323 	HANDLE_FUNC(__vgic_v3_save_aprs),
324 	HANDLE_FUNC(__vgic_v3_restore_aprs),
325 	HANDLE_FUNC(__pkvm_vcpu_init_traps),
326 	HANDLE_FUNC(__pkvm_init_vm),
327 	HANDLE_FUNC(__pkvm_init_vcpu),
328 	HANDLE_FUNC(__pkvm_teardown_vm),
329 };
330 
handle_host_hcall(struct kvm_cpu_context * host_ctxt)331 static void handle_host_hcall(struct kvm_cpu_context *host_ctxt)
332 {
333 	DECLARE_REG(unsigned long, id, host_ctxt, 0);
334 	unsigned long hcall_min = 0;
335 	hcall_t hfn;
336 
337 	/*
338 	 * If pKVM has been initialised then reject any calls to the
339 	 * early "privileged" hypercalls. Note that we cannot reject
340 	 * calls to __pkvm_prot_finalize for two reasons: (1) The static
341 	 * key used to determine initialisation must be toggled prior to
342 	 * finalisation and (2) finalisation is performed on a per-CPU
343 	 * basis. This is all fine, however, since __pkvm_prot_finalize
344 	 * returns -EPERM after the first call for a given CPU.
345 	 */
346 	if (static_branch_unlikely(&kvm_protected_mode_initialized))
347 		hcall_min = __KVM_HOST_SMCCC_FUNC___pkvm_prot_finalize;
348 
349 	id -= KVM_HOST_SMCCC_ID(0);
350 
351 	if (unlikely(id < hcall_min || id >= ARRAY_SIZE(host_hcall)))
352 		goto inval;
353 
354 	hfn = host_hcall[id];
355 	if (unlikely(!hfn))
356 		goto inval;
357 
358 	cpu_reg(host_ctxt, 0) = SMCCC_RET_SUCCESS;
359 	hfn(host_ctxt);
360 
361 	return;
362 inval:
363 	cpu_reg(host_ctxt, 0) = SMCCC_RET_NOT_SUPPORTED;
364 }
365 
default_host_smc_handler(struct kvm_cpu_context * host_ctxt)366 static void default_host_smc_handler(struct kvm_cpu_context *host_ctxt)
367 {
368 	__kvm_hyp_host_forward_smc(host_ctxt);
369 }
370 
handle_host_smc(struct kvm_cpu_context * host_ctxt)371 static void handle_host_smc(struct kvm_cpu_context *host_ctxt)
372 {
373 	bool handled;
374 
375 	handled = kvm_host_psci_handler(host_ctxt);
376 	if (!handled)
377 		default_host_smc_handler(host_ctxt);
378 
379 	/* SMC was trapped, move ELR past the current PC. */
380 	kvm_skip_host_instr();
381 }
382 
handle_trap(struct kvm_cpu_context * host_ctxt)383 void handle_trap(struct kvm_cpu_context *host_ctxt)
384 {
385 	u64 esr = read_sysreg_el2(SYS_ESR);
386 
387 	switch (ESR_ELx_EC(esr)) {
388 	case ESR_ELx_EC_HVC64:
389 		handle_host_hcall(host_ctxt);
390 		break;
391 	case ESR_ELx_EC_SMC64:
392 		handle_host_smc(host_ctxt);
393 		break;
394 	case ESR_ELx_EC_SVE:
395 		sysreg_clear_set(cptr_el2, CPTR_EL2_TZ, 0);
396 		isb();
397 		sve_cond_update_zcr_vq(ZCR_ELx_LEN_MASK, SYS_ZCR_EL2);
398 		break;
399 	case ESR_ELx_EC_IABT_LOW:
400 	case ESR_ELx_EC_DABT_LOW:
401 		handle_host_mem_abort(host_ctxt);
402 		break;
403 	default:
404 		BUG();
405 	}
406 }
407