1/*
2 * C293 Silicon/SoC Device Tree Source (post include)
3 *
4 * Copyright 2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 *     * Redistributions of source code must retain the above copyright
9 *       notice, this list of conditions and the following disclaimer.
10 *     * Redistributions in binary form must reproduce the above copyright
11 *       notice, this list of conditions and the following disclaimer in the
12 *       documentation and/or other materials provided with the distribution.
13 *     * Neither the name of Freescale Semiconductor nor the
14 *       names of its contributors may be used to endorse or promote products
15 *       derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&ifc {
36	#address-cells = <2>;
37	#size-cells = <1>;
38	compatible = "fsl,ifc", "simple-bus";
39	interrupts = <19 2 0 0>;
40};
41
42/* controller at 0xa000 */
43&pci0 {
44	compatible = "fsl,qoriq-pcie-v2.2", "fsl,qoriq-pcie";
45	device_type = "pci";
46	#size-cells = <2>;
47	#address-cells = <3>;
48	bus-range = <0 255>;
49	clock-frequency = <33333333>;
50	interrupts = <16 2 0 0>;
51
52	pcie@0 {
53		reg = <0 0 0 0 0>;
54		#interrupt-cells = <1>;
55		#size-cells = <2>;
56		#address-cells = <3>;
57		device_type = "pci";
58		interrupts = <16 2 0 0>;
59		interrupt-map-mask = <0xf800 0 0 7>;
60		interrupt-map = <
61			/* IDSEL 0x0 */
62			0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
63			0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0
64			0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0
65			0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0
66			>;
67	};
68};
69
70&soc {
71	#address-cells = <1>;
72	#size-cells = <1>;
73	device_type = "soc";
74	compatible = "simple-bus";
75	bus-frequency = <0>;		// Filled out by uboot.
76
77	ecm-law@0 {
78		compatible = "fsl,ecm-law";
79		reg = <0x0 0x1000>;
80		fsl,num-laws = <12>;
81	};
82
83	ecm@1000 {
84		compatible = "fsl,c293-ecm", "fsl,ecm";
85		reg = <0x1000 0x1000>;
86		interrupts = <16 2 0 0>;
87	};
88
89	memory-controller@2000 {
90		compatible = "fsl,c293-memory-controller";
91		reg = <0x2000 0x1000>;
92		interrupts = <16 2 0 0>;
93	};
94
95/include/ "pq3-i2c-0.dtsi"
96/include/ "pq3-i2c-1.dtsi"
97/include/ "pq3-duart-0.dtsi"
98/include/ "pq3-espi-0.dtsi"
99	spi0: spi@7000 {
100		fsl,espi-num-chipselects = <1>;
101	};
102
103/include/ "pq3-gpio-0.dtsi"
104	L2: l2-cache-controller@20000 {
105		compatible = "fsl,c293-l2-cache-controller";
106		reg = <0x20000 0x1000>;
107		cache-line-size = <32>;	// 32 bytes
108		cache-size = <0x80000>; // L2,512K
109		interrupts = <16 2 0 0>;
110	};
111
112/include/ "pq3-dma-0.dtsi"
113/include/ "pq3-esdhc-0.dtsi"
114	sdhc@2e000 {
115		compatible = "fsl,c293-esdhc", "fsl,esdhc";
116		sdhci,auto-cmd12;
117	};
118
119	crypto@80000 {
120/include/ "qoriq-sec6.0-0.dtsi"
121	};
122
123	crypto@80000 {
124		reg = <0x80000 0x20000>;
125		ranges = <0x0 0x80000 0x20000>;
126
127		jr@1000{
128			interrupts = <45 2 0 0>;
129		};
130		jr@2000{
131			interrupts = <57 2 0 0>;
132		};
133	};
134
135	crypto@a0000 {
136/include/ "qoriq-sec6.0-0.dtsi"
137	};
138
139	crypto@a0000 {
140		reg = <0xa0000 0x20000>;
141		ranges = <0x0 0xa0000 0x20000>;
142
143		jr@1000{
144			interrupts = <49 2 0 0>;
145		};
146		jr@2000{
147			interrupts = <50 2 0 0>;
148		};
149	};
150
151	crypto@c0000 {
152/include/ "qoriq-sec6.0-0.dtsi"
153	};
154
155	crypto@c0000 {
156		reg = <0xc0000 0x20000>;
157		ranges = <0x0 0xc0000 0x20000>;
158
159		jr@1000{
160			interrupts = <55 2 0 0>;
161		};
162		jr@2000{
163			interrupts = <56 2 0 0>;
164		};
165	};
166
167/include/ "pq3-mpic.dtsi"
168/include/ "pq3-mpic-timer-B.dtsi"
169
170/include/ "pq3-etsec2-0.dtsi"
171	enet0: ethernet@b0000 {
172		queue-group@b0000 {
173			reg = <0x10000 0x1000>;
174		};
175	};
176
177/include/ "pq3-etsec2-1.dtsi"
178	enet1: ethernet@b1000 {
179		queue-group@b1000 {
180			reg = <0x11000 0x1000>;
181		};
182	};
183
184	global-utilities@e0000 {
185		compatible = "fsl,c293-guts";
186		reg = <0xe0000 0x1000>;
187		fsl,has-rstcr;
188	};
189};
190