1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * Freescale Lite5200 board support
4 *
5 * Written by: Grant Likely <grant.likely@secretlab.ca>
6 *
7 * Copyright (C) Secret Lab Technologies Ltd. 2006. All rights reserved.
8 * Copyright 2006 Freescale Semiconductor, Inc. All rights reserved.
9 *
10 * Description:
11 */
12
13 #undef DEBUG
14
15 #include <linux/init.h>
16 #include <linux/pci.h>
17 #include <linux/of.h>
18 #include <linux/of_address.h>
19 #include <linux/root_dev.h>
20 #include <linux/initrd.h>
21 #include <asm/time.h>
22 #include <asm/io.h>
23 #include <asm/machdep.h>
24 #include <asm/mpc52xx.h>
25
26 /* ************************************************************************
27 *
28 * Setup the architecture
29 *
30 */
31
32 /* mpc5200 device tree match tables */
33 static const struct of_device_id mpc5200_cdm_ids[] __initconst = {
34 { .compatible = "fsl,mpc5200-cdm", },
35 { .compatible = "mpc5200-cdm", },
36 {}
37 };
38
39 static const struct of_device_id mpc5200_gpio_ids[] __initconst = {
40 { .compatible = "fsl,mpc5200-gpio", },
41 { .compatible = "mpc5200-gpio", },
42 {}
43 };
44
45 /*
46 * Fix clock configuration.
47 *
48 * Firmware is supposed to be responsible for this. If you are creating a
49 * new board port, do *NOT* duplicate this code. Fix your boot firmware
50 * to set it correctly in the first place
51 */
52 static void __init
lite5200_fix_clock_config(void)53 lite5200_fix_clock_config(void)
54 {
55 struct device_node *np;
56 struct mpc52xx_cdm __iomem *cdm;
57 /* Map zones */
58 np = of_find_matching_node(NULL, mpc5200_cdm_ids);
59 cdm = of_iomap(np, 0);
60 of_node_put(np);
61 if (!cdm) {
62 printk(KERN_ERR "%s() failed; expect abnormal behaviour\n",
63 __func__);
64 return;
65 }
66
67 /* Use internal 48 Mhz */
68 out_8(&cdm->ext_48mhz_en, 0x00);
69 out_8(&cdm->fd_enable, 0x01);
70 if (in_be32(&cdm->rstcfg) & 0x40) /* Assumes 33Mhz clock */
71 out_be16(&cdm->fd_counters, 0x0001);
72 else
73 out_be16(&cdm->fd_counters, 0x5555);
74
75 /* Unmap the regs */
76 iounmap(cdm);
77 }
78
79 /*
80 * Fix setting of port_config register.
81 *
82 * Firmware is supposed to be responsible for this. If you are creating a
83 * new board port, do *NOT* duplicate this code. Fix your boot firmware
84 * to set it correctly in the first place
85 */
86 static void __init
lite5200_fix_port_config(void)87 lite5200_fix_port_config(void)
88 {
89 struct device_node *np;
90 struct mpc52xx_gpio __iomem *gpio;
91 u32 port_config;
92
93 np = of_find_matching_node(NULL, mpc5200_gpio_ids);
94 gpio = of_iomap(np, 0);
95 of_node_put(np);
96 if (!gpio) {
97 printk(KERN_ERR "%s() failed. expect abnormal behavior\n",
98 __func__);
99 return;
100 }
101
102 /* Set port config */
103 port_config = in_be32(&gpio->port_config);
104
105 port_config &= ~0x00800000; /* 48Mhz internal, pin is GPIO */
106
107 port_config &= ~0x00007000; /* USB port : Differential mode */
108 port_config |= 0x00001000; /* USB 1 only */
109
110 port_config &= ~0x03000000; /* ATA CS is on csb_4/5 */
111 port_config |= 0x01000000;
112
113 pr_debug("port_config: old:%x new:%x\n",
114 in_be32(&gpio->port_config), port_config);
115 out_be32(&gpio->port_config, port_config);
116
117 /* Unmap zone */
118 iounmap(gpio);
119 }
120
121 #ifdef CONFIG_PM
lite5200_suspend_prepare(void __iomem * mbar)122 static void lite5200_suspend_prepare(void __iomem *mbar)
123 {
124 u8 pin = 1; /* GPIO_WKUP_1 (GPIO_PSC2_4) */
125 u8 level = 0; /* wakeup on low level */
126 mpc52xx_set_wakeup_gpio(pin, level);
127
128 /*
129 * power down usb port
130 * this needs to be called before of-ohci suspend code
131 */
132
133 /* set ports to "power switched" and "powered at the same time"
134 * USB Rh descriptor A: NPS = 0, PSM = 0 */
135 out_be32(mbar + 0x1048, in_be32(mbar + 0x1048) & ~0x300);
136 /* USB Rh status: LPS = 1 - turn off power */
137 out_be32(mbar + 0x1050, 0x00000001);
138 }
139
lite5200_resume_finish(void __iomem * mbar)140 static void lite5200_resume_finish(void __iomem *mbar)
141 {
142 /* USB Rh status: LPSC = 1 - turn on power */
143 out_be32(mbar + 0x1050, 0x00010000);
144 }
145 #endif
146
lite5200_setup_arch(void)147 static void __init lite5200_setup_arch(void)
148 {
149 if (ppc_md.progress)
150 ppc_md.progress("lite5200_setup_arch()", 0);
151
152 /* Map important registers from the internal memory map */
153 mpc52xx_map_common_devices();
154
155 /* Some mpc5200 & mpc5200b related configuration */
156 mpc5200_setup_xlb_arbiter();
157
158 /* Fix things that firmware should have done. */
159 lite5200_fix_clock_config();
160 lite5200_fix_port_config();
161
162 #ifdef CONFIG_PM
163 mpc52xx_suspend.board_suspend_prepare = lite5200_suspend_prepare;
164 mpc52xx_suspend.board_resume_finish = lite5200_resume_finish;
165 lite5200_pm_init();
166 #endif
167 }
168
169 static const char * const board[] __initconst = {
170 "fsl,lite5200",
171 "fsl,lite5200b",
172 NULL,
173 };
174
175 /*
176 * Called very early, MMU is off, device-tree isn't unflattened
177 */
lite5200_probe(void)178 static int __init lite5200_probe(void)
179 {
180 return of_device_compatible_match(of_root, board);
181 }
182
define_machine(lite5200)183 define_machine(lite5200) {
184 .name = "lite5200",
185 .probe = lite5200_probe,
186 .setup_arch = lite5200_setup_arch,
187 .discover_phbs = mpc52xx_setup_pci,
188 .init = mpc52xx_declare_of_platform_devices,
189 .init_IRQ = mpc52xx_init_irq,
190 .get_irq = mpc52xx_get_irq,
191 .restart = mpc52xx_restart,
192 .calibrate_decr = generic_calibrate_decr,
193 };
194