1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * Copyright 2010-2011, 2013 Freescale Semiconductor, Inc.
4  *
5  * Author: Roy Zang <tie-fei.zang@freescale.com>
6  *
7  * Description:
8  * P1023 RDB Board Setup
9  */
10 
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/errno.h>
14 #include <linux/pci.h>
15 #include <linux/delay.h>
16 #include <linux/module.h>
17 #include <linux/fsl_devices.h>
18 #include <linux/of_address.h>
19 #include <linux/of_platform.h>
20 #include <linux/of_device.h>
21 
22 #include <asm/time.h>
23 #include <asm/machdep.h>
24 #include <asm/pci-bridge.h>
25 #include <mm/mmu_decl.h>
26 #include <asm/udbg.h>
27 #include <asm/mpic.h>
28 #include "smp.h"
29 
30 #include <sysdev/fsl_soc.h>
31 #include <sysdev/fsl_pci.h>
32 
33 #include "mpc85xx.h"
34 
35 /* ************************************************************************
36  *
37  * Setup the architecture
38  *
39  */
mpc85xx_rdb_setup_arch(void)40 static void __init mpc85xx_rdb_setup_arch(void)
41 {
42 	struct device_node *np;
43 
44 	if (ppc_md.progress)
45 		ppc_md.progress("p1023_rdb_setup_arch()", 0);
46 
47 	/* Map BCSR area */
48 	np = of_find_node_by_name(NULL, "bcsr");
49 	if (np != NULL) {
50 		static u8 __iomem *bcsr_regs;
51 
52 		bcsr_regs = of_iomap(np, 0);
53 		of_node_put(np);
54 
55 		if (!bcsr_regs) {
56 			printk(KERN_ERR
57 			       "BCSR: Failed to map bcsr register space\n");
58 			return;
59 		} else {
60 #define BCSR15_I2C_BUS0_SEG_CLR		0x07
61 #define BCSR15_I2C_BUS0_SEG2		0x02
62 /*
63  * Note: Accessing exclusively i2c devices.
64  *
65  * The i2c controller selects initially ID EEPROM in the u-boot;
66  * but if menu configuration selects RTC support in the kernel,
67  * the i2c controller switches to select RTC chip in the kernel.
68  */
69 #ifdef CONFIG_RTC_CLASS
70 			/* Enable RTC chip on the segment #2 of i2c */
71 			clrbits8(&bcsr_regs[15], BCSR15_I2C_BUS0_SEG_CLR);
72 			setbits8(&bcsr_regs[15], BCSR15_I2C_BUS0_SEG2);
73 #endif
74 
75 			iounmap(bcsr_regs);
76 		}
77 	}
78 
79 	mpc85xx_smp_init();
80 
81 	fsl_pci_assign_primary();
82 }
83 
84 machine_arch_initcall(p1023_rdb, mpc85xx_common_publish_devices);
85 
mpc85xx_rdb_pic_init(void)86 static void __init mpc85xx_rdb_pic_init(void)
87 {
88 	struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN |
89 		MPIC_SINGLE_DEST_CPU,
90 		0, 256, " OpenPIC  ");
91 
92 	BUG_ON(mpic == NULL);
93 
94 	mpic_init(mpic);
95 }
96 
p1023_rdb_probe(void)97 static int __init p1023_rdb_probe(void)
98 {
99 	return of_machine_is_compatible("fsl,P1023RDB");
100 
101 }
102 
define_machine(p1023_rdb)103 define_machine(p1023_rdb) {
104 	.name			= "P1023 RDB",
105 	.probe			= p1023_rdb_probe,
106 	.setup_arch		= mpc85xx_rdb_setup_arch,
107 	.init_IRQ		= mpc85xx_rdb_pic_init,
108 	.get_irq		= mpic_get_irq,
109 	.calibrate_decr		= generic_calibrate_decr,
110 	.progress		= udbg_progress,
111 #ifdef CONFIG_PCI
112 	.pcibios_fixup_bus	= fsl_pcibios_fixup_bus,
113 	.pcibios_fixup_phb      = fsl_pcibios_fixup_phb,
114 #endif
115 };
116