1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * ALPHAPROJECT AP-SH4A-3A Support.
4 *
5 * Copyright (C) 2010 ALPHAPROJECT Co.,Ltd.
6 * Copyright (C) 2008 Yoshihiro Shimoda
7 * Copyright (C) 2009 Paul Mundt
8 */
9 #include <linux/init.h>
10 #include <linux/platform_device.h>
11 #include <linux/io.h>
12 #include <linux/mtd/physmap.h>
13 #include <linux/regulator/fixed.h>
14 #include <linux/regulator/machine.h>
15 #include <linux/smsc911x.h>
16 #include <linux/irq.h>
17 #include <linux/clk.h>
18 #include <asm/machvec.h>
19 #include <linux/sizes.h>
20 #include <asm/clock.h>
21
22 static struct mtd_partition nor_flash_partitions[] = {
23 {
24 .name = "loader",
25 .offset = 0x00000000,
26 .size = 512 * 1024,
27 },
28 {
29 .name = "bootenv",
30 .offset = MTDPART_OFS_APPEND,
31 .size = 512 * 1024,
32 },
33 {
34 .name = "kernel",
35 .offset = MTDPART_OFS_APPEND,
36 .size = 4 * 1024 * 1024,
37 },
38 {
39 .name = "data",
40 .offset = MTDPART_OFS_APPEND,
41 .size = MTDPART_SIZ_FULL,
42 },
43 };
44
45 static struct physmap_flash_data nor_flash_data = {
46 .width = 4,
47 .parts = nor_flash_partitions,
48 .nr_parts = ARRAY_SIZE(nor_flash_partitions),
49 };
50
51 static struct resource nor_flash_resources[] = {
52 [0] = {
53 .start = 0x00000000,
54 .end = 0x01000000 - 1,
55 .flags = IORESOURCE_MEM,
56 }
57 };
58
59 static struct platform_device nor_flash_device = {
60 .name = "physmap-flash",
61 .dev = {
62 .platform_data = &nor_flash_data,
63 },
64 .num_resources = ARRAY_SIZE(nor_flash_resources),
65 .resource = nor_flash_resources,
66 };
67
68 /* Dummy supplies, where voltage doesn't matter */
69 static struct regulator_consumer_supply dummy_supplies[] = {
70 REGULATOR_SUPPLY("vddvario", "smsc911x"),
71 REGULATOR_SUPPLY("vdd33a", "smsc911x"),
72 };
73
74 static struct resource smsc911x_resources[] = {
75 [0] = {
76 .name = "smsc911x-memory",
77 .start = 0xA4000000,
78 .end = 0xA4000000 + SZ_256 - 1,
79 .flags = IORESOURCE_MEM,
80 },
81 [1] = {
82 .name = "smsc911x-irq",
83 .start = evt2irq(0x200),
84 .end = evt2irq(0x200),
85 .flags = IORESOURCE_IRQ,
86 },
87 };
88
89 static struct smsc911x_platform_config smsc911x_config = {
90 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
91 .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
92 .flags = SMSC911X_USE_16BIT,
93 .phy_interface = PHY_INTERFACE_MODE_MII,
94 };
95
96 static struct platform_device smsc911x_device = {
97 .name = "smsc911x",
98 .id = -1,
99 .num_resources = ARRAY_SIZE(smsc911x_resources),
100 .resource = smsc911x_resources,
101 .dev = {
102 .platform_data = &smsc911x_config,
103 },
104 };
105
106 static struct platform_device *apsh4a3a_devices[] __initdata = {
107 &nor_flash_device,
108 &smsc911x_device,
109 };
110
apsh4a3a_devices_setup(void)111 static int __init apsh4a3a_devices_setup(void)
112 {
113 regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
114
115 return platform_add_devices(apsh4a3a_devices,
116 ARRAY_SIZE(apsh4a3a_devices));
117 }
118 device_initcall(apsh4a3a_devices_setup);
119
apsh4a3a_clk_init(void)120 static int apsh4a3a_clk_init(void)
121 {
122 struct clk *clk;
123 int ret;
124
125 clk = clk_get(NULL, "extal");
126 if (IS_ERR(clk))
127 return PTR_ERR(clk);
128 ret = clk_set_rate(clk, 33333000);
129 clk_put(clk);
130
131 return ret;
132 }
133
134 /* Initialize the board */
apsh4a3a_setup(char ** cmdline_p)135 static void __init apsh4a3a_setup(char **cmdline_p)
136 {
137 printk(KERN_INFO "Alpha Project AP-SH4A-3A support:\n");
138 }
139
apsh4a3a_init_irq(void)140 static void __init apsh4a3a_init_irq(void)
141 {
142 plat_irq_setup_pins(IRQ_MODE_IRQ7654);
143 }
144
145 /* Return the board specific boot mode pin configuration */
apsh4a3a_mode_pins(void)146 static int apsh4a3a_mode_pins(void)
147 {
148 int value = 0;
149
150 /* These are the factory default settings of SW1 and SW2.
151 * If you change these dip switches then you will need to
152 * adjust the values below as well.
153 */
154 value &= ~MODE_PIN0; /* Clock Mode 16 */
155 value &= ~MODE_PIN1;
156 value &= ~MODE_PIN2;
157 value &= ~MODE_PIN3;
158 value |= MODE_PIN4;
159 value &= ~MODE_PIN5; /* 16-bit Area0 bus width */
160 value |= MODE_PIN6; /* Area 0 SRAM interface */
161 value |= MODE_PIN7;
162 value |= MODE_PIN8; /* Little Endian */
163 value |= MODE_PIN9; /* Master Mode */
164 value |= MODE_PIN10; /* Crystal resonator */
165 value |= MODE_PIN11; /* Display Unit */
166 value |= MODE_PIN12;
167 value &= ~MODE_PIN13; /* 29-bit address mode */
168 value |= MODE_PIN14; /* No PLL step-up */
169
170 return value;
171 }
172
173 /*
174 * The Machine Vector
175 */
176 static struct sh_machine_vector mv_apsh4a3a __initmv = {
177 .mv_name = "AP-SH4A-3A",
178 .mv_setup = apsh4a3a_setup,
179 .mv_clk_init = apsh4a3a_clk_init,
180 .mv_init_irq = apsh4a3a_init_irq,
181 .mv_mode_pins = apsh4a3a_mode_pins,
182 };
183