1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * OMAP interface clock support
4  *
5  * Copyright (C) 2013 Texas Instruments, Inc.
6  *
7  * Tero Kristo <t-kristo@ti.com>
8  */
9 
10 #include <linux/clk-provider.h>
11 #include <linux/slab.h>
12 #include <linux/of.h>
13 #include <linux/of_address.h>
14 #include <linux/clk/ti.h>
15 #include "clock.h"
16 
17 #undef pr_fmt
18 #define pr_fmt(fmt) "%s: " fmt, __func__
19 
20 static const struct clk_ops ti_interface_clk_ops = {
21 	.init		= &omap2_init_clk_clkdm,
22 	.enable		= &omap2_dflt_clk_enable,
23 	.disable	= &omap2_dflt_clk_disable,
24 	.is_enabled	= &omap2_dflt_clk_is_enabled,
25 };
26 
_register_interface(struct device_node * node,const char * name,const char * parent_name,struct clk_omap_reg * reg,u8 bit_idx,const struct clk_hw_omap_ops * ops)27 static struct clk *_register_interface(struct device_node *node,
28 				       const char *name,
29 				       const char *parent_name,
30 				       struct clk_omap_reg *reg, u8 bit_idx,
31 				       const struct clk_hw_omap_ops *ops)
32 {
33 	struct clk_init_data init = { NULL };
34 	struct clk_hw_omap *clk_hw;
35 	struct clk *clk;
36 
37 	clk_hw = kzalloc(sizeof(*clk_hw), GFP_KERNEL);
38 	if (!clk_hw)
39 		return ERR_PTR(-ENOMEM);
40 
41 	clk_hw->hw.init = &init;
42 	clk_hw->ops = ops;
43 	memcpy(&clk_hw->enable_reg, reg, sizeof(*reg));
44 	clk_hw->enable_bit = bit_idx;
45 
46 	init.name = name;
47 	init.ops = &ti_interface_clk_ops;
48 	init.flags = 0;
49 
50 	init.num_parents = 1;
51 	init.parent_names = &parent_name;
52 
53 	clk = of_ti_clk_register_omap_hw(node, &clk_hw->hw, name);
54 
55 	if (IS_ERR(clk))
56 		kfree(clk_hw);
57 
58 	return clk;
59 }
60 
_of_ti_interface_clk_setup(struct device_node * node,const struct clk_hw_omap_ops * ops)61 static void __init _of_ti_interface_clk_setup(struct device_node *node,
62 					      const struct clk_hw_omap_ops *ops)
63 {
64 	struct clk *clk;
65 	const char *parent_name;
66 	struct clk_omap_reg reg;
67 	u8 enable_bit = 0;
68 	const char *name;
69 	u32 val;
70 
71 	if (ti_clk_get_reg_addr(node, 0, &reg))
72 		return;
73 
74 	if (!of_property_read_u32(node, "ti,bit-shift", &val))
75 		enable_bit = val;
76 
77 	parent_name = of_clk_get_parent_name(node, 0);
78 	if (!parent_name) {
79 		pr_err("%pOFn must have a parent\n", node);
80 		return;
81 	}
82 
83 	name = ti_dt_clk_name(node);
84 	clk = _register_interface(node, name, parent_name, &reg,
85 				  enable_bit, ops);
86 
87 	if (!IS_ERR(clk))
88 		of_clk_add_provider(node, of_clk_src_simple_get, clk);
89 }
90 
of_ti_interface_clk_setup(struct device_node * node)91 static void __init of_ti_interface_clk_setup(struct device_node *node)
92 {
93 	_of_ti_interface_clk_setup(node, &clkhwops_iclk_wait);
94 }
95 CLK_OF_DECLARE(ti_interface_clk, "ti,omap3-interface-clock",
96 	       of_ti_interface_clk_setup);
97 
of_ti_no_wait_interface_clk_setup(struct device_node * node)98 static void __init of_ti_no_wait_interface_clk_setup(struct device_node *node)
99 {
100 	_of_ti_interface_clk_setup(node, &clkhwops_iclk);
101 }
102 CLK_OF_DECLARE(ti_no_wait_interface_clk, "ti,omap3-no-wait-interface-clock",
103 	       of_ti_no_wait_interface_clk_setup);
104 
105 #ifdef CONFIG_ARCH_OMAP3
of_ti_hsotgusb_interface_clk_setup(struct device_node * node)106 static void __init of_ti_hsotgusb_interface_clk_setup(struct device_node *node)
107 {
108 	_of_ti_interface_clk_setup(node,
109 				   &clkhwops_omap3430es2_iclk_hsotgusb_wait);
110 }
111 CLK_OF_DECLARE(ti_hsotgusb_interface_clk, "ti,omap3-hsotgusb-interface-clock",
112 	       of_ti_hsotgusb_interface_clk_setup);
113 
of_ti_dss_interface_clk_setup(struct device_node * node)114 static void __init of_ti_dss_interface_clk_setup(struct device_node *node)
115 {
116 	_of_ti_interface_clk_setup(node,
117 				   &clkhwops_omap3430es2_iclk_dss_usbhost_wait);
118 }
119 CLK_OF_DECLARE(ti_dss_interface_clk, "ti,omap3-dss-interface-clock",
120 	       of_ti_dss_interface_clk_setup);
121 
of_ti_ssi_interface_clk_setup(struct device_node * node)122 static void __init of_ti_ssi_interface_clk_setup(struct device_node *node)
123 {
124 	_of_ti_interface_clk_setup(node, &clkhwops_omap3430es2_iclk_ssi_wait);
125 }
126 CLK_OF_DECLARE(ti_ssi_interface_clk, "ti,omap3-ssi-interface-clock",
127 	       of_ti_ssi_interface_clk_setup);
128 
of_ti_am35xx_interface_clk_setup(struct device_node * node)129 static void __init of_ti_am35xx_interface_clk_setup(struct device_node *node)
130 {
131 	_of_ti_interface_clk_setup(node, &clkhwops_am35xx_ipss_wait);
132 }
133 CLK_OF_DECLARE(ti_am35xx_interface_clk, "ti,am35xx-interface-clock",
134 	       of_ti_am35xx_interface_clk_setup);
135 #endif
136 
137 #ifdef CONFIG_SOC_OMAP2430
of_ti_omap2430_interface_clk_setup(struct device_node * node)138 static void __init of_ti_omap2430_interface_clk_setup(struct device_node *node)
139 {
140 	_of_ti_interface_clk_setup(node, &clkhwops_omap2430_i2chs_wait);
141 }
142 CLK_OF_DECLARE(ti_omap2430_interface_clk, "ti,omap2430-interface-clock",
143 	       of_ti_omap2430_interface_clk_setup);
144 #endif
145