1 /*
2  * Copyright 2012-15 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: AMD
23  *
24  */
25 
26 
27 #ifndef __DAL_DPP_H__
28 #define __DAL_DPP_H__
29 
30 #include "transform.h"
31 #include "cursor_reg_cache.h"
32 
33 union defer_reg_writes {
34 	struct {
35 		bool disable_blnd_lut:1;
36 		bool disable_3dlut:1;
37 		bool disable_shaper:1;
38 		bool disable_gamcor:1;
39 		bool disable_dscl:1;
40 	} bits;
41 	uint32_t raw;
42 };
43 
44 struct dpp {
45 	const struct dpp_funcs *funcs;
46 	struct dc_context *ctx;
47 	/**
48 	 * @inst:
49 	 *
50 	 * inst stands for "instance," and it is an id number that references a
51 	 * specific DPP.
52 	 */
53 	int inst;
54 	struct dpp_caps *caps;
55 	struct pwl_params regamma_params;
56 	struct pwl_params degamma_params;
57 	struct dpp_cursor_attributes cur_attr;
58 	union defer_reg_writes deferred_reg_writes;
59 
60 	struct pwl_params shaper_params;
61 	bool cm_bypass_mode;
62 
63 	struct cursor_position_cache_dpp  pos;
64 	struct cursor_attribute_cache_dpp att;
65 };
66 
67 struct dpp_input_csc_matrix {
68 	enum dc_color_space color_space;
69 	uint16_t regval[12];
70 };
71 
72 static const struct dpp_input_csc_matrix __maybe_unused dpp_input_csc_matrix[] = {
73 	{COLOR_SPACE_SRGB,
74 		{0x2000, 0, 0, 0, 0, 0x2000, 0, 0, 0, 0, 0x2000, 0} },
75 	{COLOR_SPACE_SRGB_LIMITED,
76 		{0x2000, 0, 0, 0, 0, 0x2000, 0, 0, 0, 0, 0x2000, 0} },
77 	{COLOR_SPACE_YCBCR601,
78 		{0x2cdd, 0x2000, 0, 0xe991, 0xe926, 0x2000, 0xf4fd, 0x10ef,
79 						0, 0x2000, 0x38b4, 0xe3a6} },
80 	{COLOR_SPACE_YCBCR601_LIMITED,
81 		{0x3353, 0x2568, 0, 0xe400, 0xe5dc, 0x2568, 0xf367, 0x1108,
82 						0, 0x2568, 0x40de, 0xdd3a} },
83 	{COLOR_SPACE_YCBCR709,
84 		{0x3265, 0x2000, 0, 0xe6ce, 0xf105, 0x2000, 0xfa01, 0xa7d, 0,
85 						0x2000, 0x3b61, 0xe24f} },
86 	{COLOR_SPACE_YCBCR709_LIMITED,
87 		{0x39a6, 0x2568, 0, 0xe0d6, 0xeedd, 0x2568, 0xf925, 0x9a8, 0,
88 						0x2568, 0x43ee, 0xdbb2} },
89 	{COLOR_SPACE_2020_YCBCR,
90 		{0x2F30, 0x2000, 0, 0xE869, 0xEDB7, 0x2000, 0xFABC, 0xBC6, 0,
91 						0x2000, 0x3C34, 0xE1E6} },
92 	{COLOR_SPACE_2020_RGB_LIMITEDRANGE,
93 		{0x35E0, 0x255F, 0, 0xE2B3, 0xEB20, 0x255F, 0xF9FD, 0xB1E, 0,
94 						0x255F, 0x44BD, 0xDB43} }
95 };
96 
97 struct dpp_grph_csc_adjustment {
98 	struct fixed31_32 temperature_matrix[CSC_TEMPERATURE_MATRIX_SIZE];
99 	enum graphics_gamut_adjust_type gamut_adjust_type;
100 };
101 
102 struct cnv_color_keyer_params {
103 	int color_keyer_en;
104 	int color_keyer_mode;
105 	int color_keyer_alpha_low;
106 	int color_keyer_alpha_high;
107 	int color_keyer_red_low;
108 	int color_keyer_red_high;
109 	int color_keyer_green_low;
110 	int color_keyer_green_high;
111 	int color_keyer_blue_low;
112 	int color_keyer_blue_high;
113 };
114 
115 /* new for dcn2: set the 8bit alpha values based on the 2 bit alpha
116  *ALPHA_2BIT_LUT. ALPHA_2BIT_LUT0   default: 0b00000000
117  *ALPHA_2BIT_LUT. ALPHA_2BIT_LUT1   default: 0b01010101
118  *ALPHA_2BIT_LUT. ALPHA_2BIT_LUT2   default: 0b10101010
119  *ALPHA_2BIT_LUT. ALPHA_2BIT_LUT3   default: 0b11111111
120  */
121 struct cnv_alpha_2bit_lut {
122 	int lut0;
123 	int lut1;
124 	int lut2;
125 	int lut3;
126 };
127 
128 struct dcn_dpp_state {
129 	uint32_t is_enabled;
130 	uint32_t igam_lut_mode;
131 	uint32_t igam_input_format;
132 	uint32_t dgam_lut_mode;
133 	uint32_t rgam_lut_mode;
134 	uint32_t gamut_remap_mode;
135 	uint32_t gamut_remap_c11_c12;
136 	uint32_t gamut_remap_c13_c14;
137 	uint32_t gamut_remap_c21_c22;
138 	uint32_t gamut_remap_c23_c24;
139 	uint32_t gamut_remap_c31_c32;
140 	uint32_t gamut_remap_c33_c34;
141 };
142 
143 struct CM_bias_params {
144 	uint32_t cm_bias_cr_r;
145 	uint32_t cm_bias_y_g;
146 	uint32_t cm_bias_cb_b;
147 	uint32_t cm_bias_format;
148 };
149 
150 struct dpp_funcs {
151 	bool (*dpp_program_gamcor_lut)(
152 		struct dpp *dpp_base, const struct pwl_params *params);
153 
154 	void (*dpp_set_pre_degam)(struct dpp *dpp_base,
155 			enum dc_transfer_func_predefined tr);
156 
157 	void (*dpp_program_cm_dealpha)(struct dpp *dpp_base,
158 		uint32_t enable, uint32_t additive_blending);
159 
160 	void (*dpp_program_cm_bias)(
161 		struct dpp *dpp_base,
162 		struct CM_bias_params *bias_params);
163 
164 	void (*dpp_read_state)(struct dpp *dpp, struct dcn_dpp_state *s);
165 
166 	void (*dpp_reset)(struct dpp *dpp);
167 
168 	void (*dpp_set_scaler)(struct dpp *dpp,
169 			const struct scaler_data *scl_data);
170 
171 	void (*dpp_set_pixel_storage_depth)(
172 			struct dpp *dpp,
173 			enum lb_pixel_depth depth,
174 			const struct bit_depth_reduction_params *bit_depth_params);
175 
176 	bool (*dpp_get_optimal_number_of_taps)(
177 			struct dpp *dpp,
178 			struct scaler_data *scl_data,
179 			const struct scaling_taps *in_taps);
180 
181 	void (*dpp_set_gamut_remap)(
182 			struct dpp *dpp,
183 			const struct dpp_grph_csc_adjustment *adjust);
184 
185 	void (*dpp_set_csc_default)(
186 		struct dpp *dpp,
187 		enum dc_color_space colorspace);
188 
189 	void (*dpp_set_csc_adjustment)(
190 		struct dpp *dpp,
191 		const uint16_t *regval);
192 
193 	void (*dpp_power_on_regamma_lut)(
194 		struct dpp *dpp,
195 		bool power_on);
196 
197 	void (*dpp_program_regamma_lut)(
198 			struct dpp *dpp,
199 			const struct pwl_result_data *rgb,
200 			uint32_t num);
201 
202 	void (*dpp_configure_regamma_lut)(
203 			struct dpp *dpp,
204 			bool is_ram_a);
205 
206 	void (*dpp_program_regamma_lutb_settings)(
207 			struct dpp *dpp,
208 			const struct pwl_params *params);
209 
210 	void (*dpp_program_regamma_luta_settings)(
211 			struct dpp *dpp,
212 			const struct pwl_params *params);
213 
214 	void (*dpp_program_regamma_pwl)(
215 		struct dpp *dpp,
216 		const struct pwl_params *params,
217 		enum opp_regamma mode);
218 
219 	void (*dpp_program_bias_and_scale)(
220 			struct dpp *dpp,
221 			struct dc_bias_and_scale *params);
222 
223 	void (*dpp_set_degamma)(
224 			struct dpp *dpp_base,
225 			enum ipp_degamma_mode mode);
226 
227 	void (*dpp_program_input_lut)(
228 			struct dpp *dpp_base,
229 			const struct dc_gamma *gamma);
230 
231 	void (*dpp_program_degamma_pwl)(struct dpp *dpp_base,
232 									 const struct pwl_params *params);
233 
234 	void (*dpp_setup)(
235 			struct dpp *dpp_base,
236 			enum surface_pixel_format format,
237 			enum expansion_mode mode,
238 			struct dc_csc_transform input_csc_color_matrix,
239 			enum dc_color_space input_color_space,
240 			struct cnv_alpha_2bit_lut *alpha_2bit_lut);
241 
242 	void (*dpp_full_bypass)(struct dpp *dpp_base);
243 
244 	void (*set_cursor_attributes)(
245 			struct dpp *dpp_base,
246 			struct dc_cursor_attributes *cursor_attributes);
247 
248 	void (*set_cursor_position)(
249 			struct dpp *dpp_base,
250 			const struct dc_cursor_position *pos,
251 			const struct dc_cursor_mi_param *param,
252 			uint32_t width,
253 			uint32_t height
254 			);
255 
256 	void (*dpp_set_hdr_multiplier)(
257 			struct dpp *dpp_base,
258 			uint32_t multiplier);
259 
260 	void (*set_optional_cursor_attributes)(
261 			struct dpp *dpp_base,
262 			struct dpp_cursor_attributes *attr);
263 
264 	void (*dpp_dppclk_control)(
265 			struct dpp *dpp_base,
266 			bool dppclk_div,
267 			bool enable);
268 
269 	void (*dpp_deferred_update)(
270 			struct dpp *dpp);
271 	bool (*dpp_program_blnd_lut)(
272 			struct dpp *dpp,
273 			const struct pwl_params *params);
274 	bool (*dpp_program_shaper_lut)(
275 			struct dpp *dpp,
276 			const struct pwl_params *params);
277 	bool (*dpp_program_3dlut)(
278 			struct dpp *dpp,
279 			struct tetrahedral_params *params);
280 	void (*dpp_cnv_set_alpha_keyer)(
281 			struct dpp *dpp_base,
282 			struct cnv_color_keyer_params *color_keyer);
283 };
284 
285 
286 
287 #endif
288