1 /*
2 * Copyright 2012 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
24 #include "priv.h"
25 #include "chan.h"
26 #include "head.h"
27 #include "ior.h"
28
29 #include <nvif/class.h>
30
31 static const struct nvkm_disp_mthd_list
32 gt200_disp_ovly_mthd_base = {
33 .mthd = 0x0000,
34 .addr = 0x000000,
35 .data = {
36 { 0x0080, 0x000000 },
37 { 0x0084, 0x6109a0 },
38 { 0x0088, 0x6109c0 },
39 { 0x008c, 0x6109c8 },
40 { 0x0090, 0x6109b4 },
41 { 0x0094, 0x610970 },
42 { 0x00a0, 0x610998 },
43 { 0x00a4, 0x610964 },
44 { 0x00b0, 0x610c98 },
45 { 0x00b4, 0x610ca4 },
46 { 0x00b8, 0x610cac },
47 { 0x00c0, 0x610958 },
48 { 0x00e0, 0x6109a8 },
49 { 0x00e4, 0x6109d0 },
50 { 0x00e8, 0x6109d8 },
51 { 0x0100, 0x61094c },
52 { 0x0104, 0x610984 },
53 { 0x0108, 0x61098c },
54 { 0x0800, 0x6109f8 },
55 { 0x0808, 0x610a08 },
56 { 0x080c, 0x610a10 },
57 { 0x0810, 0x610a00 },
58 {}
59 }
60 };
61
62 static const struct nvkm_disp_chan_mthd
63 gt200_disp_ovly_mthd = {
64 .name = "Overlay",
65 .addr = 0x000540,
66 .prev = 0x000004,
67 .data = {
68 { "Global", 1, >200_disp_ovly_mthd_base },
69 {}
70 }
71 };
72
73 const struct nvkm_disp_chan_user
74 gt200_disp_ovly = {
75 .func = &nv50_disp_dmac_func,
76 .ctrl = 3,
77 .user = 3,
78 .mthd = >200_disp_ovly_mthd,
79 };
80
81 static const struct nvkm_disp_func
82 gt200_disp = {
83 .oneinit = nv50_disp_oneinit,
84 .init = nv50_disp_init,
85 .fini = nv50_disp_fini,
86 .intr = nv50_disp_intr,
87 .super = nv50_disp_super,
88 .uevent = &nv50_disp_chan_uevent,
89 .head = { .cnt = nv50_head_cnt, .new = nv50_head_new },
90 .dac = { .cnt = nv50_dac_cnt, .new = nv50_dac_new },
91 .sor = { .cnt = nv50_sor_cnt, .new = g84_sor_new },
92 .pior = { .cnt = nv50_pior_cnt, .new = nv50_pior_new },
93 .root = { 0,0,GT200_DISP },
94 .user = {
95 {{0,0, G82_DISP_CURSOR }, nvkm_disp_chan_new, & nv50_disp_curs },
96 {{0,0, G82_DISP_OVERLAY }, nvkm_disp_chan_new, & nv50_disp_oimm },
97 {{0,0,GT200_DISP_BASE_CHANNEL_DMA }, nvkm_disp_chan_new, & g84_disp_base },
98 {{0,0,GT200_DISP_CORE_CHANNEL_DMA }, nvkm_disp_core_new, & g84_disp_core },
99 {{0,0,GT200_DISP_OVERLAY_CHANNEL_DMA}, nvkm_disp_chan_new, >200_disp_ovly },
100 {}
101 },
102 };
103
104 int
gt200_disp_new(struct nvkm_device * device,enum nvkm_subdev_type type,int inst,struct nvkm_disp ** pdisp)105 gt200_disp_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
106 struct nvkm_disp **pdisp)
107 {
108 return nvkm_disp_new_(>200_disp, device, type, inst, pdisp);
109 }
110