1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * Synopsys DesignWare I2C adapter driver.
4 *
5 * Based on the TI DAVINCI I2C adapter driver.
6 *
7 * Copyright (C) 2006 Texas Instruments.
8 * Copyright (C) 2007 MontaVista Software Inc.
9 * Copyright (C) 2009 Provigent Ltd.
10 */
11 #include <linux/acpi.h>
12 #include <linux/clk-provider.h>
13 #include <linux/clk.h>
14 #include <linux/delay.h>
15 #include <linux/dmi.h>
16 #include <linux/err.h>
17 #include <linux/errno.h>
18 #include <linux/i2c.h>
19 #include <linux/interrupt.h>
20 #include <linux/io.h>
21 #include <linux/kernel.h>
22 #include <linux/mfd/syscon.h>
23 #include <linux/module.h>
24 #include <linux/of.h>
25 #include <linux/platform_device.h>
26 #include <linux/pm.h>
27 #include <linux/pm_runtime.h>
28 #include <linux/property.h>
29 #include <linux/regmap.h>
30 #include <linux/reset.h>
31 #include <linux/sched.h>
32 #include <linux/slab.h>
33 #include <linux/suspend.h>
34 #include <linux/units.h>
35
36 #include "i2c-designware-core.h"
37
i2c_dw_get_clk_rate_khz(struct dw_i2c_dev * dev)38 static u32 i2c_dw_get_clk_rate_khz(struct dw_i2c_dev *dev)
39 {
40 return clk_get_rate(dev->clk) / KILO;
41 }
42
43 #ifdef CONFIG_ACPI
44 static const struct acpi_device_id dw_i2c_acpi_match[] = {
45 { "INT33C2", 0 },
46 { "INT33C3", 0 },
47 { "INT3432", 0 },
48 { "INT3433", 0 },
49 { "80860F41", ACCESS_NO_IRQ_SUSPEND },
50 { "808622C1", ACCESS_NO_IRQ_SUSPEND },
51 { "AMD0010", ACCESS_INTR_MASK },
52 { "AMDI0010", ACCESS_INTR_MASK },
53 { "AMDI0019", ACCESS_INTR_MASK | ARBITRATION_SEMAPHORE },
54 { "AMDI0510", 0 },
55 { "APMC0D0F", 0 },
56 { "HISI02A1", 0 },
57 { "HISI02A2", 0 },
58 { "HISI02A3", 0 },
59 { "HYGO0010", ACCESS_INTR_MASK },
60 { }
61 };
62 MODULE_DEVICE_TABLE(acpi, dw_i2c_acpi_match);
63 #endif
64
65 #ifdef CONFIG_OF
66 #define BT1_I2C_CTL 0x100
67 #define BT1_I2C_CTL_ADDR_MASK GENMASK(7, 0)
68 #define BT1_I2C_CTL_WR BIT(8)
69 #define BT1_I2C_CTL_GO BIT(31)
70 #define BT1_I2C_DI 0x104
71 #define BT1_I2C_DO 0x108
72
bt1_i2c_read(void * context,unsigned int reg,unsigned int * val)73 static int bt1_i2c_read(void *context, unsigned int reg, unsigned int *val)
74 {
75 struct dw_i2c_dev *dev = context;
76 int ret;
77
78 /*
79 * Note these methods shouldn't ever fail because the system controller
80 * registers are memory mapped. We check the return value just in case.
81 */
82 ret = regmap_write(dev->sysmap, BT1_I2C_CTL,
83 BT1_I2C_CTL_GO | (reg & BT1_I2C_CTL_ADDR_MASK));
84 if (ret)
85 return ret;
86
87 return regmap_read(dev->sysmap, BT1_I2C_DO, val);
88 }
89
bt1_i2c_write(void * context,unsigned int reg,unsigned int val)90 static int bt1_i2c_write(void *context, unsigned int reg, unsigned int val)
91 {
92 struct dw_i2c_dev *dev = context;
93 int ret;
94
95 ret = regmap_write(dev->sysmap, BT1_I2C_DI, val);
96 if (ret)
97 return ret;
98
99 return regmap_write(dev->sysmap, BT1_I2C_CTL,
100 BT1_I2C_CTL_GO | BT1_I2C_CTL_WR | (reg & BT1_I2C_CTL_ADDR_MASK));
101 }
102
103 static struct regmap_config bt1_i2c_cfg = {
104 .reg_bits = 32,
105 .val_bits = 32,
106 .reg_stride = 4,
107 .fast_io = true,
108 .reg_read = bt1_i2c_read,
109 .reg_write = bt1_i2c_write,
110 .max_register = DW_IC_COMP_TYPE,
111 };
112
bt1_i2c_request_regs(struct dw_i2c_dev * dev)113 static int bt1_i2c_request_regs(struct dw_i2c_dev *dev)
114 {
115 dev->sysmap = syscon_node_to_regmap(dev->dev->of_node->parent);
116 if (IS_ERR(dev->sysmap))
117 return PTR_ERR(dev->sysmap);
118
119 dev->map = devm_regmap_init(dev->dev, NULL, dev, &bt1_i2c_cfg);
120 return PTR_ERR_OR_ZERO(dev->map);
121 }
122
123 #define MSCC_ICPU_CFG_TWI_DELAY 0x0
124 #define MSCC_ICPU_CFG_TWI_DELAY_ENABLE BIT(0)
125 #define MSCC_ICPU_CFG_TWI_SPIKE_FILTER 0x4
126
mscc_twi_set_sda_hold_time(struct dw_i2c_dev * dev)127 static int mscc_twi_set_sda_hold_time(struct dw_i2c_dev *dev)
128 {
129 writel((dev->sda_hold_time << 1) | MSCC_ICPU_CFG_TWI_DELAY_ENABLE,
130 dev->ext + MSCC_ICPU_CFG_TWI_DELAY);
131
132 return 0;
133 }
134
dw_i2c_of_configure(struct platform_device * pdev)135 static int dw_i2c_of_configure(struct platform_device *pdev)
136 {
137 struct dw_i2c_dev *dev = platform_get_drvdata(pdev);
138
139 switch (dev->flags & MODEL_MASK) {
140 case MODEL_MSCC_OCELOT:
141 dev->ext = devm_platform_ioremap_resource(pdev, 1);
142 if (!IS_ERR(dev->ext))
143 dev->set_sda_hold_time = mscc_twi_set_sda_hold_time;
144 break;
145 default:
146 break;
147 }
148
149 return 0;
150 }
151
152 static const struct of_device_id dw_i2c_of_match[] = {
153 { .compatible = "snps,designware-i2c", },
154 { .compatible = "mscc,ocelot-i2c", .data = (void *)MODEL_MSCC_OCELOT },
155 { .compatible = "baikal,bt1-sys-i2c", .data = (void *)MODEL_BAIKAL_BT1 },
156 {},
157 };
158 MODULE_DEVICE_TABLE(of, dw_i2c_of_match);
159 #else
bt1_i2c_request_regs(struct dw_i2c_dev * dev)160 static int bt1_i2c_request_regs(struct dw_i2c_dev *dev)
161 {
162 return -ENODEV;
163 }
164
dw_i2c_of_configure(struct platform_device * pdev)165 static inline int dw_i2c_of_configure(struct platform_device *pdev)
166 {
167 return -ENODEV;
168 }
169 #endif
170
dw_i2c_plat_pm_cleanup(struct dw_i2c_dev * dev)171 static void dw_i2c_plat_pm_cleanup(struct dw_i2c_dev *dev)
172 {
173 pm_runtime_disable(dev->dev);
174
175 if (dev->shared_with_punit)
176 pm_runtime_put_noidle(dev->dev);
177 }
178
dw_i2c_plat_request_regs(struct dw_i2c_dev * dev)179 static int dw_i2c_plat_request_regs(struct dw_i2c_dev *dev)
180 {
181 struct platform_device *pdev = to_platform_device(dev->dev);
182 int ret;
183
184 switch (dev->flags & MODEL_MASK) {
185 case MODEL_BAIKAL_BT1:
186 ret = bt1_i2c_request_regs(dev);
187 break;
188 default:
189 dev->base = devm_platform_ioremap_resource(pdev, 0);
190 ret = PTR_ERR_OR_ZERO(dev->base);
191 break;
192 }
193
194 return ret;
195 }
196
197 static const struct dmi_system_id dw_i2c_hwmon_class_dmi[] = {
198 {
199 .ident = "Qtechnology QT5222",
200 .matches = {
201 DMI_MATCH(DMI_SYS_VENDOR, "Qtechnology"),
202 DMI_MATCH(DMI_PRODUCT_NAME, "QT5222"),
203 },
204 },
205 { } /* terminate list */
206 };
207
208 static const struct i2c_dw_semaphore_callbacks i2c_dw_semaphore_cb_table[] = {
209 #ifdef CONFIG_I2C_DESIGNWARE_BAYTRAIL
210 {
211 .probe = i2c_dw_baytrail_probe_lock_support,
212 },
213 #endif
214 #ifdef CONFIG_I2C_DESIGNWARE_AMDPSP
215 {
216 .probe = i2c_dw_amdpsp_probe_lock_support,
217 .remove = i2c_dw_amdpsp_remove_lock_support,
218 },
219 #endif
220 {}
221 };
222
i2c_dw_probe_lock_support(struct dw_i2c_dev * dev)223 static int i2c_dw_probe_lock_support(struct dw_i2c_dev *dev)
224 {
225 const struct i2c_dw_semaphore_callbacks *ptr;
226 int i = 0;
227 int ret;
228
229 ptr = i2c_dw_semaphore_cb_table;
230
231 dev->semaphore_idx = -1;
232
233 while (ptr->probe) {
234 ret = ptr->probe(dev);
235 if (ret) {
236 /*
237 * If there is no semaphore device attached to this
238 * controller, we shouldn't abort general i2c_controller
239 * probe.
240 */
241 if (ret != -ENODEV)
242 return ret;
243
244 i++;
245 ptr++;
246 continue;
247 }
248
249 dev->semaphore_idx = i;
250 break;
251 }
252
253 return 0;
254 }
255
i2c_dw_remove_lock_support(struct dw_i2c_dev * dev)256 static void i2c_dw_remove_lock_support(struct dw_i2c_dev *dev)
257 {
258 if (dev->semaphore_idx < 0)
259 return;
260
261 if (i2c_dw_semaphore_cb_table[dev->semaphore_idx].remove)
262 i2c_dw_semaphore_cb_table[dev->semaphore_idx].remove(dev);
263 }
264
dw_i2c_plat_probe(struct platform_device * pdev)265 static int dw_i2c_plat_probe(struct platform_device *pdev)
266 {
267 struct i2c_adapter *adap;
268 struct dw_i2c_dev *dev;
269 struct i2c_timings *t;
270 int irq, ret;
271
272 irq = platform_get_irq(pdev, 0);
273 if (irq < 0)
274 return irq;
275
276 dev = devm_kzalloc(&pdev->dev, sizeof(struct dw_i2c_dev), GFP_KERNEL);
277 if (!dev)
278 return -ENOMEM;
279
280 dev->flags = (uintptr_t)device_get_match_data(&pdev->dev);
281 dev->dev = &pdev->dev;
282 dev->irq = irq;
283 platform_set_drvdata(pdev, dev);
284
285 ret = dw_i2c_plat_request_regs(dev);
286 if (ret)
287 return ret;
288
289 dev->rst = devm_reset_control_get_optional_exclusive(&pdev->dev, NULL);
290 if (IS_ERR(dev->rst))
291 return PTR_ERR(dev->rst);
292
293 reset_control_deassert(dev->rst);
294
295 t = &dev->timings;
296 i2c_parse_fw_timings(&pdev->dev, t, false);
297
298 i2c_dw_adjust_bus_speed(dev);
299
300 if (pdev->dev.of_node)
301 dw_i2c_of_configure(pdev);
302
303 if (has_acpi_companion(&pdev->dev))
304 i2c_dw_acpi_configure(&pdev->dev);
305
306 ret = i2c_dw_validate_speed(dev);
307 if (ret)
308 goto exit_reset;
309
310 ret = i2c_dw_probe_lock_support(dev);
311 if (ret)
312 goto exit_reset;
313
314 i2c_dw_configure(dev);
315
316 /* Optional interface clock */
317 dev->pclk = devm_clk_get_optional(&pdev->dev, "pclk");
318 if (IS_ERR(dev->pclk)) {
319 ret = PTR_ERR(dev->pclk);
320 goto exit_reset;
321 }
322
323 dev->clk = devm_clk_get_optional(&pdev->dev, NULL);
324 if (IS_ERR(dev->clk)) {
325 ret = PTR_ERR(dev->clk);
326 goto exit_reset;
327 }
328
329 ret = i2c_dw_prepare_clk(dev, true);
330 if (ret)
331 goto exit_reset;
332
333 if (dev->clk) {
334 u64 clk_khz;
335
336 dev->get_clk_rate_khz = i2c_dw_get_clk_rate_khz;
337 clk_khz = dev->get_clk_rate_khz(dev);
338
339 if (!dev->sda_hold_time && t->sda_hold_ns)
340 dev->sda_hold_time =
341 DIV_S64_ROUND_CLOSEST(clk_khz * t->sda_hold_ns, MICRO);
342 }
343
344 adap = &dev->adapter;
345 adap->owner = THIS_MODULE;
346 adap->class = dmi_check_system(dw_i2c_hwmon_class_dmi) ?
347 I2C_CLASS_HWMON : I2C_CLASS_DEPRECATED;
348 ACPI_COMPANION_SET(&adap->dev, ACPI_COMPANION(&pdev->dev));
349 adap->dev.of_node = pdev->dev.of_node;
350 adap->nr = -1;
351
352 if (dev->flags & ACCESS_NO_IRQ_SUSPEND) {
353 dev_pm_set_driver_flags(&pdev->dev,
354 DPM_FLAG_SMART_PREPARE);
355 } else {
356 dev_pm_set_driver_flags(&pdev->dev,
357 DPM_FLAG_SMART_PREPARE |
358 DPM_FLAG_SMART_SUSPEND);
359 }
360
361 device_enable_async_suspend(&pdev->dev);
362
363 /* The code below assumes runtime PM to be disabled. */
364 WARN_ON(pm_runtime_enabled(&pdev->dev));
365
366 pm_runtime_set_autosuspend_delay(&pdev->dev, 1000);
367 pm_runtime_use_autosuspend(&pdev->dev);
368 pm_runtime_set_active(&pdev->dev);
369
370 if (dev->shared_with_punit)
371 pm_runtime_get_noresume(&pdev->dev);
372
373 pm_runtime_enable(&pdev->dev);
374
375 ret = i2c_dw_probe(dev);
376 if (ret)
377 goto exit_probe;
378
379 return ret;
380
381 exit_probe:
382 dw_i2c_plat_pm_cleanup(dev);
383 exit_reset:
384 reset_control_assert(dev->rst);
385 return ret;
386 }
387
dw_i2c_plat_remove(struct platform_device * pdev)388 static int dw_i2c_plat_remove(struct platform_device *pdev)
389 {
390 struct dw_i2c_dev *dev = platform_get_drvdata(pdev);
391
392 pm_runtime_get_sync(&pdev->dev);
393
394 i2c_del_adapter(&dev->adapter);
395
396 dev->disable(dev);
397
398 pm_runtime_dont_use_autosuspend(&pdev->dev);
399 pm_runtime_put_sync(&pdev->dev);
400 dw_i2c_plat_pm_cleanup(dev);
401
402 i2c_dw_remove_lock_support(dev);
403
404 reset_control_assert(dev->rst);
405
406 return 0;
407 }
408
409 #ifdef CONFIG_PM_SLEEP
dw_i2c_plat_prepare(struct device * dev)410 static int dw_i2c_plat_prepare(struct device *dev)
411 {
412 /*
413 * If the ACPI companion device object is present for this device, it
414 * may be accessed during suspend and resume of other devices via I2C
415 * operation regions, so tell the PM core and middle layers to avoid
416 * skipping system suspend/resume callbacks for it in that case.
417 */
418 return !has_acpi_companion(dev);
419 }
420 #else
421 #define dw_i2c_plat_prepare NULL
422 #endif
423
424 #ifdef CONFIG_PM
dw_i2c_plat_runtime_suspend(struct device * dev)425 static int dw_i2c_plat_runtime_suspend(struct device *dev)
426 {
427 struct dw_i2c_dev *i_dev = dev_get_drvdata(dev);
428
429 if (i_dev->shared_with_punit)
430 return 0;
431
432 i_dev->disable(i_dev);
433 i2c_dw_prepare_clk(i_dev, false);
434
435 return 0;
436 }
437
dw_i2c_plat_suspend(struct device * dev)438 static int __maybe_unused dw_i2c_plat_suspend(struct device *dev)
439 {
440 struct dw_i2c_dev *i_dev = dev_get_drvdata(dev);
441
442 i2c_mark_adapter_suspended(&i_dev->adapter);
443
444 return dw_i2c_plat_runtime_suspend(dev);
445 }
446
dw_i2c_plat_runtime_resume(struct device * dev)447 static int dw_i2c_plat_runtime_resume(struct device *dev)
448 {
449 struct dw_i2c_dev *i_dev = dev_get_drvdata(dev);
450
451 if (!i_dev->shared_with_punit)
452 i2c_dw_prepare_clk(i_dev, true);
453
454 i_dev->init(i_dev);
455
456 return 0;
457 }
458
dw_i2c_plat_resume(struct device * dev)459 static int __maybe_unused dw_i2c_plat_resume(struct device *dev)
460 {
461 struct dw_i2c_dev *i_dev = dev_get_drvdata(dev);
462
463 dw_i2c_plat_runtime_resume(dev);
464 i2c_mark_adapter_resumed(&i_dev->adapter);
465
466 return 0;
467 }
468
469 static const struct dev_pm_ops dw_i2c_dev_pm_ops = {
470 .prepare = dw_i2c_plat_prepare,
471 SET_LATE_SYSTEM_SLEEP_PM_OPS(dw_i2c_plat_suspend, dw_i2c_plat_resume)
472 SET_RUNTIME_PM_OPS(dw_i2c_plat_runtime_suspend, dw_i2c_plat_runtime_resume, NULL)
473 };
474
475 #define DW_I2C_DEV_PMOPS (&dw_i2c_dev_pm_ops)
476 #else
477 #define DW_I2C_DEV_PMOPS NULL
478 #endif
479
480 /* Work with hotplug and coldplug */
481 MODULE_ALIAS("platform:i2c_designware");
482
483 static struct platform_driver dw_i2c_driver = {
484 .probe = dw_i2c_plat_probe,
485 .remove = dw_i2c_plat_remove,
486 .driver = {
487 .name = "i2c_designware",
488 .of_match_table = of_match_ptr(dw_i2c_of_match),
489 .acpi_match_table = ACPI_PTR(dw_i2c_acpi_match),
490 .pm = DW_I2C_DEV_PMOPS,
491 },
492 };
493
dw_i2c_init_driver(void)494 static int __init dw_i2c_init_driver(void)
495 {
496 return platform_driver_register(&dw_i2c_driver);
497 }
498 subsys_initcall(dw_i2c_init_driver);
499
dw_i2c_exit_driver(void)500 static void __exit dw_i2c_exit_driver(void)
501 {
502 platform_driver_unregister(&dw_i2c_driver);
503 }
504 module_exit(dw_i2c_exit_driver);
505
506 MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>");
507 MODULE_DESCRIPTION("Synopsys DesignWare I2C bus adapter");
508 MODULE_LICENSE("GPL");
509