1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright 2014-2015 Cisco Systems, Inc. and/or its affiliates. 4 * All rights reserved. 5 */ 6 7 #ifndef M00473_FREEWHEEL_MEMMAP_PACKAGE_H 8 #define M00473_FREEWHEEL_MEMMAP_PACKAGE_H 9 10 /******************************************************************* 11 * Register Block 12 * M00473_FREEWHEEL_MEMMAP_PACKAGE_VHD_REGMAP 13 *******************************************************************/ 14 struct m00473_freewheel_regmap { 15 uint32_t ctrl; /* Reg 0x0000, Default=0x0 */ 16 uint32_t status; /* Reg 0x0004 */ 17 uint32_t active_length; /* Reg 0x0008, Default=0x1fa400 */ 18 uint32_t total_length; /* Reg 0x000c, Default=0x31151b */ 19 uint32_t data_width; /* Reg 0x0010 */ 20 uint32_t output_color; /* Reg 0x0014, Default=0xffff */ 21 uint32_t clk_freq; /* Reg 0x0018 */ 22 }; 23 24 #define M00473_FREEWHEEL_REG_CTRL_OFST 0 25 #define M00473_FREEWHEEL_REG_STATUS_OFST 4 26 #define M00473_FREEWHEEL_REG_ACTIVE_LENGTH_OFST 8 27 #define M00473_FREEWHEEL_REG_TOTAL_LENGTH_OFST 12 28 #define M00473_FREEWHEEL_REG_DATA_WIDTH_OFST 16 29 #define M00473_FREEWHEEL_REG_OUTPUT_COLOR_OFST 20 30 #define M00473_FREEWHEEL_REG_CLK_FREQ_OFST 24 31 32 /******************************************************************* 33 * Bit Mask for register 34 * M00473_FREEWHEEL_MEMMAP_PACKAGE_VHD_BITMAP 35 *******************************************************************/ 36 /* ctrl [1:0] */ 37 #define M00473_CTRL_BITMAP_ENABLE_OFST (0) 38 #define M00473_CTRL_BITMAP_ENABLE_MSK (0x1 << M00473_CTRL_BITMAP_ENABLE_OFST) 39 #define M00473_CTRL_BITMAP_FORCE_FREEWHEEL_MODE_OFST (1) 40 #define M00473_CTRL_BITMAP_FORCE_FREEWHEEL_MODE_MSK (0x1 << M00473_CTRL_BITMAP_FORCE_FREEWHEEL_MODE_OFST) 41 /* status [0:0] */ 42 #define M00473_STATUS_BITMAP_FREEWHEEL_MODE_OFST (0) 43 #define M00473_STATUS_BITMAP_FREEWHEEL_MODE_MSK (0x1 << M00473_STATUS_BITMAP_FREEWHEEL_MODE_OFST) 44 45 #endif /*M00473_FREEWHEEL_MEMMAP_PACKAGE_H*/ 46