1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Copyright (c) 2021 MediaTek Inc.
4  * Author: Yunfei Dong <yunfei.dong@mediatek.com>
5  */
6 
7 #ifndef _MTK_VCODEC_DEC_HW_H_
8 #define _MTK_VCODEC_DEC_HW_H_
9 
10 #include <linux/io.h>
11 #include <linux/platform_device.h>
12 
13 #include "mtk_vcodec_drv.h"
14 
15 #define VDEC_HW_ACTIVE 0x10
16 #define VDEC_IRQ_CFG 0x11
17 #define VDEC_IRQ_CLR 0x10
18 #define VDEC_IRQ_CFG_REG 0xa4
19 
20 #define IS_SUPPORT_VDEC_HW_IRQ(hw_idx) ((hw_idx) != MTK_VDEC_LAT_SOC)
21 
22 /**
23  * enum mtk_vdec_hw_reg_idx - subdev hardware register base index
24  * @VDEC_HW_SYS : vdec soc register index
25  * @VDEC_HW_MISC: vdec misc register index
26  * @VDEC_HW_MAX : vdec supported max register index
27  */
28 enum mtk_vdec_hw_reg_idx {
29 	VDEC_HW_SYS,
30 	VDEC_HW_MISC,
31 	VDEC_HW_MAX
32 };
33 
34 /**
35  * struct mtk_vdec_hw_dev - vdec hardware driver data
36  * @plat_dev: platform device
37  * @main_dev: main device
38  * @reg_base: mapped address of MTK Vcodec registers.
39  *
40  * @curr_ctx: the context that is waiting for codec hardware
41  *
42  * @dec_irq : decoder irq resource
43  * @pm      : power management control
44  * @hw_idx  : each hardware index
45  */
46 struct mtk_vdec_hw_dev {
47 	struct platform_device *plat_dev;
48 	struct mtk_vcodec_dev *main_dev;
49 	void __iomem *reg_base[VDEC_HW_MAX];
50 
51 	struct mtk_vcodec_ctx *curr_ctx;
52 
53 	int dec_irq;
54 	struct mtk_vcodec_pm pm;
55 	int hw_idx;
56 };
57 
58 #endif /* _MTK_VCODEC_DEC_HW_H_ */
59