1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Hantro VPU codec driver
4  *
5  * Copyright (C) 2018 Rockchip Electronics Co., Ltd.
6  *	Jeffy Chen <jeffy.chen@rock-chips.com>
7  * Copyright (C) 2019 Pengutronix, Philipp Zabel <kernel@pengutronix.de>
8  * Copyright (C) 2021 Collabora Ltd, Emil Velikov <emil.velikov@collabora.com>
9  */
10 
11 #include "hantro.h"
12 #include "hantro_g1_regs.h"
13 
hantro_g1_irq(int irq,void * dev_id)14 irqreturn_t hantro_g1_irq(int irq, void *dev_id)
15 {
16 	struct hantro_dev *vpu = dev_id;
17 	enum vb2_buffer_state state;
18 	u32 status;
19 
20 	status = vdpu_read(vpu, G1_REG_INTERRUPT);
21 	state = (status & G1_REG_INTERRUPT_DEC_RDY_INT) ?
22 		 VB2_BUF_STATE_DONE : VB2_BUF_STATE_ERROR;
23 
24 	vdpu_write(vpu, 0, G1_REG_INTERRUPT);
25 	vdpu_write(vpu, G1_REG_CONFIG_DEC_CLK_GATE_E, G1_REG_CONFIG);
26 
27 	hantro_irq_done(vpu, state);
28 
29 	return IRQ_HANDLED;
30 }
31 
hantro_g1_reset(struct hantro_ctx * ctx)32 void hantro_g1_reset(struct hantro_ctx *ctx)
33 {
34 	struct hantro_dev *vpu = ctx->dev;
35 
36 	vdpu_write(vpu, G1_REG_INTERRUPT_DEC_IRQ_DIS, G1_REG_INTERRUPT);
37 	vdpu_write(vpu, G1_REG_CONFIG_DEC_CLK_GATE_E, G1_REG_CONFIG);
38 	vdpu_write(vpu, 1, G1_REG_SOFT_RESET);
39 }
40