1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /****************************************************************************
3  * Driver for Solarflare network controllers and boards
4  * Copyright 2019 Solarflare Communications Inc.
5  * Copyright 2020-2022 Xilinx Inc.
6  *
7  * This program is free software; you can redistribute it and/or modify it
8  * under the terms of the GNU General Public License version 2 as published
9  * by the Free Software Foundation, incorporated herein by reference.
10  */
11 
12 #ifndef EFX_TC_H
13 #define EFX_TC_H
14 #include <net/flow_offload.h>
15 #include <linux/rhashtable.h>
16 #include "net_driver.h"
17 #include "tc_counters.h"
18 
19 #define IS_ALL_ONES(v)	(!(typeof (v))~(v))
20 
21 struct efx_tc_action_set {
22 	u16 deliver:1;
23 	struct efx_tc_counter_index *count;
24 	u32 dest_mport;
25 	u32 fw_id; /* index of this entry in firmware actions table */
26 	struct list_head list;
27 };
28 
29 struct efx_tc_match_fields {
30 	/* L1 */
31 	u32 ingress_port;
32 	u8 recirc_id;
33 	/* L2 (inner when encap) */
34 	__be16 eth_proto;
35 	__be16 vlan_tci[2], vlan_proto[2];
36 	u8 eth_saddr[ETH_ALEN], eth_daddr[ETH_ALEN];
37 	/* L3 (when IP) */
38 	u8 ip_proto, ip_tos, ip_ttl;
39 	__be32 src_ip, dst_ip;
40 #ifdef CONFIG_IPV6
41 	struct in6_addr src_ip6, dst_ip6;
42 #endif
43 	bool ip_frag, ip_firstfrag;
44 	/* L4 */
45 	__be16 l4_sport, l4_dport; /* Ports (UDP, TCP) */
46 	__be16 tcp_flags;
47 };
48 
49 struct efx_tc_match {
50 	struct efx_tc_match_fields value;
51 	struct efx_tc_match_fields mask;
52 };
53 
54 struct efx_tc_action_set_list {
55 	struct list_head list;
56 	u32 fw_id;
57 };
58 
59 struct efx_tc_flow_rule {
60 	unsigned long cookie;
61 	struct rhash_head linkage;
62 	struct efx_tc_match match;
63 	struct efx_tc_action_set_list acts;
64 	u32 fw_id;
65 };
66 
67 enum efx_tc_rule_prios {
68 	EFX_TC_PRIO_TC, /* Rule inserted by TC */
69 	EFX_TC_PRIO_DFLT, /* Default switch rule; one of efx_tc_default_rules */
70 	EFX_TC_PRIO__NUM
71 };
72 
73 /**
74  * struct efx_tc_state - control plane data for TC offload
75  *
76  * @caps: MAE capabilities reported by MCDI
77  * @block_list: List of &struct efx_tc_block_binding
78  * @mutex: Used to serialise operations on TC hashtables
79  * @counter_ht: Hashtable of TC counters (FW IDs and counter values)
80  * @counter_id_ht: Hashtable mapping TC counter cookies to counters
81  * @match_action_ht: Hashtable of TC match-action rules
82  * @reps_mport_id: MAE port allocated for representor RX
83  * @reps_filter_uc: VNIC filter for representor unicast RX (promisc)
84  * @reps_filter_mc: VNIC filter for representor multicast RX (allmulti)
85  * @reps_mport_vport_id: vport_id for representor RX filters
86  * @flush_counters: counters have been stopped, waiting for drain
87  * @flush_gen: final generation count per type array as reported by
88  *             MC_CMD_MAE_COUNTERS_STREAM_STOP
89  * @seen_gen: most recent generation count per type as seen by efx_tc_rx()
90  * @flush_wq: wait queue used by efx_mae_stop_counters() to wait for
91  *	MAE counters RXQ to finish draining
92  * @dflt: Match-action rules for default switching; at priority
93  *	%EFX_TC_PRIO_DFLT.  Named by *ingress* port
94  * @dflt.pf: rule for traffic ingressing from PF (egresses to wire)
95  * @dflt.wire: rule for traffic ingressing from wire (egresses to PF)
96  * @up: have TC datastructures been set up?
97  */
98 struct efx_tc_state {
99 	struct mae_caps *caps;
100 	struct list_head block_list;
101 	struct mutex mutex;
102 	struct rhashtable counter_ht;
103 	struct rhashtable counter_id_ht;
104 	struct rhashtable match_action_ht;
105 	u32 reps_mport_id, reps_mport_vport_id;
106 	s32 reps_filter_uc, reps_filter_mc;
107 	bool flush_counters;
108 	u32 flush_gen[EFX_TC_COUNTER_TYPE_MAX];
109 	u32 seen_gen[EFX_TC_COUNTER_TYPE_MAX];
110 	wait_queue_head_t flush_wq;
111 	struct {
112 		struct efx_tc_flow_rule pf;
113 		struct efx_tc_flow_rule wire;
114 	} dflt;
115 	bool up;
116 };
117 
118 struct efx_rep;
119 
120 int efx_tc_configure_default_rule_rep(struct efx_rep *efv);
121 void efx_tc_deconfigure_default_rule(struct efx_nic *efx,
122 				     struct efx_tc_flow_rule *rule);
123 int efx_tc_flower(struct efx_nic *efx, struct net_device *net_dev,
124 		  struct flow_cls_offload *tc, struct efx_rep *efv);
125 
126 int efx_tc_insert_rep_filters(struct efx_nic *efx);
127 void efx_tc_remove_rep_filters(struct efx_nic *efx);
128 
129 int efx_init_tc(struct efx_nic *efx);
130 void efx_fini_tc(struct efx_nic *efx);
131 
132 int efx_init_struct_tc(struct efx_nic *efx);
133 void efx_fini_struct_tc(struct efx_nic *efx);
134 
135 #endif /* EFX_TC_H */
136