1 // SPDX-License-Identifier: GPL-2.0
2 // LPC interface for ChromeOS Embedded Controller
3 //
4 // Copyright (C) 2012-2015 Google, Inc
5 //
6 // This driver uses the ChromeOS EC byte-level message-based protocol for
7 // communicating the keyboard state (which keys are pressed) from a keyboard EC
8 // to the AP over some bus (such as i2c, lpc, spi). The EC does debouncing,
9 // but everything else (including deghosting) is done here. The main
10 // motivation for this is to keep the EC firmware as simple as possible, since
11 // it cannot be easily upgraded and EC flash/IRAM space is relatively
12 // expensive.
13
14 #include <linux/acpi.h>
15 #include <linux/dmi.h>
16 #include <linux/delay.h>
17 #include <linux/io.h>
18 #include <linux/interrupt.h>
19 #include <linux/module.h>
20 #include <linux/platform_data/cros_ec_commands.h>
21 #include <linux/platform_data/cros_ec_proto.h>
22 #include <linux/platform_device.h>
23 #include <linux/printk.h>
24 #include <linux/reboot.h>
25 #include <linux/suspend.h>
26
27 #include "cros_ec.h"
28 #include "cros_ec_lpc_mec.h"
29
30 #define DRV_NAME "cros_ec_lpcs"
31 #define ACPI_DRV_NAME "GOOG0004"
32
33 /* True if ACPI device is present */
34 static bool cros_ec_lpc_acpi_device_found;
35
36 /**
37 * struct lpc_driver_ops - LPC driver operations
38 * @read: Copy length bytes from EC address offset into buffer dest. Returns
39 * the 8-bit checksum of all bytes read.
40 * @write: Copy length bytes from buffer msg into EC address offset. Returns
41 * the 8-bit checksum of all bytes written.
42 */
43 struct lpc_driver_ops {
44 u8 (*read)(unsigned int offset, unsigned int length, u8 *dest);
45 u8 (*write)(unsigned int offset, unsigned int length, const u8 *msg);
46 };
47
48 static struct lpc_driver_ops cros_ec_lpc_ops = { };
49
50 /*
51 * A generic instance of the read function of struct lpc_driver_ops, used for
52 * the LPC EC.
53 */
cros_ec_lpc_read_bytes(unsigned int offset,unsigned int length,u8 * dest)54 static u8 cros_ec_lpc_read_bytes(unsigned int offset, unsigned int length,
55 u8 *dest)
56 {
57 int sum = 0;
58 int i;
59
60 for (i = 0; i < length; ++i) {
61 dest[i] = inb(offset + i);
62 sum += dest[i];
63 }
64
65 /* Return checksum of all bytes read */
66 return sum;
67 }
68
69 /*
70 * A generic instance of the write function of struct lpc_driver_ops, used for
71 * the LPC EC.
72 */
cros_ec_lpc_write_bytes(unsigned int offset,unsigned int length,const u8 * msg)73 static u8 cros_ec_lpc_write_bytes(unsigned int offset, unsigned int length,
74 const u8 *msg)
75 {
76 int sum = 0;
77 int i;
78
79 for (i = 0; i < length; ++i) {
80 outb(msg[i], offset + i);
81 sum += msg[i];
82 }
83
84 /* Return checksum of all bytes written */
85 return sum;
86 }
87
88 /*
89 * An instance of the read function of struct lpc_driver_ops, used for the
90 * MEC variant of LPC EC.
91 */
cros_ec_lpc_mec_read_bytes(unsigned int offset,unsigned int length,u8 * dest)92 static u8 cros_ec_lpc_mec_read_bytes(unsigned int offset, unsigned int length,
93 u8 *dest)
94 {
95 int in_range = cros_ec_lpc_mec_in_range(offset, length);
96
97 if (in_range < 0)
98 return 0;
99
100 return in_range ?
101 cros_ec_lpc_io_bytes_mec(MEC_IO_READ,
102 offset - EC_HOST_CMD_REGION0,
103 length, dest) :
104 cros_ec_lpc_read_bytes(offset, length, dest);
105 }
106
107 /*
108 * An instance of the write function of struct lpc_driver_ops, used for the
109 * MEC variant of LPC EC.
110 */
cros_ec_lpc_mec_write_bytes(unsigned int offset,unsigned int length,const u8 * msg)111 static u8 cros_ec_lpc_mec_write_bytes(unsigned int offset, unsigned int length,
112 const u8 *msg)
113 {
114 int in_range = cros_ec_lpc_mec_in_range(offset, length);
115
116 if (in_range < 0)
117 return 0;
118
119 return in_range ?
120 cros_ec_lpc_io_bytes_mec(MEC_IO_WRITE,
121 offset - EC_HOST_CMD_REGION0,
122 length, (u8 *)msg) :
123 cros_ec_lpc_write_bytes(offset, length, msg);
124 }
125
ec_response_timed_out(void)126 static int ec_response_timed_out(void)
127 {
128 unsigned long one_second = jiffies + HZ;
129 u8 data;
130
131 usleep_range(200, 300);
132 do {
133 if (!(cros_ec_lpc_ops.read(EC_LPC_ADDR_HOST_CMD, 1, &data) &
134 EC_LPC_STATUS_BUSY_MASK))
135 return 0;
136 usleep_range(100, 200);
137 } while (time_before(jiffies, one_second));
138
139 return 1;
140 }
141
cros_ec_pkt_xfer_lpc(struct cros_ec_device * ec,struct cros_ec_command * msg)142 static int cros_ec_pkt_xfer_lpc(struct cros_ec_device *ec,
143 struct cros_ec_command *msg)
144 {
145 struct ec_host_response response;
146 u8 sum;
147 int ret = 0;
148 u8 *dout;
149
150 ret = cros_ec_prepare_tx(ec, msg);
151 if (ret < 0)
152 goto done;
153
154 /* Write buffer */
155 cros_ec_lpc_ops.write(EC_LPC_ADDR_HOST_PACKET, ret, ec->dout);
156
157 /* Here we go */
158 sum = EC_COMMAND_PROTOCOL_3;
159 cros_ec_lpc_ops.write(EC_LPC_ADDR_HOST_CMD, 1, &sum);
160
161 if (ec_response_timed_out()) {
162 dev_warn(ec->dev, "EC response timed out\n");
163 ret = -EIO;
164 goto done;
165 }
166
167 /* Check result */
168 msg->result = cros_ec_lpc_ops.read(EC_LPC_ADDR_HOST_DATA, 1, &sum);
169 ret = cros_ec_check_result(ec, msg);
170 if (ret)
171 goto done;
172
173 /* Read back response */
174 dout = (u8 *)&response;
175 sum = cros_ec_lpc_ops.read(EC_LPC_ADDR_HOST_PACKET, sizeof(response),
176 dout);
177
178 msg->result = response.result;
179
180 if (response.data_len > msg->insize) {
181 dev_err(ec->dev,
182 "packet too long (%d bytes, expected %d)",
183 response.data_len, msg->insize);
184 ret = -EMSGSIZE;
185 goto done;
186 }
187
188 /* Read response and process checksum */
189 sum += cros_ec_lpc_ops.read(EC_LPC_ADDR_HOST_PACKET +
190 sizeof(response), response.data_len,
191 msg->data);
192
193 if (sum) {
194 dev_err(ec->dev,
195 "bad packet checksum %02x\n",
196 response.checksum);
197 ret = -EBADMSG;
198 goto done;
199 }
200
201 /* Return actual amount of data received */
202 ret = response.data_len;
203 done:
204 return ret;
205 }
206
cros_ec_cmd_xfer_lpc(struct cros_ec_device * ec,struct cros_ec_command * msg)207 static int cros_ec_cmd_xfer_lpc(struct cros_ec_device *ec,
208 struct cros_ec_command *msg)
209 {
210 struct ec_lpc_host_args args;
211 u8 sum;
212 int ret = 0;
213
214 if (msg->outsize > EC_PROTO2_MAX_PARAM_SIZE ||
215 msg->insize > EC_PROTO2_MAX_PARAM_SIZE) {
216 dev_err(ec->dev,
217 "invalid buffer sizes (out %d, in %d)\n",
218 msg->outsize, msg->insize);
219 return -EINVAL;
220 }
221
222 /* Now actually send the command to the EC and get the result */
223 args.flags = EC_HOST_ARGS_FLAG_FROM_HOST;
224 args.command_version = msg->version;
225 args.data_size = msg->outsize;
226
227 /* Initialize checksum */
228 sum = msg->command + args.flags + args.command_version + args.data_size;
229
230 /* Copy data and update checksum */
231 sum += cros_ec_lpc_ops.write(EC_LPC_ADDR_HOST_PARAM, msg->outsize,
232 msg->data);
233
234 /* Finalize checksum and write args */
235 args.checksum = sum;
236 cros_ec_lpc_ops.write(EC_LPC_ADDR_HOST_ARGS, sizeof(args),
237 (u8 *)&args);
238
239 /* Here we go */
240 sum = msg->command;
241 cros_ec_lpc_ops.write(EC_LPC_ADDR_HOST_CMD, 1, &sum);
242
243 if (ec_response_timed_out()) {
244 dev_warn(ec->dev, "EC response timed out\n");
245 ret = -EIO;
246 goto done;
247 }
248
249 /* Check result */
250 msg->result = cros_ec_lpc_ops.read(EC_LPC_ADDR_HOST_DATA, 1, &sum);
251 ret = cros_ec_check_result(ec, msg);
252 if (ret)
253 goto done;
254
255 /* Read back args */
256 cros_ec_lpc_ops.read(EC_LPC_ADDR_HOST_ARGS, sizeof(args), (u8 *)&args);
257
258 if (args.data_size > msg->insize) {
259 dev_err(ec->dev,
260 "packet too long (%d bytes, expected %d)",
261 args.data_size, msg->insize);
262 ret = -ENOSPC;
263 goto done;
264 }
265
266 /* Start calculating response checksum */
267 sum = msg->command + args.flags + args.command_version + args.data_size;
268
269 /* Read response and update checksum */
270 sum += cros_ec_lpc_ops.read(EC_LPC_ADDR_HOST_PARAM, args.data_size,
271 msg->data);
272
273 /* Verify checksum */
274 if (args.checksum != sum) {
275 dev_err(ec->dev,
276 "bad packet checksum, expected %02x, got %02x\n",
277 args.checksum, sum);
278 ret = -EBADMSG;
279 goto done;
280 }
281
282 /* Return actual amount of data received */
283 ret = args.data_size;
284 done:
285 return ret;
286 }
287
288 /* Returns num bytes read, or negative on error. Doesn't need locking. */
cros_ec_lpc_readmem(struct cros_ec_device * ec,unsigned int offset,unsigned int bytes,void * dest)289 static int cros_ec_lpc_readmem(struct cros_ec_device *ec, unsigned int offset,
290 unsigned int bytes, void *dest)
291 {
292 int i = offset;
293 char *s = dest;
294 int cnt = 0;
295
296 if (offset >= EC_MEMMAP_SIZE - bytes)
297 return -EINVAL;
298
299 /* fixed length */
300 if (bytes) {
301 cros_ec_lpc_ops.read(EC_LPC_ADDR_MEMMAP + offset, bytes, s);
302 return bytes;
303 }
304
305 /* string */
306 for (; i < EC_MEMMAP_SIZE; i++, s++) {
307 cros_ec_lpc_ops.read(EC_LPC_ADDR_MEMMAP + i, 1, s);
308 cnt++;
309 if (!*s)
310 break;
311 }
312
313 return cnt;
314 }
315
cros_ec_lpc_acpi_notify(acpi_handle device,u32 value,void * data)316 static void cros_ec_lpc_acpi_notify(acpi_handle device, u32 value, void *data)
317 {
318 struct cros_ec_device *ec_dev = data;
319 bool ec_has_more_events;
320 int ret;
321
322 ec_dev->last_event_time = cros_ec_get_time_ns();
323
324 if (value == ACPI_NOTIFY_CROS_EC_PANIC) {
325 dev_emerg(ec_dev->dev, "CrOS EC Panic Reported. Shutdown is imminent!");
326 blocking_notifier_call_chain(&ec_dev->panic_notifier, 0, ec_dev);
327 /* Begin orderly shutdown. Force shutdown after 1 second. */
328 hw_protection_shutdown("CrOS EC Panic", 1000);
329 /* Do not query for other events after a panic is reported */
330 return;
331 }
332
333 if (ec_dev->mkbp_event_supported)
334 do {
335 ret = cros_ec_get_next_event(ec_dev, NULL,
336 &ec_has_more_events);
337 if (ret > 0)
338 blocking_notifier_call_chain(
339 &ec_dev->event_notifier, 0,
340 ec_dev);
341 } while (ec_has_more_events);
342
343 if (value == ACPI_NOTIFY_DEVICE_WAKE)
344 pm_system_wakeup();
345 }
346
cros_ec_lpc_probe(struct platform_device * pdev)347 static int cros_ec_lpc_probe(struct platform_device *pdev)
348 {
349 struct device *dev = &pdev->dev;
350 struct acpi_device *adev;
351 acpi_status status;
352 struct cros_ec_device *ec_dev;
353 u8 buf[2] = {};
354 int irq, ret;
355
356 /*
357 * The Framework Laptop (and possibly other non-ChromeOS devices)
358 * only exposes the eight I/O ports that are required for the Microchip EC.
359 * Requesting a larger reservation will fail.
360 */
361 if (!devm_request_region(dev, EC_HOST_CMD_REGION0,
362 EC_HOST_CMD_MEC_REGION_SIZE, dev_name(dev))) {
363 dev_err(dev, "couldn't reserve MEC region\n");
364 return -EBUSY;
365 }
366
367 cros_ec_lpc_mec_init(EC_HOST_CMD_REGION0,
368 EC_LPC_ADDR_MEMMAP + EC_MEMMAP_SIZE);
369
370 /*
371 * Read the mapped ID twice, the first one is assuming the
372 * EC is a Microchip Embedded Controller (MEC) variant, if the
373 * protocol fails, fallback to the non MEC variant and try to
374 * read again the ID.
375 */
376 cros_ec_lpc_ops.read = cros_ec_lpc_mec_read_bytes;
377 cros_ec_lpc_ops.write = cros_ec_lpc_mec_write_bytes;
378 cros_ec_lpc_ops.read(EC_LPC_ADDR_MEMMAP + EC_MEMMAP_ID, 2, buf);
379 if (buf[0] != 'E' || buf[1] != 'C') {
380 if (!devm_request_region(dev, EC_LPC_ADDR_MEMMAP, EC_MEMMAP_SIZE,
381 dev_name(dev))) {
382 dev_err(dev, "couldn't reserve memmap region\n");
383 return -EBUSY;
384 }
385
386 /* Re-assign read/write operations for the non MEC variant */
387 cros_ec_lpc_ops.read = cros_ec_lpc_read_bytes;
388 cros_ec_lpc_ops.write = cros_ec_lpc_write_bytes;
389 cros_ec_lpc_ops.read(EC_LPC_ADDR_MEMMAP + EC_MEMMAP_ID, 2,
390 buf);
391 if (buf[0] != 'E' || buf[1] != 'C') {
392 dev_err(dev, "EC ID not detected\n");
393 return -ENODEV;
394 }
395
396 /* Reserve the remaining I/O ports required by the non-MEC protocol. */
397 if (!devm_request_region(dev, EC_HOST_CMD_REGION0 + EC_HOST_CMD_MEC_REGION_SIZE,
398 EC_HOST_CMD_REGION_SIZE - EC_HOST_CMD_MEC_REGION_SIZE,
399 dev_name(dev))) {
400 dev_err(dev, "couldn't reserve remainder of region0\n");
401 return -EBUSY;
402 }
403 if (!devm_request_region(dev, EC_HOST_CMD_REGION1,
404 EC_HOST_CMD_REGION_SIZE, dev_name(dev))) {
405 dev_err(dev, "couldn't reserve region1\n");
406 return -EBUSY;
407 }
408 }
409
410 ec_dev = devm_kzalloc(dev, sizeof(*ec_dev), GFP_KERNEL);
411 if (!ec_dev)
412 return -ENOMEM;
413
414 platform_set_drvdata(pdev, ec_dev);
415 ec_dev->dev = dev;
416 ec_dev->phys_name = dev_name(dev);
417 ec_dev->cmd_xfer = cros_ec_cmd_xfer_lpc;
418 ec_dev->pkt_xfer = cros_ec_pkt_xfer_lpc;
419 ec_dev->cmd_readmem = cros_ec_lpc_readmem;
420 ec_dev->din_size = sizeof(struct ec_host_response) +
421 sizeof(struct ec_response_get_protocol_info);
422 ec_dev->dout_size = sizeof(struct ec_host_request);
423
424 /*
425 * Some boards do not have an IRQ allotted for cros_ec_lpc,
426 * which makes ENXIO an expected (and safe) scenario.
427 */
428 irq = platform_get_irq_optional(pdev, 0);
429 if (irq > 0)
430 ec_dev->irq = irq;
431 else if (irq != -ENXIO) {
432 dev_err(dev, "couldn't retrieve IRQ number (%d)\n", irq);
433 return irq;
434 }
435
436 ret = cros_ec_register(ec_dev);
437 if (ret) {
438 dev_err(dev, "couldn't register ec_dev (%d)\n", ret);
439 return ret;
440 }
441
442 /*
443 * Connect a notify handler to process MKBP messages if we have a
444 * companion ACPI device.
445 */
446 adev = ACPI_COMPANION(dev);
447 if (adev) {
448 status = acpi_install_notify_handler(adev->handle,
449 ACPI_ALL_NOTIFY,
450 cros_ec_lpc_acpi_notify,
451 ec_dev);
452 if (ACPI_FAILURE(status))
453 dev_warn(dev, "Failed to register notifier %08x\n",
454 status);
455 }
456
457 return 0;
458 }
459
cros_ec_lpc_remove(struct platform_device * pdev)460 static int cros_ec_lpc_remove(struct platform_device *pdev)
461 {
462 struct cros_ec_device *ec_dev = platform_get_drvdata(pdev);
463 struct acpi_device *adev;
464
465 adev = ACPI_COMPANION(&pdev->dev);
466 if (adev)
467 acpi_remove_notify_handler(adev->handle, ACPI_ALL_NOTIFY,
468 cros_ec_lpc_acpi_notify);
469
470 cros_ec_unregister(ec_dev);
471
472 return 0;
473 }
474
475 static const struct acpi_device_id cros_ec_lpc_acpi_device_ids[] = {
476 { ACPI_DRV_NAME, 0 },
477 { }
478 };
479 MODULE_DEVICE_TABLE(acpi, cros_ec_lpc_acpi_device_ids);
480
481 static const struct dmi_system_id cros_ec_lpc_dmi_table[] __initconst = {
482 {
483 /*
484 * Today all Chromebooks/boxes ship with Google_* as version and
485 * coreboot as bios vendor. No other systems with this
486 * combination are known to date.
487 */
488 .matches = {
489 DMI_MATCH(DMI_BIOS_VENDOR, "coreboot"),
490 DMI_MATCH(DMI_BIOS_VERSION, "Google_"),
491 },
492 },
493 {
494 /*
495 * If the box is running custom coreboot firmware then the
496 * DMI BIOS version string will not be matched by "Google_",
497 * but the system vendor string will still be matched by
498 * "GOOGLE".
499 */
500 .matches = {
501 DMI_MATCH(DMI_BIOS_VENDOR, "coreboot"),
502 DMI_MATCH(DMI_SYS_VENDOR, "GOOGLE"),
503 },
504 },
505 {
506 /* x86-link, the Chromebook Pixel. */
507 .matches = {
508 DMI_MATCH(DMI_SYS_VENDOR, "GOOGLE"),
509 DMI_MATCH(DMI_PRODUCT_NAME, "Link"),
510 },
511 },
512 {
513 /* x86-samus, the Chromebook Pixel 2. */
514 .matches = {
515 DMI_MATCH(DMI_SYS_VENDOR, "GOOGLE"),
516 DMI_MATCH(DMI_PRODUCT_NAME, "Samus"),
517 },
518 },
519 {
520 /* x86-peppy, the Acer C720 Chromebook. */
521 .matches = {
522 DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
523 DMI_MATCH(DMI_PRODUCT_NAME, "Peppy"),
524 },
525 },
526 {
527 /* x86-glimmer, the Lenovo Thinkpad Yoga 11e. */
528 .matches = {
529 DMI_MATCH(DMI_SYS_VENDOR, "GOOGLE"),
530 DMI_MATCH(DMI_PRODUCT_NAME, "Glimmer"),
531 },
532 },
533 /* A small number of non-Chromebook/box machines also use the ChromeOS EC */
534 {
535 /* the Framework Laptop */
536 .matches = {
537 DMI_MATCH(DMI_SYS_VENDOR, "Framework"),
538 DMI_MATCH(DMI_PRODUCT_NAME, "Laptop"),
539 },
540 },
541 { /* sentinel */ }
542 };
543 MODULE_DEVICE_TABLE(dmi, cros_ec_lpc_dmi_table);
544
545 #ifdef CONFIG_PM_SLEEP
cros_ec_lpc_suspend(struct device * dev)546 static int cros_ec_lpc_suspend(struct device *dev)
547 {
548 struct cros_ec_device *ec_dev = dev_get_drvdata(dev);
549
550 return cros_ec_suspend(ec_dev);
551 }
552
cros_ec_lpc_resume(struct device * dev)553 static int cros_ec_lpc_resume(struct device *dev)
554 {
555 struct cros_ec_device *ec_dev = dev_get_drvdata(dev);
556
557 return cros_ec_resume(ec_dev);
558 }
559 #endif
560
561 static const struct dev_pm_ops cros_ec_lpc_pm_ops = {
562 SET_LATE_SYSTEM_SLEEP_PM_OPS(cros_ec_lpc_suspend, cros_ec_lpc_resume)
563 };
564
565 static struct platform_driver cros_ec_lpc_driver = {
566 .driver = {
567 .name = DRV_NAME,
568 .acpi_match_table = cros_ec_lpc_acpi_device_ids,
569 .pm = &cros_ec_lpc_pm_ops,
570 /*
571 * ACPI child devices may probe before us, and they racily
572 * check our drvdata pointer. Force synchronous probe until
573 * those races are resolved.
574 */
575 .probe_type = PROBE_FORCE_SYNCHRONOUS,
576 },
577 .probe = cros_ec_lpc_probe,
578 .remove = cros_ec_lpc_remove,
579 };
580
581 static struct platform_device cros_ec_lpc_device = {
582 .name = DRV_NAME
583 };
584
cros_ec_lpc_parse_device(acpi_handle handle,u32 level,void * context,void ** retval)585 static acpi_status cros_ec_lpc_parse_device(acpi_handle handle, u32 level,
586 void *context, void **retval)
587 {
588 *(bool *)context = true;
589 return AE_CTRL_TERMINATE;
590 }
591
cros_ec_lpc_init(void)592 static int __init cros_ec_lpc_init(void)
593 {
594 int ret;
595 acpi_status status;
596
597 status = acpi_get_devices(ACPI_DRV_NAME, cros_ec_lpc_parse_device,
598 &cros_ec_lpc_acpi_device_found, NULL);
599 if (ACPI_FAILURE(status))
600 pr_warn(DRV_NAME ": Looking for %s failed\n", ACPI_DRV_NAME);
601
602 if (!cros_ec_lpc_acpi_device_found &&
603 !dmi_check_system(cros_ec_lpc_dmi_table)) {
604 pr_err(DRV_NAME ": unsupported system.\n");
605 return -ENODEV;
606 }
607
608 /* Register the driver */
609 ret = platform_driver_register(&cros_ec_lpc_driver);
610 if (ret) {
611 pr_err(DRV_NAME ": can't register driver: %d\n", ret);
612 return ret;
613 }
614
615 if (!cros_ec_lpc_acpi_device_found) {
616 /* Register the device, and it'll get hooked up automatically */
617 ret = platform_device_register(&cros_ec_lpc_device);
618 if (ret) {
619 pr_err(DRV_NAME ": can't register device: %d\n", ret);
620 platform_driver_unregister(&cros_ec_lpc_driver);
621 }
622 }
623
624 return ret;
625 }
626
cros_ec_lpc_exit(void)627 static void __exit cros_ec_lpc_exit(void)
628 {
629 if (!cros_ec_lpc_acpi_device_found)
630 platform_device_unregister(&cros_ec_lpc_device);
631 platform_driver_unregister(&cros_ec_lpc_driver);
632 }
633
634 module_init(cros_ec_lpc_init);
635 module_exit(cros_ec_lpc_exit);
636
637 MODULE_LICENSE("GPL");
638 MODULE_DESCRIPTION("ChromeOS EC LPC driver");
639