1 // SPDX-License-Identifier: GPL-2.0
2 /* Author: Dan Scally <djrscally@gmail.com> */
3 
4 #include <linux/acpi.h>
5 #include <linux/clkdev.h>
6 #include <linux/clk-provider.h>
7 #include <linux/device.h>
8 #include <linux/gpio/consumer.h>
9 #include <linux/regulator/driver.h>
10 #include <linux/slab.h>
11 
12 #include "common.h"
13 
14 /*
15  * The regulators have to have .ops to be valid, but the only ops we actually
16  * support are .enable and .disable which are handled via .ena_gpiod. Pass an
17  * empty struct to clear the check without lying about capabilities.
18  */
19 static const struct regulator_ops int3472_gpio_regulator_ops;
20 
skl_int3472_clk_prepare(struct clk_hw * hw)21 static int skl_int3472_clk_prepare(struct clk_hw *hw)
22 {
23 	struct int3472_gpio_clock *clk = to_int3472_clk(hw);
24 
25 	gpiod_set_value_cansleep(clk->ena_gpio, 1);
26 	return 0;
27 }
28 
skl_int3472_clk_unprepare(struct clk_hw * hw)29 static void skl_int3472_clk_unprepare(struct clk_hw *hw)
30 {
31 	struct int3472_gpio_clock *clk = to_int3472_clk(hw);
32 
33 	gpiod_set_value_cansleep(clk->ena_gpio, 0);
34 }
35 
skl_int3472_clk_enable(struct clk_hw * hw)36 static int skl_int3472_clk_enable(struct clk_hw *hw)
37 {
38 	/*
39 	 * We're just turning a GPIO on to enable the clock, which operation
40 	 * has the potential to sleep. Given .enable() cannot sleep, but
41 	 * .prepare() can, we toggle the GPIO in .prepare() instead. Thus,
42 	 * nothing to do here.
43 	 */
44 	return 0;
45 }
46 
skl_int3472_clk_disable(struct clk_hw * hw)47 static void skl_int3472_clk_disable(struct clk_hw *hw)
48 {
49 	/* Likewise, nothing to do here... */
50 }
51 
skl_int3472_get_clk_frequency(struct int3472_discrete_device * int3472)52 static unsigned int skl_int3472_get_clk_frequency(struct int3472_discrete_device *int3472)
53 {
54 	union acpi_object *obj;
55 	unsigned int freq;
56 
57 	obj = skl_int3472_get_acpi_buffer(int3472->sensor, "SSDB");
58 	if (IS_ERR(obj))
59 		return 0; /* report rate as 0 on error */
60 
61 	if (obj->buffer.length < CIO2_SENSOR_SSDB_MCLKSPEED_OFFSET + sizeof(u32)) {
62 		dev_err(int3472->dev, "The buffer is too small\n");
63 		kfree(obj);
64 		return 0;
65 	}
66 
67 	freq = *(u32 *)(obj->buffer.pointer + CIO2_SENSOR_SSDB_MCLKSPEED_OFFSET);
68 
69 	kfree(obj);
70 	return freq;
71 }
72 
skl_int3472_clk_recalc_rate(struct clk_hw * hw,unsigned long parent_rate)73 static unsigned long skl_int3472_clk_recalc_rate(struct clk_hw *hw,
74 						 unsigned long parent_rate)
75 {
76 	struct int3472_gpio_clock *clk = to_int3472_clk(hw);
77 
78 	return clk->frequency;
79 }
80 
81 static const struct clk_ops skl_int3472_clock_ops = {
82 	.prepare = skl_int3472_clk_prepare,
83 	.unprepare = skl_int3472_clk_unprepare,
84 	.enable = skl_int3472_clk_enable,
85 	.disable = skl_int3472_clk_disable,
86 	.recalc_rate = skl_int3472_clk_recalc_rate,
87 };
88 
skl_int3472_register_clock(struct int3472_discrete_device * int3472,struct acpi_resource_gpio * agpio,u32 polarity)89 int skl_int3472_register_clock(struct int3472_discrete_device *int3472,
90 			       struct acpi_resource_gpio *agpio, u32 polarity)
91 {
92 	char *path = agpio->resource_source.string_ptr;
93 	struct clk_init_data init = {
94 		.ops = &skl_int3472_clock_ops,
95 		.flags = CLK_GET_RATE_NOCACHE,
96 	};
97 	int ret;
98 
99 	if (int3472->clock.cl)
100 		return -EBUSY;
101 
102 	int3472->clock.ena_gpio = acpi_get_and_request_gpiod(path, agpio->pin_table[0],
103 							     "int3472,clk-enable");
104 	if (IS_ERR(int3472->clock.ena_gpio))
105 		return dev_err_probe(int3472->dev, PTR_ERR(int3472->clock.ena_gpio),
106 				     "getting clk-enable GPIO\n");
107 
108 	if (polarity == GPIO_ACTIVE_LOW)
109 		gpiod_toggle_active_low(int3472->clock.ena_gpio);
110 
111 	/* Ensure the pin is in output mode and non-active state */
112 	gpiod_direction_output(int3472->clock.ena_gpio, 0);
113 
114 	init.name = kasprintf(GFP_KERNEL, "%s-clk",
115 			      acpi_dev_name(int3472->adev));
116 	if (!init.name) {
117 		ret = -ENOMEM;
118 		goto out_put_gpio;
119 	}
120 
121 	int3472->clock.frequency = skl_int3472_get_clk_frequency(int3472);
122 
123 	int3472->clock.clk_hw.init = &init;
124 	int3472->clock.clk = clk_register(&int3472->adev->dev,
125 					  &int3472->clock.clk_hw);
126 	if (IS_ERR(int3472->clock.clk)) {
127 		ret = PTR_ERR(int3472->clock.clk);
128 		goto out_free_init_name;
129 	}
130 
131 	int3472->clock.cl = clkdev_create(int3472->clock.clk, NULL,
132 					  int3472->sensor_name);
133 	if (!int3472->clock.cl) {
134 		ret = -ENOMEM;
135 		goto err_unregister_clk;
136 	}
137 
138 	kfree(init.name);
139 	return 0;
140 
141 err_unregister_clk:
142 	clk_unregister(int3472->clock.clk);
143 out_free_init_name:
144 	kfree(init.name);
145 out_put_gpio:
146 	gpiod_put(int3472->clock.ena_gpio);
147 
148 	return ret;
149 }
150 
skl_int3472_unregister_clock(struct int3472_discrete_device * int3472)151 void skl_int3472_unregister_clock(struct int3472_discrete_device *int3472)
152 {
153 	if (!int3472->clock.cl)
154 		return;
155 
156 	clkdev_drop(int3472->clock.cl);
157 	clk_unregister(int3472->clock.clk);
158 	gpiod_put(int3472->clock.ena_gpio);
159 }
160 
skl_int3472_register_regulator(struct int3472_discrete_device * int3472,struct acpi_resource_gpio * agpio)161 int skl_int3472_register_regulator(struct int3472_discrete_device *int3472,
162 				   struct acpi_resource_gpio *agpio)
163 {
164 	const struct int3472_sensor_config *sensor_config;
165 	char *path = agpio->resource_source.string_ptr;
166 	struct regulator_consumer_supply supply_map;
167 	struct regulator_init_data init_data = { };
168 	struct regulator_config cfg = { };
169 	int ret;
170 
171 	sensor_config = int3472->sensor_config;
172 	if (IS_ERR(sensor_config)) {
173 		dev_err(int3472->dev, "No sensor module config\n");
174 		return PTR_ERR(sensor_config);
175 	}
176 
177 	if (!sensor_config->supply_map.supply) {
178 		dev_err(int3472->dev, "No supply name defined\n");
179 		return -ENODEV;
180 	}
181 
182 	init_data.constraints.valid_ops_mask = REGULATOR_CHANGE_STATUS;
183 	init_data.num_consumer_supplies = 1;
184 	supply_map = sensor_config->supply_map;
185 	supply_map.dev_name = int3472->sensor_name;
186 	init_data.consumer_supplies = &supply_map;
187 
188 	snprintf(int3472->regulator.regulator_name,
189 		 sizeof(int3472->regulator.regulator_name), "%s-regulator",
190 		 acpi_dev_name(int3472->adev));
191 	snprintf(int3472->regulator.supply_name,
192 		 GPIO_REGULATOR_SUPPLY_NAME_LENGTH, "supply-0");
193 
194 	int3472->regulator.rdesc = INT3472_REGULATOR(
195 						int3472->regulator.regulator_name,
196 						int3472->regulator.supply_name,
197 						&int3472_gpio_regulator_ops);
198 
199 	int3472->regulator.gpio = acpi_get_and_request_gpiod(path, agpio->pin_table[0],
200 							     "int3472,regulator");
201 	if (IS_ERR(int3472->regulator.gpio)) {
202 		dev_err(int3472->dev, "Failed to get regulator GPIO line\n");
203 		return PTR_ERR(int3472->regulator.gpio);
204 	}
205 
206 	/* Ensure the pin is in output mode and non-active state */
207 	gpiod_direction_output(int3472->regulator.gpio, 0);
208 
209 	cfg.dev = &int3472->adev->dev;
210 	cfg.init_data = &init_data;
211 	cfg.ena_gpiod = int3472->regulator.gpio;
212 
213 	int3472->regulator.rdev = regulator_register(int3472->dev,
214 						     &int3472->regulator.rdesc,
215 						     &cfg);
216 	if (IS_ERR(int3472->regulator.rdev)) {
217 		ret = PTR_ERR(int3472->regulator.rdev);
218 		goto err_free_gpio;
219 	}
220 
221 	return 0;
222 
223 err_free_gpio:
224 	gpiod_put(int3472->regulator.gpio);
225 
226 	return ret;
227 }
228 
skl_int3472_unregister_regulator(struct int3472_discrete_device * int3472)229 void skl_int3472_unregister_regulator(struct int3472_discrete_device *int3472)
230 {
231 	regulator_unregister(int3472->regulator.rdev);
232 	gpiod_put(int3472->regulator.gpio);
233 }
234