1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * PWM framework driver for Cirrus Logic EP93xx
4  *
5  * Copyright (c) 2009        Matthieu Crapet <mcrapet@gmail.com>
6  * Copyright (c) 2009, 2013  H Hartley Sweeten <hsweeten@visionengravers.com>
7  *
8  * EP9301/02 have only one channel:
9  *   platform device ep93xx-pwm.1 - PWMOUT1 (EGPIO14)
10  *
11  * EP9307 has only one channel:
12  *   platform device ep93xx-pwm.0 - PWMOUT
13  *
14  * EP9312/15 have two channels:
15  *   platform device ep93xx-pwm.0 - PWMOUT
16  *   platform device ep93xx-pwm.1 - PWMOUT1 (EGPIO14)
17  */
18 
19 #include <linux/module.h>
20 #include <linux/platform_device.h>
21 #include <linux/slab.h>
22 #include <linux/clk.h>
23 #include <linux/err.h>
24 #include <linux/io.h>
25 #include <linux/pwm.h>
26 
27 #include <asm/div64.h>
28 
29 #include <linux/soc/cirrus/ep93xx.h>	/* for ep93xx_pwm_{acquire,release}_gpio() */
30 
31 #define EP93XX_PWMx_TERM_COUNT	0x00
32 #define EP93XX_PWMx_DUTY_CYCLE	0x04
33 #define EP93XX_PWMx_ENABLE	0x08
34 #define EP93XX_PWMx_INVERT	0x0c
35 
36 struct ep93xx_pwm {
37 	void __iomem *base;
38 	struct clk *clk;
39 	struct pwm_chip chip;
40 };
41 
to_ep93xx_pwm(struct pwm_chip * chip)42 static inline struct ep93xx_pwm *to_ep93xx_pwm(struct pwm_chip *chip)
43 {
44 	return container_of(chip, struct ep93xx_pwm, chip);
45 }
46 
ep93xx_pwm_request(struct pwm_chip * chip,struct pwm_device * pwm)47 static int ep93xx_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm)
48 {
49 	struct platform_device *pdev = to_platform_device(chip->dev);
50 
51 	return ep93xx_pwm_acquire_gpio(pdev);
52 }
53 
ep93xx_pwm_free(struct pwm_chip * chip,struct pwm_device * pwm)54 static void ep93xx_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm)
55 {
56 	struct platform_device *pdev = to_platform_device(chip->dev);
57 
58 	ep93xx_pwm_release_gpio(pdev);
59 }
60 
ep93xx_pwm_apply(struct pwm_chip * chip,struct pwm_device * pwm,const struct pwm_state * state)61 static int ep93xx_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
62 			    const struct pwm_state *state)
63 {
64 	int ret;
65 	struct ep93xx_pwm *ep93xx_pwm = to_ep93xx_pwm(chip);
66 	bool enabled = state->enabled;
67 	void __iomem *base = ep93xx_pwm->base;
68 	unsigned long long c;
69 	unsigned long period_cycles;
70 	unsigned long duty_cycles;
71 	unsigned long term;
72 
73 	if (state->polarity != pwm->state.polarity) {
74 		if (enabled) {
75 			writew(0x0, ep93xx_pwm->base + EP93XX_PWMx_ENABLE);
76 			clk_disable_unprepare(ep93xx_pwm->clk);
77 			enabled = false;
78 		}
79 
80 		/*
81 		 * The clock needs to be enabled to access the PWM registers.
82 		 * Polarity can only be changed when the PWM is disabled.
83 		 */
84 		ret = clk_prepare_enable(ep93xx_pwm->clk);
85 		if (ret)
86 			return ret;
87 
88 		if (state->polarity == PWM_POLARITY_INVERSED)
89 			writew(0x1, ep93xx_pwm->base + EP93XX_PWMx_INVERT);
90 		else
91 			writew(0x0, ep93xx_pwm->base + EP93XX_PWMx_INVERT);
92 
93 		clk_disable_unprepare(ep93xx_pwm->clk);
94 	}
95 
96 	if (!state->enabled) {
97 		if (enabled) {
98 			writew(0x0, ep93xx_pwm->base + EP93XX_PWMx_ENABLE);
99 			clk_disable_unprepare(ep93xx_pwm->clk);
100 		}
101 
102 		return 0;
103 	}
104 
105 	/*
106 	 * The clock needs to be enabled to access the PWM registers.
107 	 * Configuration can be changed at any time.
108 	 */
109 	if (!pwm_is_enabled(pwm)) {
110 		ret = clk_prepare_enable(ep93xx_pwm->clk);
111 		if (ret)
112 			return ret;
113 	}
114 
115 	c = clk_get_rate(ep93xx_pwm->clk);
116 	c *= state->period;
117 	do_div(c, 1000000000);
118 	period_cycles = c;
119 
120 	c = period_cycles;
121 	c *= state->duty_cycle;
122 	do_div(c, state->period);
123 	duty_cycles = c;
124 
125 	if (period_cycles < 0x10000 && duty_cycles < 0x10000) {
126 		term = readw(base + EP93XX_PWMx_TERM_COUNT);
127 
128 		/* Order is important if PWM is running */
129 		if (period_cycles > term) {
130 			writew(period_cycles, base + EP93XX_PWMx_TERM_COUNT);
131 			writew(duty_cycles, base + EP93XX_PWMx_DUTY_CYCLE);
132 		} else {
133 			writew(duty_cycles, base + EP93XX_PWMx_DUTY_CYCLE);
134 			writew(period_cycles, base + EP93XX_PWMx_TERM_COUNT);
135 		}
136 		ret = 0;
137 	} else {
138 		ret = -EINVAL;
139 	}
140 
141 	if (!pwm_is_enabled(pwm))
142 		clk_disable_unprepare(ep93xx_pwm->clk);
143 
144 	if (ret)
145 		return ret;
146 
147 	if (!enabled) {
148 		ret = clk_prepare_enable(ep93xx_pwm->clk);
149 		if (ret)
150 			return ret;
151 
152 		writew(0x1, ep93xx_pwm->base + EP93XX_PWMx_ENABLE);
153 	}
154 
155 	return 0;
156 }
157 
158 static const struct pwm_ops ep93xx_pwm_ops = {
159 	.request = ep93xx_pwm_request,
160 	.free = ep93xx_pwm_free,
161 	.apply = ep93xx_pwm_apply,
162 	.owner = THIS_MODULE,
163 };
164 
ep93xx_pwm_probe(struct platform_device * pdev)165 static int ep93xx_pwm_probe(struct platform_device *pdev)
166 {
167 	struct ep93xx_pwm *ep93xx_pwm;
168 	int ret;
169 
170 	ep93xx_pwm = devm_kzalloc(&pdev->dev, sizeof(*ep93xx_pwm), GFP_KERNEL);
171 	if (!ep93xx_pwm)
172 		return -ENOMEM;
173 
174 	ep93xx_pwm->base = devm_platform_ioremap_resource(pdev, 0);
175 	if (IS_ERR(ep93xx_pwm->base))
176 		return PTR_ERR(ep93xx_pwm->base);
177 
178 	ep93xx_pwm->clk = devm_clk_get(&pdev->dev, "pwm_clk");
179 	if (IS_ERR(ep93xx_pwm->clk))
180 		return PTR_ERR(ep93xx_pwm->clk);
181 
182 	ep93xx_pwm->chip.dev = &pdev->dev;
183 	ep93xx_pwm->chip.ops = &ep93xx_pwm_ops;
184 	ep93xx_pwm->chip.npwm = 1;
185 
186 	ret = devm_pwmchip_add(&pdev->dev, &ep93xx_pwm->chip);
187 	if (ret < 0)
188 		return ret;
189 
190 	return 0;
191 }
192 
193 static struct platform_driver ep93xx_pwm_driver = {
194 	.driver = {
195 		.name = "ep93xx-pwm",
196 	},
197 	.probe = ep93xx_pwm_probe,
198 };
199 module_platform_driver(ep93xx_pwm_driver);
200 
201 MODULE_DESCRIPTION("Cirrus Logic EP93xx PWM driver");
202 MODULE_AUTHOR("Matthieu Crapet <mcrapet@gmail.com>");
203 MODULE_AUTHOR("H Hartley Sweeten <hsweeten@visionengravers.com>");
204 MODULE_ALIAS("platform:ep93xx-pwm");
205 MODULE_LICENSE("GPL");
206