1 /*
2  * Copyright 2020 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: Christian König
23  */
24 
25 #ifndef _TTM_CACHING_H_
26 #define _TTM_CACHING_H_
27 
28 #define TTM_NUM_CACHING_TYPES	3
29 
30 /**
31  * enum ttm_caching - CPU caching and BUS snooping behavior.
32  */
33 enum ttm_caching {
34 	/**
35 	 * @ttm_uncached: Most defensive option for device mappings,
36 	 * don't even allow write combining.
37 	 */
38 	ttm_uncached,
39 
40 	/**
41 	 * @ttm_write_combined: Don't cache read accesses, but allow at least
42 	 * writes to be combined.
43 	 */
44 	ttm_write_combined,
45 
46 	/**
47 	 * @ttm_cached: Fully cached like normal system memory, requires that
48 	 * devices snoop the CPU cache on accesses.
49 	 */
50 	ttm_cached
51 };
52 
53 pgprot_t ttm_prot_from_caching(enum ttm_caching caching, pgprot_t tmp);
54 
55 #endif
56