1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (c) 2018 Samsung Electronics Co., Ltd. 4 * http://www.samsung.com/ 5 * 6 * Exynos - CHIPID support 7 */ 8 #ifndef __LINUX_SOC_EXYNOS_CHIPID_H 9 #define __LINUX_SOC_EXYNOS_CHIPID_H 10 11 #define EXYNOS_CHIPID_REG_PRO_ID 0x00 12 #define EXYNOS_REV_PART_MASK 0xf 13 #define EXYNOS_REV_PART_SHIFT 4 14 #define EXYNOS_MASK 0xfffff000 15 16 #define EXYNOS_CHIPID_REG_PKG_ID 0x04 17 /* Bit field definitions for EXYNOS_CHIPID_REG_PKG_ID register */ 18 #define EXYNOS5422_IDS_OFFSET 24 19 #define EXYNOS5422_IDS_MASK 0xff 20 #define EXYNOS5422_USESG_OFFSET 3 21 #define EXYNOS5422_USESG_MASK 0x01 22 #define EXYNOS5422_SG_OFFSET 0 23 #define EXYNOS5422_SG_MASK 0x07 24 #define EXYNOS5422_TABLE_OFFSET 8 25 #define EXYNOS5422_TABLE_MASK 0x03 26 #define EXYNOS5422_SG_A_OFFSET 17 27 #define EXYNOS5422_SG_A_MASK 0x0f 28 #define EXYNOS5422_SG_B_OFFSET 21 29 #define EXYNOS5422_SG_B_MASK 0x03 30 #define EXYNOS5422_SG_BSIGN_OFFSET 23 31 #define EXYNOS5422_SG_BSIGN_MASK 0x01 32 #define EXYNOS5422_BIN2_OFFSET 12 33 #define EXYNOS5422_BIN2_MASK 0x01 34 35 #define EXYNOS_CHIPID_REG_LOT_ID 0x14 36 37 #define EXYNOS_CHIPID_REG_AUX_INFO 0x1c 38 /* Bit field definitions for EXYNOS_CHIPID_REG_AUX_INFO register */ 39 #define EXYNOS5422_TMCB_OFFSET 0 40 #define EXYNOS5422_TMCB_MASK 0x7f 41 #define EXYNOS5422_ARM_UP_OFFSET 8 42 #define EXYNOS5422_ARM_UP_MASK 0x03 43 #define EXYNOS5422_ARM_DN_OFFSET 10 44 #define EXYNOS5422_ARM_DN_MASK 0x03 45 #define EXYNOS5422_KFC_UP_OFFSET 12 46 #define EXYNOS5422_KFC_UP_MASK 0x03 47 #define EXYNOS5422_KFC_DN_OFFSET 14 48 #define EXYNOS5422_KFC_DN_MASK 0x03 49 50 #endif /*__LINUX_SOC_EXYNOS_CHIPID_H */ 51