1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  *   ALSA driver for VT1720/VT1724 (Envy24PT/Envy24HT)
4  *
5  *   Lowlevel functions for VT1720-based motherboards
6  *
7  *	Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
8  */
9 
10 #include <linux/delay.h>
11 #include <linux/interrupt.h>
12 #include <linux/init.h>
13 #include <sound/core.h>
14 
15 #include "ice1712.h"
16 #include "envy24ht.h"
17 #include "vt1720_mobo.h"
18 
19 
k8x800_init(struct snd_ice1712 * ice)20 static int k8x800_init(struct snd_ice1712 *ice)
21 {
22 	ice->vt1720 = 1;
23 
24 	/* VT1616 codec */
25 	ice->num_total_dacs = 6;
26 	ice->num_total_adcs = 2;
27 
28 	/* WM8728 codec */
29 	/* FIXME: TODO */
30 
31 	return 0;
32 }
33 
k8x800_add_controls(struct snd_ice1712 * ice)34 static int k8x800_add_controls(struct snd_ice1712 *ice)
35 {
36 	/* FIXME: needs some quirks for VT1616? */
37 	return 0;
38 }
39 
40 /* EEPROM image */
41 
42 static const unsigned char k8x800_eeprom[] = {
43 	[ICE_EEP2_SYSCONF]     = 0x01,	/* clock 256, 1ADC, 2DACs */
44 	[ICE_EEP2_ACLINK]      = 0x02,	/* ACLINK, packed */
45 	[ICE_EEP2_I2S]         = 0x00,	/* - */
46 	[ICE_EEP2_SPDIF]       = 0x00,	/* - */
47 	[ICE_EEP2_GPIO_DIR]    = 0xff,
48 	[ICE_EEP2_GPIO_DIR1]   = 0xff,
49 	[ICE_EEP2_GPIO_DIR2]   = 0x00,	/* - */
50 	[ICE_EEP2_GPIO_MASK]   = 0xff,
51 	[ICE_EEP2_GPIO_MASK1]  = 0xff,
52 	[ICE_EEP2_GPIO_MASK2]  = 0x00,	/* - */
53 	[ICE_EEP2_GPIO_STATE]  = 0x00,
54 	[ICE_EEP2_GPIO_STATE1] = 0x00,
55 	[ICE_EEP2_GPIO_STATE2] = 0x00,	/* - */
56 };
57 
58 static const unsigned char sn25p_eeprom[] = {
59 	[ICE_EEP2_SYSCONF]     = 0x01,	/* clock 256, 1ADC, 2DACs */
60 	[ICE_EEP2_ACLINK]      = 0x02,	/* ACLINK, packed */
61 	[ICE_EEP2_I2S]         = 0x00,	/* - */
62 	[ICE_EEP2_SPDIF]       = 0x41,	/* - */
63 	[ICE_EEP2_GPIO_DIR]    = 0xff,
64 	[ICE_EEP2_GPIO_DIR1]   = 0xff,
65 	[ICE_EEP2_GPIO_DIR2]   = 0x00,	/* - */
66 	[ICE_EEP2_GPIO_MASK]   = 0xff,
67 	[ICE_EEP2_GPIO_MASK1]  = 0xff,
68 	[ICE_EEP2_GPIO_MASK2]  = 0x00,	/* - */
69 	[ICE_EEP2_GPIO_STATE]  = 0x00,
70 	[ICE_EEP2_GPIO_STATE1] = 0x00,
71 	[ICE_EEP2_GPIO_STATE2] = 0x00,	/* - */
72 };
73 
74 
75 /* entry point */
76 struct snd_ice1712_card_info snd_vt1720_mobo_cards[] = {
77 	{
78 		.subvendor = VT1720_SUBDEVICE_K8X800,
79 		.name = "Albatron K8X800 Pro II",
80 		.model = "k8x800",
81 		.chip_init = k8x800_init,
82 		.build_controls = k8x800_add_controls,
83 		.eeprom_size = sizeof(k8x800_eeprom),
84 		.eeprom_data = k8x800_eeprom,
85 	},
86 	{
87 		.subvendor = VT1720_SUBDEVICE_ZNF3_150,
88 		.name = "Chaintech ZNF3-150",
89 		/* identical with k8x800 */
90 		.chip_init = k8x800_init,
91 		.build_controls = k8x800_add_controls,
92 		.eeprom_size = sizeof(k8x800_eeprom),
93 		.eeprom_data = k8x800_eeprom,
94 	},
95 	{
96 		.subvendor = VT1720_SUBDEVICE_ZNF3_250,
97 		.name = "Chaintech ZNF3-250",
98 		/* identical with k8x800 */
99 		.chip_init = k8x800_init,
100 		.build_controls = k8x800_add_controls,
101 		.eeprom_size = sizeof(k8x800_eeprom),
102 		.eeprom_data = k8x800_eeprom,
103 	},
104 	{
105 		.subvendor = VT1720_SUBDEVICE_9CJS,
106 		.name = "Chaintech 9CJS",
107 		/* identical with k8x800 */
108 		.chip_init = k8x800_init,
109 		.build_controls = k8x800_add_controls,
110 		.eeprom_size = sizeof(k8x800_eeprom),
111 		.eeprom_data = k8x800_eeprom,
112 	},
113 	{
114 		.subvendor = VT1720_SUBDEVICE_SN25P,
115 		.name = "Shuttle SN25P",
116 		.model = "sn25p",
117 		.chip_init = k8x800_init,
118 		.build_controls = k8x800_add_controls,
119 		.eeprom_size = sizeof(k8x800_eeprom),
120 		.eeprom_data = sn25p_eeprom,
121 	},
122 	{ } /* terminator */
123 };
124 
125