1 // SPDX-License-Identifier: GPL-2.0-or-later
2 // linux/sound/soc/bcm/bcm63xx-i2s.h
3 // Copyright (c) 2020 Broadcom Corporation
4 // Author: Kevin-Ke Li <kevin-ke.li@broadcom.com>
5 
6 #ifndef __BCM63XX_I2S_H
7 #define __BCM63XX_I2S_H
8 
9 #define I2S_DESC_FIFO_DEPTH		8
10 #define I2S_MISC_CFG			(0x003C)
11 #define I2S_PAD_LVL_LOOP_DIS_MASK	(1 << 2)
12 #define I2S_PAD_LVL_LOOP_DIS_ENABLE	I2S_PAD_LVL_LOOP_DIS_MASK
13 
14 #define I2S_TX_ENABLE_MASK		(1 << 31)
15 #define I2S_TX_ENABLE			I2S_TX_ENABLE_MASK
16 #define I2S_TX_OUT_R			(1 << 19)
17 #define I2S_TX_DATA_ALIGNMENT		(1 << 2)
18 #define I2S_TX_DATA_ENABLE		(1 << 1)
19 #define I2S_TX_CLOCK_ENABLE		(1 << 0)
20 
21 #define I2S_TX_DESC_OFF_LEVEL_SHIFT	12
22 #define I2S_TX_DESC_OFF_LEVEL_MASK	(0x0F << I2S_TX_DESC_OFF_LEVEL_SHIFT)
23 #define I2S_TX_DESC_IFF_LEVEL_SHIFT	8
24 #define I2S_TX_DESC_IFF_LEVEL_MASK	(0x0F << I2S_TX_DESC_IFF_LEVEL_SHIFT)
25 #define I2S_TX_DESC_OFF_INTR_EN_MSK	(1 << 1)
26 #define I2S_TX_DESC_OFF_INTR_EN	I2S_TX_DESC_OFF_INTR_EN_MSK
27 
28 #define I2S_TX_CFG			(0x0000)
29 #define I2S_TX_IRQ_CTL			(0x0004)
30 #define I2S_TX_IRQ_EN			(0x0008)
31 #define I2S_TX_IRQ_IFF_THLD		(0x000c)
32 #define I2S_TX_IRQ_OFF_THLD		(0x0010)
33 #define I2S_TX_DESC_IFF_ADDR		(0x0014)
34 #define I2S_TX_DESC_IFF_LEN		(0x0018)
35 #define I2S_TX_DESC_OFF_ADDR		(0x001C)
36 #define I2S_TX_DESC_OFF_LEN		(0x0020)
37 #define I2S_TX_CFG_2			(0x0024)
38 #define I2S_TX_SLAVE_MODE_SHIFT	13
39 #define I2S_TX_SLAVE_MODE_MASK		(1 << I2S_TX_SLAVE_MODE_SHIFT)
40 #define I2S_TX_SLAVE_MODE		I2S_TX_SLAVE_MODE_MASK
41 #define I2S_TX_MASTER_MODE		0
42 #define I2S_TX_INTR_MASK		0x0F
43 
44 #define I2S_RX_ENABLE_MASK		(1 << 31)
45 #define I2S_RX_ENABLE			I2S_RX_ENABLE_MASK
46 #define I2S_RX_IN_R			(1 << 19)
47 #define I2S_RX_DATA_ALIGNMENT		(1 << 2)
48 #define I2S_RX_CLOCK_ENABLE		(1 << 0)
49 
50 #define I2S_RX_DESC_OFF_LEVEL_SHIFT	12
51 #define I2S_RX_DESC_OFF_LEVEL_MASK	(0x0F << I2S_RX_DESC_OFF_LEVEL_SHIFT)
52 #define I2S_RX_DESC_IFF_LEVEL_SHIFT	8
53 #define I2S_RX_DESC_IFF_LEVEL_MASK	(0x0F << I2S_RX_DESC_IFF_LEVEL_SHIFT)
54 #define I2S_RX_DESC_OFF_INTR_EN_MSK	(1 << 1)
55 #define I2S_RX_DESC_OFF_INTR_EN	I2S_RX_DESC_OFF_INTR_EN_MSK
56 
57 #define I2S_RX_CFG			(0x0040) /* 20c0 */
58 #define I2S_RX_IRQ_CTL			(0x0044)
59 #define I2S_RX_IRQ_EN			(0x0048)
60 #define I2S_RX_IRQ_IFF_THLD		(0x004C)
61 #define I2S_RX_IRQ_OFF_THLD		(0x0050)
62 #define I2S_RX_DESC_IFF_ADDR		(0x0054)
63 #define I2S_RX_DESC_IFF_LEN		(0x0058)
64 #define I2S_RX_DESC_OFF_ADDR		(0x005C)
65 #define I2S_RX_DESC_OFF_LEN		(0x0060)
66 #define I2S_RX_CFG_2			(0x0064)
67 #define I2S_RX_SLAVE_MODE_SHIFT	13
68 #define I2S_RX_SLAVE_MODE_MASK		(1 << I2S_RX_SLAVE_MODE_SHIFT)
69 #define I2S_RX_SLAVE_MODE		I2S_RX_SLAVE_MODE_MASK
70 #define I2S_RX_MASTER_MODE		0
71 #define I2S_RX_INTR_MASK		0x0F
72 
73 #define I2S_REG_MAX			0x007C
74 
75 struct bcm_i2s_priv {
76 	struct device *dev;
77 	struct regmap *regmap_i2s;
78 	struct clk *i2s_clk;
79 	struct snd_pcm_substream	*play_substream;
80 	struct snd_pcm_substream	*capture_substream;
81 	struct i2s_dma_desc *play_dma_desc;
82 	struct i2s_dma_desc *capture_dma_desc;
83 };
84 
85 extern int bcm63xx_soc_platform_probe(struct platform_device *pdev,
86 				      struct bcm_i2s_priv *i2s_priv);
87 extern int bcm63xx_soc_platform_remove(struct platform_device *pdev);
88 
89 #endif
90