1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * rt715.c -- rt715 ALSA SoC audio driver
4 *
5 * Copyright(c) 2019 Realtek Semiconductor Corp.
6 *
7 * ALC715 ASoC Codec Driver based Intel Dummy SdW codec driver
8 *
9 */
10
11 #include <linux/module.h>
12 #include <linux/kernel.h>
13 #include <linux/init.h>
14 #include <linux/delay.h>
15 #include <linux/i2c.h>
16 #include <linux/pm_runtime.h>
17 #include <linux/pm.h>
18 #include <linux/soundwire/sdw.h>
19 #include <linux/gpio.h>
20 #include <linux/regmap.h>
21 #include <linux/slab.h>
22 #include <linux/platform_device.h>
23 #include <linux/regulator/consumer.h>
24 #include <linux/gpio/consumer.h>
25 #include <linux/of.h>
26 #include <linux/of_gpio.h>
27 #include <linux/of_device.h>
28 #include <sound/core.h>
29 #include <sound/pcm.h>
30 #include <sound/pcm_params.h>
31 #include <sound/sdw.h>
32 #include <sound/soc.h>
33 #include <sound/soc-dapm.h>
34 #include <sound/initval.h>
35 #include <sound/tlv.h>
36 #include <sound/hda_verbs.h>
37
38 #include "rt715.h"
39
rt715_index_write(struct regmap * regmap,unsigned int reg,unsigned int value)40 static int rt715_index_write(struct regmap *regmap, unsigned int reg,
41 unsigned int value)
42 {
43 int ret;
44 unsigned int addr = ((RT715_PRIV_INDEX_W_H) << 8) | reg;
45
46 ret = regmap_write(regmap, addr, value);
47 if (ret < 0) {
48 pr_err("Failed to set private value: %08x <= %04x %d\n", ret,
49 addr, value);
50 }
51
52 return ret;
53 }
54
rt715_get_gain(struct rt715_priv * rt715,unsigned int addr_h,unsigned int addr_l,unsigned int val_h,unsigned int * r_val,unsigned int * l_val)55 static void rt715_get_gain(struct rt715_priv *rt715, unsigned int addr_h,
56 unsigned int addr_l, unsigned int val_h,
57 unsigned int *r_val, unsigned int *l_val)
58 {
59 int ret;
60 /* R Channel */
61 *r_val = val_h << 8;
62 ret = regmap_read(rt715->regmap, addr_l, r_val);
63 if (ret < 0)
64 pr_err("Failed to get R channel gain.\n");
65
66 /* L Channel */
67 val_h |= 0x20;
68 *l_val = val_h << 8;
69 ret = regmap_read(rt715->regmap, addr_h, l_val);
70 if (ret < 0)
71 pr_err("Failed to get L channel gain.\n");
72 }
73
74 /* For Verb-Set Amplifier Gain (Verb ID = 3h) */
rt715_set_amp_gain_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)75 static int rt715_set_amp_gain_put(struct snd_kcontrol *kcontrol,
76 struct snd_ctl_elem_value *ucontrol)
77 {
78 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
79 struct snd_soc_dapm_context *dapm =
80 snd_soc_component_get_dapm(component);
81 struct soc_mixer_control *mc =
82 (struct soc_mixer_control *)kcontrol->private_value;
83 struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
84 unsigned int addr_h, addr_l, val_h, val_ll, val_lr;
85 unsigned int read_ll, read_rl, i;
86 unsigned int k_vol_changed = 0;
87
88 for (i = 0; i < 2; i++) {
89 if (ucontrol->value.integer.value[i] != rt715->kctl_2ch_vol_ori[i]) {
90 k_vol_changed = 1;
91 break;
92 }
93 }
94
95 /* Can't use update bit function, so read the original value first */
96 addr_h = mc->reg;
97 addr_l = mc->rreg;
98
99 if (mc->shift == RT715_DIR_OUT_SFT) /* output */
100 val_h = 0x80;
101 else /* input */
102 val_h = 0x0;
103
104 rt715_get_gain(rt715, addr_h, addr_l, val_h, &read_rl, &read_ll);
105
106 if (dapm->bias_level <= SND_SOC_BIAS_STANDBY)
107 regmap_write(rt715->regmap,
108 RT715_SET_AUDIO_POWER_STATE, AC_PWRST_D0);
109
110 /* L Channel */
111 rt715->kctl_2ch_vol_ori[0] = ucontrol->value.integer.value[0];
112 /* for gain */
113 val_ll = ((ucontrol->value.integer.value[0]) & 0x7f);
114 if (val_ll > mc->max)
115 val_ll = mc->max;
116 /* keep mute status */
117 val_ll |= read_ll & 0x80;
118
119 /* R Channel */
120 rt715->kctl_2ch_vol_ori[1] = ucontrol->value.integer.value[1];
121 /* for gain */
122 val_lr = ((ucontrol->value.integer.value[1]) & 0x7f);
123 if (val_lr > mc->max)
124 val_lr = mc->max;
125 /* keep mute status */
126 val_lr |= read_rl & 0x80;
127
128 for (i = 0; i < 3; i++) { /* retry 3 times at most */
129
130 if (val_ll == val_lr) {
131 /* Set both L/R channels at the same time */
132 val_h = (1 << mc->shift) | (3 << 4);
133 regmap_write(rt715->regmap, addr_h,
134 (val_h << 8) | val_ll);
135 regmap_write(rt715->regmap, addr_l,
136 (val_h << 8) | val_ll);
137 } else {
138 /* Lch*/
139 val_h = (1 << mc->shift) | (1 << 5);
140 regmap_write(rt715->regmap, addr_h,
141 (val_h << 8) | val_ll);
142 /* Rch */
143 val_h = (1 << mc->shift) | (1 << 4);
144 regmap_write(rt715->regmap, addr_l,
145 (val_h << 8) | val_lr);
146 }
147 /* check result */
148 if (mc->shift == RT715_DIR_OUT_SFT) /* output */
149 val_h = 0x80;
150 else /* input */
151 val_h = 0x0;
152
153 rt715_get_gain(rt715, addr_h, addr_l, val_h,
154 &read_rl, &read_ll);
155 if (read_rl == val_lr && read_ll == val_ll)
156 break;
157 }
158
159 /* D0:power on state, D3: power saving mode */
160 if (dapm->bias_level <= SND_SOC_BIAS_STANDBY)
161 regmap_write(rt715->regmap,
162 RT715_SET_AUDIO_POWER_STATE, AC_PWRST_D3);
163 return k_vol_changed;
164 }
165
rt715_set_amp_gain_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)166 static int rt715_set_amp_gain_get(struct snd_kcontrol *kcontrol,
167 struct snd_ctl_elem_value *ucontrol)
168 {
169 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
170 struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
171 struct soc_mixer_control *mc =
172 (struct soc_mixer_control *)kcontrol->private_value;
173 unsigned int addr_h, addr_l, val_h;
174 unsigned int read_ll, read_rl;
175
176 addr_h = mc->reg;
177 addr_l = mc->rreg;
178 if (mc->shift == RT715_DIR_OUT_SFT) /* output */
179 val_h = 0x80;
180 else /* input */
181 val_h = 0x0;
182
183 rt715_get_gain(rt715, addr_h, addr_l, val_h, &read_rl, &read_ll);
184
185 if (mc->invert) {
186 /* for mute status */
187 read_ll = !(read_ll & 0x80);
188 read_rl = !(read_rl & 0x80);
189 } else {
190 /* for gain */
191 read_ll = read_ll & 0x7f;
192 read_rl = read_rl & 0x7f;
193 }
194 ucontrol->value.integer.value[0] = read_ll;
195 ucontrol->value.integer.value[1] = read_rl;
196
197 return 0;
198 }
199
rt715_set_main_switch_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)200 static int rt715_set_main_switch_put(struct snd_kcontrol *kcontrol,
201 struct snd_ctl_elem_value *ucontrol)
202 {
203 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
204 struct snd_soc_dapm_context *dapm =
205 snd_soc_component_get_dapm(component);
206 struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
207 static const unsigned int capture_reg_H[] = {
208 RT715_SET_GAIN_MIC_ADC_H, RT715_SET_GAIN_LINE_ADC_H,
209 RT715_SET_GAIN_MIX_ADC_H, RT715_SET_GAIN_MIX_ADC2_H };
210 static const unsigned int capture_reg_L[] = {
211 RT715_SET_GAIN_MIC_ADC_L, RT715_SET_GAIN_LINE_ADC_L,
212 RT715_SET_GAIN_MIX_ADC_L, RT715_SET_GAIN_MIX_ADC2_L };
213 unsigned int addr_h, addr_l, val_h = 0x0, val_ll, val_lr;
214 unsigned int k_shift = RT715_DIR_IN_SFT, k_changed = 0;
215 unsigned int read_ll, read_rl, i, j, loop_cnt = 4;
216
217 for (i = 0; i < 8; i++) {
218 if (ucontrol->value.integer.value[i] != rt715->kctl_8ch_switch_ori[i])
219 k_changed = 1;
220 }
221
222 for (j = 0; j < loop_cnt; j++) {
223 /* Can't use update bit function, so read the original value first */
224 addr_h = capture_reg_H[j];
225 addr_l = capture_reg_L[j];
226 rt715_get_gain(rt715, addr_h, addr_l, val_h, &read_rl, &read_ll);
227
228 if (dapm->bias_level <= SND_SOC_BIAS_STANDBY)
229 regmap_write(rt715->regmap,
230 RT715_SET_AUDIO_POWER_STATE, AC_PWRST_D0);
231
232 /* L Channel */
233 /* for mute */
234 rt715->kctl_8ch_switch_ori[j * 2] =
235 ucontrol->value.integer.value[j * 2];
236 val_ll = (!ucontrol->value.integer.value[j * 2]) << 7;
237 /* keep gain */
238 val_ll |= read_ll & 0x7f;
239
240 /* R Channel */
241 /* for mute */
242 rt715->kctl_8ch_switch_ori[j * 2 + 1] =
243 ucontrol->value.integer.value[j * 2 + 1];
244 val_lr = (!ucontrol->value.integer.value[j * 2 + 1]) << 7;
245 /* keep gain */
246 val_lr |= read_rl & 0x7f;
247
248 for (i = 0; i < 3; i++) { /* retry 3 times at most */
249
250 if (val_ll == val_lr) {
251 /* Set both L/R channels at the same time */
252 val_h = (1 << k_shift) | (3 << 4);
253 regmap_write(rt715->regmap, addr_h,
254 (val_h << 8) | val_ll);
255 regmap_write(rt715->regmap, addr_l,
256 (val_h << 8) | val_ll);
257 } else {
258 /* Lch*/
259 val_h = (1 << k_shift) | (1 << 5);
260 regmap_write(rt715->regmap, addr_h,
261 (val_h << 8) | val_ll);
262 /* Rch */
263 val_h = (1 << k_shift) | (1 << 4);
264 regmap_write(rt715->regmap, addr_l,
265 (val_h << 8) | val_lr);
266 }
267 val_h = 0x0;
268 rt715_get_gain(rt715, addr_h, addr_l, val_h,
269 &read_rl, &read_ll);
270 if (read_rl == val_lr && read_ll == val_ll)
271 break;
272 }
273 }
274
275 /* D0:power on state, D3: power saving mode */
276 if (dapm->bias_level <= SND_SOC_BIAS_STANDBY)
277 regmap_write(rt715->regmap,
278 RT715_SET_AUDIO_POWER_STATE, AC_PWRST_D3);
279 return k_changed;
280 }
281
rt715_set_main_switch_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)282 static int rt715_set_main_switch_get(struct snd_kcontrol *kcontrol,
283 struct snd_ctl_elem_value *ucontrol)
284 {
285 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
286 struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
287 static const unsigned int capture_reg_H[] = {
288 RT715_SET_GAIN_MIC_ADC_H, RT715_SET_GAIN_LINE_ADC_H,
289 RT715_SET_GAIN_MIX_ADC_H, RT715_SET_GAIN_MIX_ADC2_H };
290 static const unsigned int capture_reg_L[] = {
291 RT715_SET_GAIN_MIC_ADC_L, RT715_SET_GAIN_LINE_ADC_L,
292 RT715_SET_GAIN_MIX_ADC_L, RT715_SET_GAIN_MIX_ADC2_L };
293 unsigned int addr_h, addr_l, val_h = 0x0, i, loop_cnt = 4;
294 unsigned int read_ll, read_rl;
295
296 for (i = 0; i < loop_cnt; i++) {
297 addr_h = capture_reg_H[i];
298 addr_l = capture_reg_L[i];
299 rt715_get_gain(rt715, addr_h, addr_l, val_h, &read_rl, &read_ll);
300
301 ucontrol->value.integer.value[i * 2] = !(read_ll & 0x80);
302 ucontrol->value.integer.value[i * 2 + 1] = !(read_rl & 0x80);
303 }
304
305 return 0;
306 }
307
rt715_set_main_vol_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)308 static int rt715_set_main_vol_put(struct snd_kcontrol *kcontrol,
309 struct snd_ctl_elem_value *ucontrol)
310 {
311 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
312 struct snd_soc_dapm_context *dapm =
313 snd_soc_component_get_dapm(component);
314 struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
315 static const unsigned int capture_reg_H[] = {
316 RT715_SET_GAIN_MIC_ADC_H, RT715_SET_GAIN_LINE_ADC_H,
317 RT715_SET_GAIN_MIX_ADC_H, RT715_SET_GAIN_MIX_ADC2_H };
318 static const unsigned int capture_reg_L[] = {
319 RT715_SET_GAIN_MIC_ADC_L, RT715_SET_GAIN_LINE_ADC_L,
320 RT715_SET_GAIN_MIX_ADC_L, RT715_SET_GAIN_MIX_ADC2_L};
321 unsigned int addr_h, addr_l, val_h = 0x0, val_ll, val_lr;
322 unsigned int read_ll, read_rl, i, j, loop_cnt = 4, k_changed = 0;
323 unsigned int k_shift = RT715_DIR_IN_SFT, k_max = 0x3f;
324
325 for (i = 0; i < 8; i++) {
326 if (ucontrol->value.integer.value[i] != rt715->kctl_8ch_vol_ori[i])
327 k_changed = 1;
328 }
329
330 for (j = 0; j < loop_cnt; j++) {
331 addr_h = capture_reg_H[j];
332 addr_l = capture_reg_L[j];
333 rt715_get_gain(rt715, addr_h, addr_l, val_h, &read_rl, &read_ll);
334
335 if (dapm->bias_level <= SND_SOC_BIAS_STANDBY)
336 regmap_write(rt715->regmap,
337 RT715_SET_AUDIO_POWER_STATE, AC_PWRST_D0);
338
339 /* L Channel */
340 /* for gain */
341 rt715->kctl_8ch_vol_ori[j * 2] = ucontrol->value.integer.value[j * 2];
342 val_ll = ((ucontrol->value.integer.value[j * 2]) & 0x7f);
343 if (val_ll > k_max)
344 val_ll = k_max;
345 /* keep mute status */
346 val_ll |= read_ll & 0x80;
347
348 /* R Channel */
349 /* for gain */
350 rt715->kctl_8ch_vol_ori[j * 2 + 1] =
351 ucontrol->value.integer.value[j * 2 + 1];
352 val_lr = ((ucontrol->value.integer.value[j * 2 + 1]) & 0x7f);
353 if (val_lr > k_max)
354 val_lr = k_max;
355 /* keep mute status */
356 val_lr |= read_rl & 0x80;
357
358 for (i = 0; i < 3; i++) { /* retry 3 times at most */
359 if (val_ll == val_lr) {
360 /* Set both L/R channels at the same time */
361 val_h = (1 << k_shift) | (3 << 4);
362 regmap_write(rt715->regmap, addr_h,
363 (val_h << 8) | val_ll);
364 regmap_write(rt715->regmap, addr_l,
365 (val_h << 8) | val_ll);
366 } else {
367 /* Lch*/
368 val_h = (1 << k_shift) | (1 << 5);
369 regmap_write(rt715->regmap, addr_h,
370 (val_h << 8) | val_ll);
371 /* Rch */
372 val_h = (1 << k_shift) | (1 << 4);
373 regmap_write(rt715->regmap, addr_l,
374 (val_h << 8) | val_lr);
375 }
376 val_h = 0x0;
377 rt715_get_gain(rt715, addr_h, addr_l, val_h,
378 &read_rl, &read_ll);
379 if (read_rl == val_lr && read_ll == val_ll)
380 break;
381 }
382 }
383
384 /* D0:power on state, D3: power saving mode */
385 if (dapm->bias_level <= SND_SOC_BIAS_STANDBY)
386 regmap_write(rt715->regmap,
387 RT715_SET_AUDIO_POWER_STATE, AC_PWRST_D3);
388 return k_changed;
389 }
390
rt715_set_main_vol_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)391 static int rt715_set_main_vol_get(struct snd_kcontrol *kcontrol,
392 struct snd_ctl_elem_value *ucontrol)
393 {
394 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
395 struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
396 static const unsigned int capture_reg_H[] = {
397 RT715_SET_GAIN_MIC_ADC_H, RT715_SET_GAIN_LINE_ADC_H,
398 RT715_SET_GAIN_MIX_ADC_H, RT715_SET_GAIN_MIX_ADC2_H };
399 static const unsigned int capture_reg_L[] = {
400 RT715_SET_GAIN_MIC_ADC_L, RT715_SET_GAIN_LINE_ADC_L,
401 RT715_SET_GAIN_MIX_ADC_L, RT715_SET_GAIN_MIX_ADC2_L };
402 unsigned int addr_h, addr_l, val_h = 0x0, i, loop_cnt = 4;
403 unsigned int read_ll, read_rl;
404
405 for (i = 0; i < loop_cnt; i++) {
406 addr_h = capture_reg_H[i];
407 addr_l = capture_reg_L[i];
408 rt715_get_gain(rt715, addr_h, addr_l, val_h, &read_rl, &read_ll);
409
410 ucontrol->value.integer.value[i * 2] = read_ll & 0x7f;
411 ucontrol->value.integer.value[i * 2 + 1] = read_rl & 0x7f;
412 }
413
414 return 0;
415 }
416
417 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -1725, 75, 0);
418 static const DECLARE_TLV_DB_SCALE(mic_vol_tlv, 0, 1000, 0);
419
rt715_switch_info(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)420 static int rt715_switch_info(struct snd_kcontrol *kcontrol,
421 struct snd_ctl_elem_info *uinfo)
422 {
423 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
424 uinfo->count = 8;
425 uinfo->value.integer.min = 0;
426 uinfo->value.integer.max = 1;
427 return 0;
428 }
429
rt715_vol_info(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)430 static int rt715_vol_info(struct snd_kcontrol *kcontrol,
431 struct snd_ctl_elem_info *uinfo)
432 {
433 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
434 uinfo->count = 8;
435 uinfo->value.integer.min = 0;
436 uinfo->value.integer.max = 0x3f;
437 return 0;
438 }
439
440 #define SOC_DOUBLE_R_EXT(xname, reg_left, reg_right, xshift, xmax, xinvert,\
441 xhandler_get, xhandler_put) \
442 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
443 .info = snd_soc_info_volsw, \
444 .get = xhandler_get, .put = xhandler_put, \
445 .private_value = SOC_DOUBLE_R_VALUE(reg_left, reg_right, xshift, \
446 xmax, xinvert) }
447
448 #define RT715_MAIN_SWITCH_EXT(xname, xhandler_get, xhandler_put) \
449 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
450 .info = rt715_switch_info, \
451 .get = xhandler_get, .put = xhandler_put, \
452 }
453
454 #define RT715_MAIN_VOL_EXT_TLV(xname, xhandler_get, xhandler_put, tlv_array) \
455 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
456 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
457 SNDRV_CTL_ELEM_ACCESS_READWRITE, \
458 .tlv.p = (tlv_array), \
459 .info = rt715_vol_info, \
460 .get = xhandler_get, .put = xhandler_put, \
461 }
462
463 static const struct snd_kcontrol_new rt715_snd_controls[] = {
464 /* Capture switch */
465 RT715_MAIN_SWITCH_EXT("Capture Switch",
466 rt715_set_main_switch_get, rt715_set_main_switch_put),
467 /* Volume Control */
468 RT715_MAIN_VOL_EXT_TLV("Capture Volume",
469 rt715_set_main_vol_get, rt715_set_main_vol_put, in_vol_tlv),
470 /* MIC Boost Control */
471 SOC_DOUBLE_R_EXT_TLV("DMIC1 Boost", RT715_SET_GAIN_DMIC1_H,
472 RT715_SET_GAIN_DMIC1_L, RT715_DIR_IN_SFT, 3, 0,
473 rt715_set_amp_gain_get, rt715_set_amp_gain_put,
474 mic_vol_tlv),
475 SOC_DOUBLE_R_EXT_TLV("DMIC2 Boost", RT715_SET_GAIN_DMIC2_H,
476 RT715_SET_GAIN_DMIC2_L, RT715_DIR_IN_SFT, 3, 0,
477 rt715_set_amp_gain_get, rt715_set_amp_gain_put,
478 mic_vol_tlv),
479 SOC_DOUBLE_R_EXT_TLV("DMIC3 Boost", RT715_SET_GAIN_DMIC3_H,
480 RT715_SET_GAIN_DMIC3_L, RT715_DIR_IN_SFT, 3, 0,
481 rt715_set_amp_gain_get, rt715_set_amp_gain_put,
482 mic_vol_tlv),
483 SOC_DOUBLE_R_EXT_TLV("DMIC4 Boost", RT715_SET_GAIN_DMIC4_H,
484 RT715_SET_GAIN_DMIC4_L, RT715_DIR_IN_SFT, 3, 0,
485 rt715_set_amp_gain_get, rt715_set_amp_gain_put,
486 mic_vol_tlv),
487 SOC_DOUBLE_R_EXT_TLV("MIC1 Boost", RT715_SET_GAIN_MIC1_H,
488 RT715_SET_GAIN_MIC1_L, RT715_DIR_IN_SFT, 3, 0,
489 rt715_set_amp_gain_get, rt715_set_amp_gain_put,
490 mic_vol_tlv),
491 SOC_DOUBLE_R_EXT_TLV("MIC2 Boost", RT715_SET_GAIN_MIC2_H,
492 RT715_SET_GAIN_MIC2_L, RT715_DIR_IN_SFT, 3, 0,
493 rt715_set_amp_gain_get, rt715_set_amp_gain_put,
494 mic_vol_tlv),
495 SOC_DOUBLE_R_EXT_TLV("LINE1 Boost", RT715_SET_GAIN_LINE1_H,
496 RT715_SET_GAIN_LINE1_L, RT715_DIR_IN_SFT, 3, 0,
497 rt715_set_amp_gain_get, rt715_set_amp_gain_put,
498 mic_vol_tlv),
499 SOC_DOUBLE_R_EXT_TLV("LINE2 Boost", RT715_SET_GAIN_LINE2_H,
500 RT715_SET_GAIN_LINE2_L, RT715_DIR_IN_SFT, 3, 0,
501 rt715_set_amp_gain_get, rt715_set_amp_gain_put,
502 mic_vol_tlv),
503 };
504
rt715_mux_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)505 static int rt715_mux_get(struct snd_kcontrol *kcontrol,
506 struct snd_ctl_elem_value *ucontrol)
507 {
508 struct snd_soc_component *component =
509 snd_soc_dapm_kcontrol_component(kcontrol);
510 struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
511 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
512 unsigned int reg, val;
513 int ret;
514
515 /* nid = e->reg, vid = 0xf01 */
516 reg = RT715_VERB_SET_CONNECT_SEL | e->reg;
517 ret = regmap_read(rt715->regmap, reg, &val);
518 if (ret < 0) {
519 dev_err(component->dev, "%s: sdw read failed: %d\n",
520 __func__, ret);
521 return ret;
522 }
523
524 /*
525 * The first two indices of ADC Mux 24/25 are routed to the same
526 * hardware source. ie, ADC Mux 24 0/1 will both connect to MIC2.
527 * To have a unique set of inputs, we skip the index1 of the muxes.
528 */
529 if ((e->reg == RT715_MUX_IN3 || e->reg == RT715_MUX_IN4) && (val > 0))
530 val -= 1;
531 ucontrol->value.enumerated.item[0] = val;
532
533 return 0;
534 }
535
rt715_mux_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)536 static int rt715_mux_put(struct snd_kcontrol *kcontrol,
537 struct snd_ctl_elem_value *ucontrol)
538 {
539 struct snd_soc_component *component =
540 snd_soc_dapm_kcontrol_component(kcontrol);
541 struct snd_soc_dapm_context *dapm =
542 snd_soc_dapm_kcontrol_dapm(kcontrol);
543 struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
544 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
545 unsigned int *item = ucontrol->value.enumerated.item;
546 unsigned int val, val2 = 0, change, reg;
547 int ret;
548
549 if (item[0] >= e->items)
550 return -EINVAL;
551
552 /* Verb ID = 0x701h, nid = e->reg */
553 val = snd_soc_enum_item_to_val(e, item[0]) << e->shift_l;
554
555 reg = RT715_VERB_SET_CONNECT_SEL | e->reg;
556 ret = regmap_read(rt715->regmap, reg, &val2);
557 if (ret < 0) {
558 dev_err(component->dev, "%s: sdw read failed: %d\n",
559 __func__, ret);
560 return ret;
561 }
562
563 if (val == val2)
564 change = 0;
565 else
566 change = 1;
567
568 if (change) {
569 reg = RT715_VERB_SET_CONNECT_SEL | e->reg;
570 regmap_write(rt715->regmap, reg, val);
571 }
572
573 snd_soc_dapm_mux_update_power(dapm, kcontrol,
574 item[0], e, NULL);
575
576 return change;
577 }
578
579 static const char * const adc_22_23_mux_text[] = {
580 "MIC1",
581 "MIC2",
582 "LINE1",
583 "LINE2",
584 "DMIC1",
585 "DMIC2",
586 "DMIC3",
587 "DMIC4",
588 };
589
590 /*
591 * Due to mux design for nid 24 (MUX_IN3)/25 (MUX_IN4), connection index 0 and
592 * 1 will be connected to the same dmic source, therefore we skip index 1 to
593 * avoid misunderstanding on usage of dapm routing.
594 */
595 static const unsigned int rt715_adc_24_25_values[] = {
596 0,
597 2,
598 3,
599 4,
600 5,
601 };
602
603 static const char * const adc_24_mux_text[] = {
604 "MIC2",
605 "DMIC1",
606 "DMIC2",
607 "DMIC3",
608 "DMIC4",
609 };
610
611 static const char * const adc_25_mux_text[] = {
612 "MIC1",
613 "DMIC1",
614 "DMIC2",
615 "DMIC3",
616 "DMIC4",
617 };
618
619 static SOC_ENUM_SINGLE_DECL(
620 rt715_adc22_enum, RT715_MUX_IN1, 0, adc_22_23_mux_text);
621
622 static SOC_ENUM_SINGLE_DECL(
623 rt715_adc23_enum, RT715_MUX_IN2, 0, adc_22_23_mux_text);
624
625 static SOC_VALUE_ENUM_SINGLE_DECL(rt715_adc24_enum,
626 RT715_MUX_IN3, 0, 0xf,
627 adc_24_mux_text, rt715_adc_24_25_values);
628
629 static SOC_VALUE_ENUM_SINGLE_DECL(rt715_adc25_enum,
630 RT715_MUX_IN4, 0, 0xf,
631 adc_25_mux_text, rt715_adc_24_25_values);
632
633 static const struct snd_kcontrol_new rt715_adc22_mux =
634 SOC_DAPM_ENUM_EXT("ADC 22 Mux", rt715_adc22_enum,
635 rt715_mux_get, rt715_mux_put);
636
637 static const struct snd_kcontrol_new rt715_adc23_mux =
638 SOC_DAPM_ENUM_EXT("ADC 23 Mux", rt715_adc23_enum,
639 rt715_mux_get, rt715_mux_put);
640
641 static const struct snd_kcontrol_new rt715_adc24_mux =
642 SOC_DAPM_ENUM_EXT("ADC 24 Mux", rt715_adc24_enum,
643 rt715_mux_get, rt715_mux_put);
644
645 static const struct snd_kcontrol_new rt715_adc25_mux =
646 SOC_DAPM_ENUM_EXT("ADC 25 Mux", rt715_adc25_enum,
647 rt715_mux_get, rt715_mux_put);
648
649 static const struct snd_soc_dapm_widget rt715_dapm_widgets[] = {
650 SND_SOC_DAPM_INPUT("DMIC1"),
651 SND_SOC_DAPM_INPUT("DMIC2"),
652 SND_SOC_DAPM_INPUT("DMIC3"),
653 SND_SOC_DAPM_INPUT("DMIC4"),
654 SND_SOC_DAPM_INPUT("MIC1"),
655 SND_SOC_DAPM_INPUT("MIC2"),
656 SND_SOC_DAPM_INPUT("LINE1"),
657 SND_SOC_DAPM_INPUT("LINE2"),
658 SND_SOC_DAPM_ADC("ADC 07", NULL, RT715_SET_STREAMID_MIC_ADC, 4, 0),
659 SND_SOC_DAPM_ADC("ADC 08", NULL, RT715_SET_STREAMID_LINE_ADC, 4, 0),
660 SND_SOC_DAPM_ADC("ADC 09", NULL, RT715_SET_STREAMID_MIX_ADC, 4, 0),
661 SND_SOC_DAPM_ADC("ADC 27", NULL, RT715_SET_STREAMID_MIX_ADC2, 4, 0),
662 SND_SOC_DAPM_MUX("ADC 22 Mux", SND_SOC_NOPM, 0, 0,
663 &rt715_adc22_mux),
664 SND_SOC_DAPM_MUX("ADC 23 Mux", SND_SOC_NOPM, 0, 0,
665 &rt715_adc23_mux),
666 SND_SOC_DAPM_MUX("ADC 24 Mux", SND_SOC_NOPM, 0, 0,
667 &rt715_adc24_mux),
668 SND_SOC_DAPM_MUX("ADC 25 Mux", SND_SOC_NOPM, 0, 0,
669 &rt715_adc25_mux),
670 SND_SOC_DAPM_AIF_OUT("DP4TX", "DP4 Capture", 0, SND_SOC_NOPM, 0, 0),
671 SND_SOC_DAPM_AIF_OUT("DP6TX", "DP6 Capture", 0, SND_SOC_NOPM, 0, 0),
672 };
673
674 static const struct snd_soc_dapm_route rt715_audio_map[] = {
675 {"DP6TX", NULL, "ADC 09"},
676 {"DP6TX", NULL, "ADC 08"},
677 {"DP4TX", NULL, "ADC 07"},
678 {"DP4TX", NULL, "ADC 27"},
679 {"ADC 09", NULL, "ADC 22 Mux"},
680 {"ADC 08", NULL, "ADC 23 Mux"},
681 {"ADC 07", NULL, "ADC 24 Mux"},
682 {"ADC 27", NULL, "ADC 25 Mux"},
683 {"ADC 22 Mux", "MIC1", "MIC1"},
684 {"ADC 22 Mux", "MIC2", "MIC2"},
685 {"ADC 22 Mux", "LINE1", "LINE1"},
686 {"ADC 22 Mux", "LINE2", "LINE2"},
687 {"ADC 22 Mux", "DMIC1", "DMIC1"},
688 {"ADC 22 Mux", "DMIC2", "DMIC2"},
689 {"ADC 22 Mux", "DMIC3", "DMIC3"},
690 {"ADC 22 Mux", "DMIC4", "DMIC4"},
691 {"ADC 23 Mux", "MIC1", "MIC1"},
692 {"ADC 23 Mux", "MIC2", "MIC2"},
693 {"ADC 23 Mux", "LINE1", "LINE1"},
694 {"ADC 23 Mux", "LINE2", "LINE2"},
695 {"ADC 23 Mux", "DMIC1", "DMIC1"},
696 {"ADC 23 Mux", "DMIC2", "DMIC2"},
697 {"ADC 23 Mux", "DMIC3", "DMIC3"},
698 {"ADC 23 Mux", "DMIC4", "DMIC4"},
699 {"ADC 24 Mux", "MIC2", "MIC2"},
700 {"ADC 24 Mux", "DMIC1", "DMIC1"},
701 {"ADC 24 Mux", "DMIC2", "DMIC2"},
702 {"ADC 24 Mux", "DMIC3", "DMIC3"},
703 {"ADC 24 Mux", "DMIC4", "DMIC4"},
704 {"ADC 25 Mux", "MIC1", "MIC1"},
705 {"ADC 25 Mux", "DMIC1", "DMIC1"},
706 {"ADC 25 Mux", "DMIC2", "DMIC2"},
707 {"ADC 25 Mux", "DMIC3", "DMIC3"},
708 {"ADC 25 Mux", "DMIC4", "DMIC4"},
709 };
710
rt715_set_bias_level(struct snd_soc_component * component,enum snd_soc_bias_level level)711 static int rt715_set_bias_level(struct snd_soc_component *component,
712 enum snd_soc_bias_level level)
713 {
714 struct snd_soc_dapm_context *dapm =
715 snd_soc_component_get_dapm(component);
716 struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
717
718 switch (level) {
719 case SND_SOC_BIAS_PREPARE:
720 if (dapm->bias_level == SND_SOC_BIAS_STANDBY) {
721 regmap_write(rt715->regmap,
722 RT715_SET_AUDIO_POWER_STATE,
723 AC_PWRST_D0);
724 msleep(RT715_POWER_UP_DELAY_MS);
725 }
726 break;
727
728 case SND_SOC_BIAS_STANDBY:
729 regmap_write(rt715->regmap,
730 RT715_SET_AUDIO_POWER_STATE,
731 AC_PWRST_D3);
732 break;
733
734 default:
735 break;
736 }
737 dapm->bias_level = level;
738 return 0;
739 }
740
rt715_probe(struct snd_soc_component * component)741 static int rt715_probe(struct snd_soc_component *component)
742 {
743 int ret;
744
745 ret = pm_runtime_resume(component->dev);
746 if (ret < 0 && ret != -EACCES)
747 return ret;
748
749 return 0;
750 }
751
752 static const struct snd_soc_component_driver soc_codec_dev_rt715 = {
753 .probe = rt715_probe,
754 .set_bias_level = rt715_set_bias_level,
755 .controls = rt715_snd_controls,
756 .num_controls = ARRAY_SIZE(rt715_snd_controls),
757 .dapm_widgets = rt715_dapm_widgets,
758 .num_dapm_widgets = ARRAY_SIZE(rt715_dapm_widgets),
759 .dapm_routes = rt715_audio_map,
760 .num_dapm_routes = ARRAY_SIZE(rt715_audio_map),
761 .endianness = 1,
762 };
763
rt715_set_sdw_stream(struct snd_soc_dai * dai,void * sdw_stream,int direction)764 static int rt715_set_sdw_stream(struct snd_soc_dai *dai, void *sdw_stream,
765 int direction)
766 {
767
768 struct sdw_stream_data *stream;
769
770 if (!sdw_stream)
771 return 0;
772
773 stream = kzalloc(sizeof(*stream), GFP_KERNEL);
774 if (!stream)
775 return -ENOMEM;
776
777 stream->sdw_stream = sdw_stream;
778
779 /* Use tx_mask or rx_mask to configure stream tag and set dma_data */
780 snd_soc_dai_dma_data_set(dai, direction, stream);
781
782 return 0;
783 }
784
rt715_shutdown(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)785 static void rt715_shutdown(struct snd_pcm_substream *substream,
786 struct snd_soc_dai *dai)
787
788 {
789 struct sdw_stream_data *stream;
790
791 stream = snd_soc_dai_get_dma_data(dai, substream);
792 snd_soc_dai_set_dma_data(dai, substream, NULL);
793 kfree(stream);
794 }
795
rt715_pcm_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)796 static int rt715_pcm_hw_params(struct snd_pcm_substream *substream,
797 struct snd_pcm_hw_params *params,
798 struct snd_soc_dai *dai)
799 {
800 struct snd_soc_component *component = dai->component;
801 struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
802 struct sdw_stream_config stream_config = {0};
803 struct sdw_port_config port_config = {0};
804 struct sdw_stream_data *stream;
805 int retval;
806 unsigned int val = 0;
807
808 stream = snd_soc_dai_get_dma_data(dai, substream);
809
810 if (!stream)
811 return -EINVAL;
812
813 if (!rt715->slave)
814 return -EINVAL;
815
816 snd_sdw_params_to_config(substream, params, &stream_config, &port_config);
817
818 switch (dai->id) {
819 case RT715_AIF1:
820 port_config.num = 6;
821 rt715_index_write(rt715->regmap, RT715_SDW_INPUT_SEL, 0xa500);
822 break;
823 case RT715_AIF2:
824 port_config.num = 4;
825 rt715_index_write(rt715->regmap, RT715_SDW_INPUT_SEL, 0xa000);
826 break;
827 default:
828 dev_err(component->dev, "Invalid DAI id %d\n", dai->id);
829 return -EINVAL;
830 }
831
832 retval = sdw_stream_add_slave(rt715->slave, &stream_config,
833 &port_config, 1, stream->sdw_stream);
834 if (retval) {
835 dev_err(dai->dev, "Unable to configure port\n");
836 return retval;
837 }
838
839 switch (params_rate(params)) {
840 /* bit 14 0:48K 1:44.1K */
841 /* bit 15 Stream Type 0:PCM 1:Non-PCM, should always be PCM */
842 case 44100:
843 val |= 0x40 << 8;
844 break;
845 case 48000:
846 val |= 0x0 << 8;
847 break;
848 default:
849 dev_err(component->dev, "Unsupported sample rate %d\n",
850 params_rate(params));
851 return -EINVAL;
852 }
853
854 if (params_channels(params) <= 16) {
855 /* bit 3:0 Number of Channel */
856 val |= (params_channels(params) - 1);
857 } else {
858 dev_err(component->dev, "Unsupported channels %d\n",
859 params_channels(params));
860 return -EINVAL;
861 }
862
863 switch (params_width(params)) {
864 /* bit 6:4 Bits per Sample */
865 case 8:
866 break;
867 case 16:
868 val |= (0x1 << 4);
869 break;
870 case 20:
871 val |= (0x2 << 4);
872 break;
873 case 24:
874 val |= (0x3 << 4);
875 break;
876 case 32:
877 val |= (0x4 << 4);
878 break;
879 default:
880 return -EINVAL;
881 }
882
883 regmap_write(rt715->regmap, RT715_MIC_ADC_FORMAT_H, val);
884 regmap_write(rt715->regmap, RT715_MIC_LINE_FORMAT_H, val);
885 regmap_write(rt715->regmap, RT715_MIX_ADC_FORMAT_H, val);
886 regmap_write(rt715->regmap, RT715_MIX_ADC2_FORMAT_H, val);
887
888 return retval;
889 }
890
rt715_pcm_hw_free(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)891 static int rt715_pcm_hw_free(struct snd_pcm_substream *substream,
892 struct snd_soc_dai *dai)
893 {
894 struct snd_soc_component *component = dai->component;
895 struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
896 struct sdw_stream_data *stream =
897 snd_soc_dai_get_dma_data(dai, substream);
898
899 if (!rt715->slave)
900 return -EINVAL;
901
902 sdw_stream_remove_slave(rt715->slave, stream->sdw_stream);
903 return 0;
904 }
905
906 #define RT715_STEREO_RATES (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000)
907 #define RT715_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
908 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
909
910 static const struct snd_soc_dai_ops rt715_ops = {
911 .hw_params = rt715_pcm_hw_params,
912 .hw_free = rt715_pcm_hw_free,
913 .set_stream = rt715_set_sdw_stream,
914 .shutdown = rt715_shutdown,
915 };
916
917 static struct snd_soc_dai_driver rt715_dai[] = {
918 {
919 .name = "rt715-aif1",
920 .id = RT715_AIF1,
921 .capture = {
922 .stream_name = "DP6 Capture",
923 .channels_min = 1,
924 .channels_max = 2,
925 .rates = RT715_STEREO_RATES,
926 .formats = RT715_FORMATS,
927 },
928 .ops = &rt715_ops,
929 },
930 {
931 .name = "rt715-aif2",
932 .id = RT715_AIF2,
933 .capture = {
934 .stream_name = "DP4 Capture",
935 .channels_min = 1,
936 .channels_max = 2,
937 .rates = RT715_STEREO_RATES,
938 .formats = RT715_FORMATS,
939 },
940 .ops = &rt715_ops,
941 },
942 };
943
944 /* Bus clock frequency */
945 #define RT715_CLK_FREQ_9600000HZ 9600000
946 #define RT715_CLK_FREQ_12000000HZ 12000000
947 #define RT715_CLK_FREQ_6000000HZ 6000000
948 #define RT715_CLK_FREQ_4800000HZ 4800000
949 #define RT715_CLK_FREQ_2400000HZ 2400000
950 #define RT715_CLK_FREQ_12288000HZ 12288000
951
rt715_clock_config(struct device * dev)952 int rt715_clock_config(struct device *dev)
953 {
954 struct rt715_priv *rt715 = dev_get_drvdata(dev);
955 unsigned int clk_freq, value;
956
957 clk_freq = (rt715->params.curr_dr_freq >> 1);
958
959 switch (clk_freq) {
960 case RT715_CLK_FREQ_12000000HZ:
961 value = 0x0;
962 break;
963 case RT715_CLK_FREQ_6000000HZ:
964 value = 0x1;
965 break;
966 case RT715_CLK_FREQ_9600000HZ:
967 value = 0x2;
968 break;
969 case RT715_CLK_FREQ_4800000HZ:
970 value = 0x3;
971 break;
972 case RT715_CLK_FREQ_2400000HZ:
973 value = 0x4;
974 break;
975 case RT715_CLK_FREQ_12288000HZ:
976 value = 0x5;
977 break;
978 default:
979 return -EINVAL;
980 }
981
982 regmap_write(rt715->regmap, 0xe0, value);
983 regmap_write(rt715->regmap, 0xf0, value);
984
985 return 0;
986 }
987
rt715_init(struct device * dev,struct regmap * sdw_regmap,struct regmap * regmap,struct sdw_slave * slave)988 int rt715_init(struct device *dev, struct regmap *sdw_regmap,
989 struct regmap *regmap, struct sdw_slave *slave)
990 {
991 struct rt715_priv *rt715;
992 int ret;
993
994 rt715 = devm_kzalloc(dev, sizeof(*rt715), GFP_KERNEL);
995 if (!rt715)
996 return -ENOMEM;
997
998 dev_set_drvdata(dev, rt715);
999 rt715->slave = slave;
1000 rt715->regmap = regmap;
1001 rt715->sdw_regmap = sdw_regmap;
1002
1003 /*
1004 * Mark hw_init to false
1005 * HW init will be performed when device reports present
1006 */
1007 rt715->hw_init = false;
1008 rt715->first_hw_init = false;
1009
1010 ret = devm_snd_soc_register_component(dev,
1011 &soc_codec_dev_rt715,
1012 rt715_dai,
1013 ARRAY_SIZE(rt715_dai));
1014
1015 return ret;
1016 }
1017
rt715_io_init(struct device * dev,struct sdw_slave * slave)1018 int rt715_io_init(struct device *dev, struct sdw_slave *slave)
1019 {
1020 struct rt715_priv *rt715 = dev_get_drvdata(dev);
1021
1022 if (rt715->hw_init)
1023 return 0;
1024
1025 /*
1026 * PM runtime is only enabled when a Slave reports as Attached
1027 */
1028 if (!rt715->first_hw_init) {
1029 /* set autosuspend parameters */
1030 pm_runtime_set_autosuspend_delay(&slave->dev, 3000);
1031 pm_runtime_use_autosuspend(&slave->dev);
1032
1033 /* update count of parent 'active' children */
1034 pm_runtime_set_active(&slave->dev);
1035
1036 /* make sure the device does not suspend immediately */
1037 pm_runtime_mark_last_busy(&slave->dev);
1038
1039 pm_runtime_enable(&slave->dev);
1040 }
1041
1042 pm_runtime_get_noresume(&slave->dev);
1043
1044 /* Mute nid=08h/09h */
1045 regmap_write(rt715->regmap, RT715_SET_GAIN_LINE_ADC_H, 0xb080);
1046 regmap_write(rt715->regmap, RT715_SET_GAIN_MIX_ADC_H, 0xb080);
1047 /* Mute nid=07h/27h */
1048 regmap_write(rt715->regmap, RT715_SET_GAIN_MIC_ADC_H, 0xb080);
1049 regmap_write(rt715->regmap, RT715_SET_GAIN_MIX_ADC2_H, 0xb080);
1050
1051 /* Set Pin Widget */
1052 regmap_write(rt715->regmap, RT715_SET_PIN_DMIC1, 0x20);
1053 regmap_write(rt715->regmap, RT715_SET_PIN_DMIC2, 0x20);
1054 regmap_write(rt715->regmap, RT715_SET_PIN_DMIC3, 0x20);
1055 regmap_write(rt715->regmap, RT715_SET_PIN_DMIC4, 0x20);
1056 /* Set Converter Stream */
1057 regmap_write(rt715->regmap, RT715_SET_STREAMID_LINE_ADC, 0x10);
1058 regmap_write(rt715->regmap, RT715_SET_STREAMID_MIX_ADC, 0x10);
1059 regmap_write(rt715->regmap, RT715_SET_STREAMID_MIC_ADC, 0x10);
1060 regmap_write(rt715->regmap, RT715_SET_STREAMID_MIX_ADC2, 0x10);
1061 /* Set Configuration Default */
1062 regmap_write(rt715->regmap, RT715_SET_DMIC1_CONFIG_DEFAULT1, 0xd0);
1063 regmap_write(rt715->regmap, RT715_SET_DMIC1_CONFIG_DEFAULT2, 0x11);
1064 regmap_write(rt715->regmap, RT715_SET_DMIC1_CONFIG_DEFAULT3, 0xa1);
1065 regmap_write(rt715->regmap, RT715_SET_DMIC1_CONFIG_DEFAULT4, 0x81);
1066 regmap_write(rt715->regmap, RT715_SET_DMIC2_CONFIG_DEFAULT1, 0xd1);
1067 regmap_write(rt715->regmap, RT715_SET_DMIC2_CONFIG_DEFAULT2, 0x11);
1068 regmap_write(rt715->regmap, RT715_SET_DMIC2_CONFIG_DEFAULT3, 0xa1);
1069 regmap_write(rt715->regmap, RT715_SET_DMIC2_CONFIG_DEFAULT4, 0x81);
1070 regmap_write(rt715->regmap, RT715_SET_DMIC3_CONFIG_DEFAULT1, 0xd0);
1071 regmap_write(rt715->regmap, RT715_SET_DMIC3_CONFIG_DEFAULT2, 0x11);
1072 regmap_write(rt715->regmap, RT715_SET_DMIC3_CONFIG_DEFAULT3, 0xa1);
1073 regmap_write(rt715->regmap, RT715_SET_DMIC3_CONFIG_DEFAULT4, 0x81);
1074 regmap_write(rt715->regmap, RT715_SET_DMIC4_CONFIG_DEFAULT1, 0xd1);
1075 regmap_write(rt715->regmap, RT715_SET_DMIC4_CONFIG_DEFAULT2, 0x11);
1076 regmap_write(rt715->regmap, RT715_SET_DMIC4_CONFIG_DEFAULT3, 0xa1);
1077 regmap_write(rt715->regmap, RT715_SET_DMIC4_CONFIG_DEFAULT4, 0x81);
1078
1079 /* Finish Initial Settings, set power to D3 */
1080 regmap_write(rt715->regmap, RT715_SET_AUDIO_POWER_STATE, AC_PWRST_D3);
1081
1082 if (rt715->first_hw_init)
1083 regcache_mark_dirty(rt715->regmap);
1084 else
1085 rt715->first_hw_init = true;
1086
1087 /* Mark Slave initialization complete */
1088 rt715->hw_init = true;
1089
1090 pm_runtime_mark_last_busy(&slave->dev);
1091 pm_runtime_put_autosuspend(&slave->dev);
1092
1093 return 0;
1094 }
1095
1096 MODULE_DESCRIPTION("ASoC rt715 driver");
1097 MODULE_DESCRIPTION("ASoC rt715 driver SDW");
1098 MODULE_AUTHOR("Jack Yu <jack.yu@realtek.com>");
1099 MODULE_LICENSE("GPL v2");
1100