1 // SPDX-License-Identifier: GPL-2.0
2 #include <errno.h>
3 #include <string.h>
4 #include <regex.h>
5 #include <linux/zalloc.h>
6
7 #include "../../../util/perf_regs.h"
8 #include "../../../util/debug.h"
9 #include "../../../util/event.h"
10 #include "../../../util/header.h"
11 #include "../../../perf-sys.h"
12 #include "utils_header.h"
13
14 #include <linux/kernel.h>
15
16 #define PVR_POWER9 0x004E
17 #define PVR_POWER10 0x0080
18
19 const struct sample_reg sample_reg_masks[] = {
20 SMPL_REG(r0, PERF_REG_POWERPC_R0),
21 SMPL_REG(r1, PERF_REG_POWERPC_R1),
22 SMPL_REG(r2, PERF_REG_POWERPC_R2),
23 SMPL_REG(r3, PERF_REG_POWERPC_R3),
24 SMPL_REG(r4, PERF_REG_POWERPC_R4),
25 SMPL_REG(r5, PERF_REG_POWERPC_R5),
26 SMPL_REG(r6, PERF_REG_POWERPC_R6),
27 SMPL_REG(r7, PERF_REG_POWERPC_R7),
28 SMPL_REG(r8, PERF_REG_POWERPC_R8),
29 SMPL_REG(r9, PERF_REG_POWERPC_R9),
30 SMPL_REG(r10, PERF_REG_POWERPC_R10),
31 SMPL_REG(r11, PERF_REG_POWERPC_R11),
32 SMPL_REG(r12, PERF_REG_POWERPC_R12),
33 SMPL_REG(r13, PERF_REG_POWERPC_R13),
34 SMPL_REG(r14, PERF_REG_POWERPC_R14),
35 SMPL_REG(r15, PERF_REG_POWERPC_R15),
36 SMPL_REG(r16, PERF_REG_POWERPC_R16),
37 SMPL_REG(r17, PERF_REG_POWERPC_R17),
38 SMPL_REG(r18, PERF_REG_POWERPC_R18),
39 SMPL_REG(r19, PERF_REG_POWERPC_R19),
40 SMPL_REG(r20, PERF_REG_POWERPC_R20),
41 SMPL_REG(r21, PERF_REG_POWERPC_R21),
42 SMPL_REG(r22, PERF_REG_POWERPC_R22),
43 SMPL_REG(r23, PERF_REG_POWERPC_R23),
44 SMPL_REG(r24, PERF_REG_POWERPC_R24),
45 SMPL_REG(r25, PERF_REG_POWERPC_R25),
46 SMPL_REG(r26, PERF_REG_POWERPC_R26),
47 SMPL_REG(r27, PERF_REG_POWERPC_R27),
48 SMPL_REG(r28, PERF_REG_POWERPC_R28),
49 SMPL_REG(r29, PERF_REG_POWERPC_R29),
50 SMPL_REG(r30, PERF_REG_POWERPC_R30),
51 SMPL_REG(r31, PERF_REG_POWERPC_R31),
52 SMPL_REG(nip, PERF_REG_POWERPC_NIP),
53 SMPL_REG(msr, PERF_REG_POWERPC_MSR),
54 SMPL_REG(orig_r3, PERF_REG_POWERPC_ORIG_R3),
55 SMPL_REG(ctr, PERF_REG_POWERPC_CTR),
56 SMPL_REG(link, PERF_REG_POWERPC_LINK),
57 SMPL_REG(xer, PERF_REG_POWERPC_XER),
58 SMPL_REG(ccr, PERF_REG_POWERPC_CCR),
59 SMPL_REG(softe, PERF_REG_POWERPC_SOFTE),
60 SMPL_REG(trap, PERF_REG_POWERPC_TRAP),
61 SMPL_REG(dar, PERF_REG_POWERPC_DAR),
62 SMPL_REG(dsisr, PERF_REG_POWERPC_DSISR),
63 SMPL_REG(sier, PERF_REG_POWERPC_SIER),
64 SMPL_REG(mmcra, PERF_REG_POWERPC_MMCRA),
65 SMPL_REG(mmcr0, PERF_REG_POWERPC_MMCR0),
66 SMPL_REG(mmcr1, PERF_REG_POWERPC_MMCR1),
67 SMPL_REG(mmcr2, PERF_REG_POWERPC_MMCR2),
68 SMPL_REG(mmcr3, PERF_REG_POWERPC_MMCR3),
69 SMPL_REG(sier2, PERF_REG_POWERPC_SIER2),
70 SMPL_REG(sier3, PERF_REG_POWERPC_SIER3),
71 SMPL_REG(pmc1, PERF_REG_POWERPC_PMC1),
72 SMPL_REG(pmc2, PERF_REG_POWERPC_PMC2),
73 SMPL_REG(pmc3, PERF_REG_POWERPC_PMC3),
74 SMPL_REG(pmc4, PERF_REG_POWERPC_PMC4),
75 SMPL_REG(pmc5, PERF_REG_POWERPC_PMC5),
76 SMPL_REG(pmc6, PERF_REG_POWERPC_PMC6),
77 SMPL_REG(sdar, PERF_REG_POWERPC_SDAR),
78 SMPL_REG(siar, PERF_REG_POWERPC_SIAR),
79 SMPL_REG_END
80 };
81
82 /* REG or %rREG */
83 #define SDT_OP_REGEX1 "^(%r)?([1-2]?[0-9]|3[0-1])$"
84
85 /* -NUM(REG) or NUM(REG) or -NUM(%rREG) or NUM(%rREG) */
86 #define SDT_OP_REGEX2 "^(\\-)?([0-9]+)\\((%r)?([1-2]?[0-9]|3[0-1])\\)$"
87
88 static regex_t sdt_op_regex1, sdt_op_regex2;
89
sdt_init_op_regex(void)90 static int sdt_init_op_regex(void)
91 {
92 static int initialized;
93 int ret = 0;
94
95 if (initialized)
96 return 0;
97
98 ret = regcomp(&sdt_op_regex1, SDT_OP_REGEX1, REG_EXTENDED);
99 if (ret)
100 goto error;
101
102 ret = regcomp(&sdt_op_regex2, SDT_OP_REGEX2, REG_EXTENDED);
103 if (ret)
104 goto free_regex1;
105
106 initialized = 1;
107 return 0;
108
109 free_regex1:
110 regfree(&sdt_op_regex1);
111 error:
112 pr_debug4("Regex compilation error.\n");
113 return ret;
114 }
115
116 /*
117 * Parse OP and convert it into uprobe format, which is, +/-NUM(%gprREG).
118 * Possible variants of OP are:
119 * Format Example
120 * -------------------------
121 * NUM(REG) 48(18)
122 * -NUM(REG) -48(18)
123 * NUM(%rREG) 48(%r18)
124 * -NUM(%rREG) -48(%r18)
125 * REG 18
126 * %rREG %r18
127 * iNUM i0
128 * i-NUM i-1
129 *
130 * SDT marker arguments on Powerpc uses %rREG form with -mregnames flag
131 * and REG form with -mno-regnames. Here REG is general purpose register,
132 * which is in 0 to 31 range.
133 */
arch_sdt_arg_parse_op(char * old_op,char ** new_op)134 int arch_sdt_arg_parse_op(char *old_op, char **new_op)
135 {
136 int ret, new_len;
137 regmatch_t rm[5];
138 char prefix;
139
140 /* Constant argument. Uprobe does not support it */
141 if (old_op[0] == 'i') {
142 pr_debug4("Skipping unsupported SDT argument: %s\n", old_op);
143 return SDT_ARG_SKIP;
144 }
145
146 ret = sdt_init_op_regex();
147 if (ret < 0)
148 return ret;
149
150 if (!regexec(&sdt_op_regex1, old_op, 3, rm, 0)) {
151 /* REG or %rREG --> %gprREG */
152
153 new_len = 5; /* % g p r NULL */
154 new_len += (int)(rm[2].rm_eo - rm[2].rm_so);
155
156 *new_op = zalloc(new_len);
157 if (!*new_op)
158 return -ENOMEM;
159
160 scnprintf(*new_op, new_len, "%%gpr%.*s",
161 (int)(rm[2].rm_eo - rm[2].rm_so), old_op + rm[2].rm_so);
162 } else if (!regexec(&sdt_op_regex2, old_op, 5, rm, 0)) {
163 /*
164 * -NUM(REG) or NUM(REG) or -NUM(%rREG) or NUM(%rREG) -->
165 * +/-NUM(%gprREG)
166 */
167 prefix = (rm[1].rm_so == -1) ? '+' : '-';
168
169 new_len = 8; /* +/- ( % g p r ) NULL */
170 new_len += (int)(rm[2].rm_eo - rm[2].rm_so);
171 new_len += (int)(rm[4].rm_eo - rm[4].rm_so);
172
173 *new_op = zalloc(new_len);
174 if (!*new_op)
175 return -ENOMEM;
176
177 scnprintf(*new_op, new_len, "%c%.*s(%%gpr%.*s)", prefix,
178 (int)(rm[2].rm_eo - rm[2].rm_so), old_op + rm[2].rm_so,
179 (int)(rm[4].rm_eo - rm[4].rm_so), old_op + rm[4].rm_so);
180 } else {
181 pr_debug4("Skipping unsupported SDT argument: %s\n", old_op);
182 return SDT_ARG_SKIP;
183 }
184
185 return SDT_ARG_VALID;
186 }
187
arch__intr_reg_mask(void)188 uint64_t arch__intr_reg_mask(void)
189 {
190 struct perf_event_attr attr = {
191 .type = PERF_TYPE_HARDWARE,
192 .config = PERF_COUNT_HW_CPU_CYCLES,
193 .sample_type = PERF_SAMPLE_REGS_INTR,
194 .precise_ip = 1,
195 .disabled = 1,
196 .exclude_kernel = 1,
197 };
198 int fd;
199 u32 version;
200 u64 extended_mask = 0, mask = PERF_REGS_MASK;
201
202 /*
203 * Get the PVR value to set the extended
204 * mask specific to platform.
205 */
206 version = (((mfspr(SPRN_PVR)) >> 16) & 0xFFFF);
207 if (version == PVR_POWER9)
208 extended_mask = PERF_REG_PMU_MASK_300;
209 else if (version == PVR_POWER10)
210 extended_mask = PERF_REG_PMU_MASK_31;
211 else
212 return mask;
213
214 attr.sample_regs_intr = extended_mask;
215 attr.sample_period = 1;
216 event_attr_init(&attr);
217
218 /*
219 * check if the pmu supports perf extended regs, before
220 * returning the register mask to sample.
221 */
222 fd = sys_perf_event_open(&attr, 0, -1, -1, 0);
223 if (fd != -1) {
224 close(fd);
225 mask |= extended_mask;
226 }
227 return mask;
228 }
229