1[
2    {
3        "ArchStdEvent": "SW_INCR"
4    },
5    {
6        "ArchStdEvent": "INST_RETIRED"
7    },
8    {
9        "ArchStdEvent": "EXC_RETURN"
10    },
11    {
12        "ArchStdEvent": "CID_WRITE_RETIRED"
13    },
14    {
15        "ArchStdEvent": "PC_WRITE_RETIRED"
16    },
17    {
18        "ArchStdEvent": "BR_IMMED_RETIRED"
19    },
20    {
21        "ArchStdEvent": "BR_RETURN_RETIRED"
22    },
23    {
24        "ArchStdEvent": "INST_SPEC"
25    },
26    {
27        "ArchStdEvent": "TTBR_WRITE_RETIRED"
28    },
29    {
30        "ArchStdEvent": "LDREX_SPEC"
31    },
32    {
33        "ArchStdEvent": "STREX_FAIL_SPEC"
34    },
35    {
36        "ArchStdEvent": "LD_SPEC"
37    },
38    {
39        "ArchStdEvent": "ST_SPEC"
40    },
41    {
42        "ArchStdEvent": "LDST_SPEC"
43    },
44    {
45        "ArchStdEvent": "DP_SPEC"
46    },
47    {
48        "ArchStdEvent": "ASE_SPEC"
49    },
50    {
51        "ArchStdEvent": "VFP_SPEC"
52    },
53    {
54        "ArchStdEvent": "CRYPTO_SPEC"
55    },
56    {
57        "ArchStdEvent": "ISB_SPEC"
58    },
59    {
60        "ArchStdEvent": "DSB_SPEC"
61    },
62    {
63        "ArchStdEvent": "DMB_SPEC"
64    }
65]
66