1/*
2 * Copyright (c) 2015 Travis Geiselbrecht
3 *
4 * Use of this source code is governed by a MIT-style
5 * license that can be found in the LICENSE file or at
6 * https://opensource.org/licenses/MIT
7 */
8#include <lk/asm.h>
9#include <arch/mips.h>
10
11.section ".text.vectab"
12FUNCTION(vectab)
13.org 0
14_tlb_refill:
15    b       .
16
17.macro iframe_save
18    .set    push
19    .set    noat
20    addiu   $sp, -88
21
22    /* save all the non temporary registers */
23    sw      $at, 0($sp)
24    sw      $v0, 4($sp)
25    sw      $v1, 8($sp)
26    sw      $a0, 12($sp)
27    sw      $a1, 16($sp)
28    sw      $a2, 20($sp)
29    sw      $a3, 24($sp)
30    sw      $t0, 28($sp)
31    sw      $t1, 32($sp)
32    sw      $t2, 36($sp)
33    sw      $t3, 40($sp)
34    sw      $t4, 44($sp)
35    sw      $t5, 48($sp)
36    sw      $t6, 52($sp)
37    sw      $t7, 56($sp)
38    sw      $t8, 60($sp)
39    sw      $t9, 64($sp)
40    sw      $gp, 68($sp)
41    sw      $ra, 72($sp)
42
43    /* save the control registers */
44    mfc0    $at, $12 /* status */
45    sw      $at, 76($sp)
46    mfc0    $at, $13 /* cause */
47    sw      $at, 80($sp)
48    mfc0    $at, $14 /* epc */
49    sw      $at, 84($sp)
50
51    .set    pop
52.endm
53
54.macro iframe_restore
55    .set    push
56    .set    noat
57
58    /* restore the temporary registers */
59    lw      $at, 0($sp)
60    lw      $v0, 4($sp)
61    lw      $v1, 8($sp)
62    lw      $a0, 12($sp)
63    lw      $a1, 16($sp)
64    lw      $a2, 20($sp)
65    lw      $a3, 24($sp)
66    lw      $t0, 28($sp)
67    lw      $t1, 32($sp)
68    lw      $t2, 36($sp)
69    lw      $t3, 40($sp)
70    lw      $t4, 44($sp)
71    lw      $t5, 48($sp)
72    lw      $t6, 52($sp)
73    lw      $t7, 56($sp)
74    lw      $t8, 60($sp)
75    lw      $t9, 64($sp)
76    lw      $gp, 68($sp)
77    lw      $ra, 72($sp)
78
79    /* restore the control registers */
80    lw      $k0, 76($sp)
81    mtc0    $k0, $12 /* status */
82    lw      $k0, 80($sp)
83    mtc0    $k0, $13 /* cause */
84    lw      $k0, 84($sp)
85    mtc0    $k0, $14 /* epc */
86
87    addiu   $sp, 88
88    .set    pop
89.endm
90
91/* compatibility mode irq/syscall/general exception */
92.org 0x180
93_irq:
94    la      $k0, mips_gen_exception
95    li      $k1, 0
96    b       shared_irq_save_return
97
98/* vectored base */
99.macro vectored_irq, num
100.org 0x200 + VECTORED_OFFSET_SHIFT * \num
101_vectored_irq\num:
102    la      $k0, mips_irq
103    li      $k1, \num
104    b       shared_irq_save_return
105    b       .
106.endm
107
108vectored_irq 0
109vectored_irq 1
110vectored_irq 2
111vectored_irq 3
112vectored_irq 4
113vectored_irq 5
114vectored_irq 6
115vectored_irq 7
116vectored_irq 8
117vectored_irq 9
118
119/* branched to from above, k0 holds address to call, k1 holds arg to function */
120shared_irq_save_return:
121    iframe_save
122
123    move    $a0, $sp
124    move    $a1, $k1
125    jal     $k0
126
127    iframe_restore
128
129    eret
130
131