1 /******************************************************************************
2 * Filename: rfc.h
3 * Revised: 2015-11-17 12:03:08 +0100 (Tue, 17 Nov 2015)
4 * Revision: 45108
5 *
6 * Description: Defines and prototypes for the RF Core.
7 *
8 * Copyright (c) 2015, Texas Instruments Incorporated
9 * All rights reserved.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions are met:
13 *
14 * 1) Redistributions of source code must retain the above copyright notice,
15 * this list of conditions and the following disclaimer.
16 *
17 * 2) Redistributions in binary form must reproduce the above copyright notice,
18 * this list of conditions and the following disclaimer in the documentation
19 * and/or other materials provided with the distribution.
20 *
21 * 3) Neither the name of the ORGANIZATION nor the names of its contributors may
22 * be used to endorse or promote products derived from this software without
23 * specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
29 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
36 *
37 ******************************************************************************/
38
39 //*****************************************************************************
40 //
41 //! \addtogroup rfc_api
42 //! @{
43 //
44 //*****************************************************************************
45
46 #ifndef __RFC_H__
47 #define __RFC_H__
48
49 //*****************************************************************************
50 //
51 // If building with a C++ compiler, make all of the definitions in this header
52 // have a C binding.
53 //
54 //*****************************************************************************
55 #ifdef __cplusplus
56 extern "C"
57 {
58 #endif
59
60 #include <stdbool.h>
61 #include <stdint.h>
62 #include <inc/hw_types.h>
63 #include <inc/hw_memmap.h>
64 #include <inc/hw_rfc_pwr.h>
65 #include <inc/hw_rfc_dbell.h>
66
67 //*****************************************************************************
68 //
69 // Support for DriverLib in ROM:
70 // This section renames all functions that are not "static inline", so that
71 // calling these functions will default to implementation in flash. At the end
72 // of this file a second renaming will change the defaults to implementation in
73 // ROM for available functions.
74 //
75 // To force use of the implementation in flash, e.g. for debugging:
76 // - Globally: Define DRIVERLIB_NOROM at project level
77 // - Per function: Use prefix "NOROM_" when calling the function
78 //
79 //*****************************************************************************
80 #if !defined(DOXYGEN)
81 #define RFCCpeIntGetAndClear NOROM_RFCCpeIntGetAndClear
82 #define RFCDoorbellSendTo NOROM_RFCDoorbellSendTo
83 #endif
84
85 //*****************************************************************************
86 //
87 // API Functions and prototypes
88 //
89 //*****************************************************************************
90
91 //*****************************************************************************
92 //
93 //! \brief Enable the RF core clocks.
94 //!
95 //! As soon as the RF core is started it will handle clock control
96 //! autonomously. No check should be performed to check the clocks. Instead
97 //! the radio can be ping'ed through the command interface.
98 //!
99 //! \return None
100 //
101 //*****************************************************************************
102 __STATIC_INLINE void
RFCClockEnable(void)103 RFCClockEnable(void)
104 {
105 //
106 // Enable all clocks
107 //
108 HWREG(RFC_PWR_NONBUF_BASE + RFC_PWR_O_PWMCLKEN) =
109 RFC_PWR_PWMCLKEN_RFCTRC |
110 RFC_PWR_PWMCLKEN_FSCA |
111 RFC_PWR_PWMCLKEN_PHA |
112 RFC_PWR_PWMCLKEN_RAT |
113 RFC_PWR_PWMCLKEN_RFERAM |
114 RFC_PWR_PWMCLKEN_RFE |
115 RFC_PWR_PWMCLKEN_MDMRAM |
116 RFC_PWR_PWMCLKEN_MDM |
117 RFC_PWR_PWMCLKEN_CPERAM |
118 RFC_PWR_PWMCLKEN_CPE |
119 RFC_PWR_PWMCLKEN_RFC;
120 }
121
122 //*****************************************************************************
123 //
124 //! \brief Disable the RF core clocks.
125 //!
126 //! As soon as the RF core is started it will handle clock control
127 //! autonomously. No check should be performed to check the clocks. Instead
128 //! the radio can be ping'ed through the command interface.
129 //!
130 //! When disabling clocks it is the programmers responsibility that the
131 //! RF core clocks can be safely gated. I.e. the RF core should be safely
132 //! 'parked'.
133 //!
134 //! \return None
135 //
136 //*****************************************************************************
137 __STATIC_INLINE void
RFCClockDisable(void)138 RFCClockDisable(void)
139 {
140 //
141 // Disable all clocks
142 //
143 HWREG(RFC_PWR_NONBUF_BASE + RFC_PWR_O_PWMCLKEN) = 0x0;
144 }
145
146 //*****************************************************************************
147 //
148 //! Enable CPE0 interrupt
149 //
150 //*****************************************************************************
151 __STATIC_INLINE void
RFCCpe0IntEnable(uint32_t ui32Mask)152 RFCCpe0IntEnable(uint32_t ui32Mask)
153 {
154 //
155 // Multiplex RF Core interrupts to CPE0 IRQ.
156 //
157 HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFCPEISL) &= ~ui32Mask;
158
159 do
160 {
161 //
162 // Clear any pending interrupts.
163 //
164 HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFCPEIFG) = 0x0;
165 }while(HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFCPEIFG) != 0x0);
166
167 //
168 // Enable the masked interrupts
169 //
170 HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFCPEIEN) |= ui32Mask;
171 }
172
173
174 //*****************************************************************************
175 //
176 //! Enable CPE1 interrupt
177 //
178 //*****************************************************************************
179 __STATIC_INLINE void
RFCCpe1IntEnable(uint32_t ui32Mask)180 RFCCpe1IntEnable(uint32_t ui32Mask)
181 {
182 //
183 // Multiplex RF Core interrupts to CPE1 IRQ.
184 //
185 HWREG( RFC_DBELL_BASE + RFC_DBELL_O_RFCPEISL) |= ui32Mask;
186
187 do
188 {
189 //
190 // Clear any pending interrupts.
191 //
192 HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFCPEIFG) = 0x0;
193 }while(HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFCPEIFG) != 0x0);
194
195 //
196 // Enable the masked interrupts
197 //
198 HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFCPEIEN) |= ui32Mask;
199 }
200
201
202 //*****************************************************************************
203 //
204 //! This function is used to map only HW interrupts, and
205 //! clears/unmasks them. These interrupts are then enabled.
206 //
207 //*****************************************************************************
208 __STATIC_INLINE void
RFCHwIntEnable(uint32_t ui32Mask)209 RFCHwIntEnable(uint32_t ui32Mask)
210 {
211 //
212 // Clear any pending interrupts.
213 //
214 HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFHWIFG) = 0x0;
215
216 //
217 // Enable the masked interrupts
218 //
219 HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFHWIEN) |= ui32Mask;
220 }
221
222
223 //*****************************************************************************
224 //
225 //! Disable CPE interrupt
226 //
227 //*****************************************************************************
228 __STATIC_INLINE void
RFCCpeIntDisable(uint32_t ui32Mask)229 RFCCpeIntDisable(uint32_t ui32Mask)
230 {
231 //
232 // Disable the masked interrupts
233 //
234 HWREG( RFC_DBELL_BASE + RFC_DBELL_O_RFCPEIEN ) &= ~ui32Mask;
235
236 do
237 {
238 //
239 // Clear any pending interrupts.
240 //
241 HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFCPEIFG) = 0x0;
242 }while(HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFCPEIFG) != 0x0);
243 }
244
245
246 //*****************************************************************************
247 //
248 //! Disable HW interrupt
249 //
250 //*****************************************************************************
251 __STATIC_INLINE void
RFCHwIntDisable(uint32_t ui32Mask)252 RFCHwIntDisable(uint32_t ui32Mask)
253 {
254 //
255 // Disable the masked interrupts
256 //
257 HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFHWIEN) &= ~ui32Mask;
258
259 //
260 // Clear any pending interrupts.
261 //
262 HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFHWIFG) = 0x0;
263 }
264
265
266 //*****************************************************************************
267 //
268 //! Get and clear CPE interrupt flags
269 //
270 //*****************************************************************************
271 extern uint32_t RFCCpeIntGetAndClear(void);
272
273
274 //*****************************************************************************
275 //
276 //! Clear interrupt flags
277 //
278 //*****************************************************************************
279 __STATIC_INLINE void
RFCCpeIntClear(uint32_t ui32Mask)280 RFCCpeIntClear(uint32_t ui32Mask)
281 {
282 do
283 {
284 //
285 // Clear interrupts that may now be pending
286 //
287 HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFCPEIFG) &= ~ui32Mask;
288 }while(HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFCPEIFG) != ~ui32Mask);
289 }
290
291
292 //*****************************************************************************
293 //
294 //! Clear interrupt flags
295 //
296 //*****************************************************************************
297 __STATIC_INLINE void
RFCHwIntClear(uint32_t ui32Mask)298 RFCHwIntClear(uint32_t ui32Mask)
299 {
300 //
301 // Clear pending interrupts.
302 //
303 HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFHWIFG) &= ~ui32Mask;
304 }
305
306
307 //*****************************************************************************
308 //
309 //! Clear interrupt flags
310 //
311 //*****************************************************************************
312 __STATIC_INLINE void
RFCAckIntClear(void)313 RFCAckIntClear(void)
314 {
315 //
316 // Clear any pending interrupts.
317 //
318 HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFACKIFG) = 0x0;
319 }
320
321
322 //*****************************************************************************
323 //
324 //! Send command to doorbell and wait for ack
325 //
326 //*****************************************************************************
327 extern uint32_t RFCDoorbellSendTo(uint32_t pOp);
328
329
330 //*****************************************************************************
331 //
332 // Support for DriverLib in ROM:
333 // Redirect to implementation in ROM when available.
334 //
335 //*****************************************************************************
336 #if !defined(DRIVERLIB_NOROM) && !defined(DOXYGEN)
337 #include <driverlib/rom.h>
338 #ifdef ROM_RFCCpeIntGetAndClear
339 #undef RFCCpeIntGetAndClear
340 #define RFCCpeIntGetAndClear ROM_RFCCpeIntGetAndClear
341 #endif
342 #ifdef ROM_RFCDoorbellSendTo
343 #undef RFCDoorbellSendTo
344 #define RFCDoorbellSendTo ROM_RFCDoorbellSendTo
345 #endif
346 #endif
347
348 //*****************************************************************************
349 //
350 // Mark the end of the C bindings section for C++ compilers.
351 //
352 //*****************************************************************************
353 #ifdef __cplusplus
354 }
355 #endif
356
357 #endif // __RFC_H__
358
359 //*****************************************************************************
360 //
361 //! Close the Doxygen group.
362 //! @}
363 //
364 //*****************************************************************************
365