1 /****************************************************************************** 2 * Filename: hw_adi_4_aux_h 3 * Revised: 2015-11-12 13:07:02 +0100 (Thu, 12 Nov 2015) 4 * Revision: 45056 5 * 6 * Copyright (c) 2015, Texas Instruments Incorporated 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions are met: 11 * 12 * 1) Redistributions of source code must retain the above copyright notice, 13 * this list of conditions and the following disclaimer. 14 * 15 * 2) Redistributions in binary form must reproduce the above copyright notice, 16 * this list of conditions and the following disclaimer in the documentation 17 * and/or other materials provided with the distribution. 18 * 19 * 3) Neither the name of the ORGANIZATION nor the names of its contributors may 20 * be used to endorse or promote products derived from this software without 21 * specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 24 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 27 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 33 * POSSIBILITY OF SUCH DAMAGE. 34 * 35 ******************************************************************************/ 36 37 #ifndef __HW_ADI_4_AUX_H__ 38 #define __HW_ADI_4_AUX_H__ 39 40 //***************************************************************************** 41 // 42 // This section defines the register offsets of 43 // ADI_4_AUX component 44 // 45 //***************************************************************************** 46 // Internal 47 #define ADI_4_AUX_O_MUX0 0x00000000 48 49 // Internal 50 #define ADI_4_AUX_O_MUX1 0x00000001 51 52 // Internal 53 #define ADI_4_AUX_O_MUX2 0x00000002 54 55 // Internal 56 #define ADI_4_AUX_O_MUX3 0x00000003 57 58 // Current Source 59 #define ADI_4_AUX_O_ISRC 0x00000004 60 61 // Comparator 62 #define ADI_4_AUX_O_COMP 0x00000005 63 64 // Internal 65 #define ADI_4_AUX_O_MUX4 0x00000007 66 67 // ADC Control 0 68 #define ADI_4_AUX_O_ADC0 0x00000008 69 70 // ADC Control 1 71 #define ADI_4_AUX_O_ADC1 0x00000009 72 73 // ADC Reference 0 74 #define ADI_4_AUX_O_ADCREF0 0x0000000A 75 76 // ADC Reference 1 77 #define ADI_4_AUX_O_ADCREF1 0x0000000B 78 79 //***************************************************************************** 80 // 81 // Register: ADI_4_AUX_O_MUX0 82 // 83 //***************************************************************************** 84 // Field: [7:4] COMPA_IN 85 // 86 // Internal. Only to be used through TI provided API. 87 // ENUMs: 88 // FCAP1 Internal. Only to be used through TI provided API. 89 // FCAP0 Internal. Only to be used through TI provided API. 90 // ATEST1 Internal. Only to be used through TI provided API. 91 // ATEST0 Internal. Only to be used through TI provided API. 92 // NC Internal. Only to be used through TI provided API. 93 #define ADI_4_AUX_MUX0_COMPA_IN_W 4 94 #define ADI_4_AUX_MUX0_COMPA_IN_M 0x000000F0 95 #define ADI_4_AUX_MUX0_COMPA_IN_S 4 96 #define ADI_4_AUX_MUX0_COMPA_IN_FCAP1 0x00000080 97 #define ADI_4_AUX_MUX0_COMPA_IN_FCAP0 0x00000040 98 #define ADI_4_AUX_MUX0_COMPA_IN_ATEST1 0x00000020 99 #define ADI_4_AUX_MUX0_COMPA_IN_ATEST0 0x00000010 100 #define ADI_4_AUX_MUX0_COMPA_IN_NC 0x00000000 101 102 // Field: [3:0] COMPA_REF 103 // 104 // Internal. Only to be used through TI provided API. 105 // ENUMs: 106 // ADCVREFP Internal. Only to be used through TI provided API. 107 // VDDS Internal. Only to be used through TI provided API. 108 // VSS Internal. Only to be used through TI provided API. 109 // DCOUPL Internal. Only to be used through TI provided API. 110 // NC Internal. Only to be used through TI provided API. 111 #define ADI_4_AUX_MUX0_COMPA_REF_W 4 112 #define ADI_4_AUX_MUX0_COMPA_REF_M 0x0000000F 113 #define ADI_4_AUX_MUX0_COMPA_REF_S 0 114 #define ADI_4_AUX_MUX0_COMPA_REF_ADCVREFP 0x00000008 115 #define ADI_4_AUX_MUX0_COMPA_REF_VDDS 0x00000004 116 #define ADI_4_AUX_MUX0_COMPA_REF_VSS 0x00000002 117 #define ADI_4_AUX_MUX0_COMPA_REF_DCOUPL 0x00000001 118 #define ADI_4_AUX_MUX0_COMPA_REF_NC 0x00000000 119 120 //***************************************************************************** 121 // 122 // Register: ADI_4_AUX_O_MUX1 123 // 124 //***************************************************************************** 125 // Field: [7:0] COMPA_IN 126 // 127 // Internal. Only to be used through TI provided API. 128 // ENUMs: 129 // AUXIO0 Internal. Only to be used through TI provided API. 130 // AUXIO1 Internal. Only to be used through TI provided API. 131 // AUXIO2 Internal. Only to be used through TI provided API. 132 // AUXIO3 Internal. Only to be used through TI provided API. 133 // AUXIO4 Internal. Only to be used through TI provided API. 134 // AUXIO5 Internal. Only to be used through TI provided API. 135 // AUXIO6 Internal. Only to be used through TI provided API. 136 // AUXIO7 Internal. Only to be used through TI provided API. 137 // NC Internal. Only to be used through TI provided API. 138 #define ADI_4_AUX_MUX1_COMPA_IN_W 8 139 #define ADI_4_AUX_MUX1_COMPA_IN_M 0x000000FF 140 #define ADI_4_AUX_MUX1_COMPA_IN_S 0 141 #define ADI_4_AUX_MUX1_COMPA_IN_AUXIO0 0x00000080 142 #define ADI_4_AUX_MUX1_COMPA_IN_AUXIO1 0x00000040 143 #define ADI_4_AUX_MUX1_COMPA_IN_AUXIO2 0x00000020 144 #define ADI_4_AUX_MUX1_COMPA_IN_AUXIO3 0x00000010 145 #define ADI_4_AUX_MUX1_COMPA_IN_AUXIO4 0x00000008 146 #define ADI_4_AUX_MUX1_COMPA_IN_AUXIO5 0x00000004 147 #define ADI_4_AUX_MUX1_COMPA_IN_AUXIO6 0x00000002 148 #define ADI_4_AUX_MUX1_COMPA_IN_AUXIO7 0x00000001 149 #define ADI_4_AUX_MUX1_COMPA_IN_NC 0x00000000 150 151 //***************************************************************************** 152 // 153 // Register: ADI_4_AUX_O_MUX2 154 // 155 //***************************************************************************** 156 // Field: [7:3] ADCCOMPB_IN 157 // 158 // Internal. Only to be used through TI provided API. 159 // ENUMs: 160 // VDDS Internal. Only to be used through TI provided API. 161 // VSS Internal. Only to be used through TI provided API. 162 // DCOUPL Internal. Only to be used through TI provided API. 163 // ATEST1 Internal. Only to be used through TI provided API. 164 // ATEST0 Internal. Only to be used through TI provided API. 165 // NC Internal. Only to be used through TI provided API. 166 #define ADI_4_AUX_MUX2_ADCCOMPB_IN_W 5 167 #define ADI_4_AUX_MUX2_ADCCOMPB_IN_M 0x000000F8 168 #define ADI_4_AUX_MUX2_ADCCOMPB_IN_S 3 169 #define ADI_4_AUX_MUX2_ADCCOMPB_IN_VDDS 0x00000080 170 #define ADI_4_AUX_MUX2_ADCCOMPB_IN_VSS 0x00000040 171 #define ADI_4_AUX_MUX2_ADCCOMPB_IN_DCOUPL 0x00000020 172 #define ADI_4_AUX_MUX2_ADCCOMPB_IN_ATEST1 0x00000010 173 #define ADI_4_AUX_MUX2_ADCCOMPB_IN_ATEST0 0x00000008 174 #define ADI_4_AUX_MUX2_ADCCOMPB_IN_NC 0x00000000 175 176 // Field: [2:0] COMPB_REF 177 // 178 // Internal. Only to be used through TI provided API. 179 // ENUMs: 180 // VDDS Internal. Only to be used through TI provided API. 181 // VSS Internal. Only to be used through TI provided API. 182 // DCOUPL Internal. Only to be used through TI provided API. 183 // NC Internal. Only to be used through TI provided API. 184 #define ADI_4_AUX_MUX2_COMPB_REF_W 3 185 #define ADI_4_AUX_MUX2_COMPB_REF_M 0x00000007 186 #define ADI_4_AUX_MUX2_COMPB_REF_S 0 187 #define ADI_4_AUX_MUX2_COMPB_REF_VDDS 0x00000004 188 #define ADI_4_AUX_MUX2_COMPB_REF_VSS 0x00000002 189 #define ADI_4_AUX_MUX2_COMPB_REF_DCOUPL 0x00000001 190 #define ADI_4_AUX_MUX2_COMPB_REF_NC 0x00000000 191 192 //***************************************************************************** 193 // 194 // Register: ADI_4_AUX_O_MUX3 195 // 196 //***************************************************************************** 197 // Field: [7:0] ADCCOMPB_IN 198 // 199 // Internal. Only to be used through TI provided API. 200 // ENUMs: 201 // AUXIO0 Internal. Only to be used through TI provided API. 202 // AUXIO1 Internal. Only to be used through TI provided API. 203 // AUXIO2 Internal. Only to be used through TI provided API. 204 // AUXIO3 Internal. Only to be used through TI provided API. 205 // AUXIO4 Internal. Only to be used through TI provided API. 206 // AUXIO5 Internal. Only to be used through TI provided API. 207 // AUXIO6 Internal. Only to be used through TI provided API. 208 // AUXIO7 Internal. Only to be used through TI provided API. 209 // NC Internal. Only to be used through TI provided API. 210 #define ADI_4_AUX_MUX3_ADCCOMPB_IN_W 8 211 #define ADI_4_AUX_MUX3_ADCCOMPB_IN_M 0x000000FF 212 #define ADI_4_AUX_MUX3_ADCCOMPB_IN_S 0 213 #define ADI_4_AUX_MUX3_ADCCOMPB_IN_AUXIO0 0x00000080 214 #define ADI_4_AUX_MUX3_ADCCOMPB_IN_AUXIO1 0x00000040 215 #define ADI_4_AUX_MUX3_ADCCOMPB_IN_AUXIO2 0x00000020 216 #define ADI_4_AUX_MUX3_ADCCOMPB_IN_AUXIO3 0x00000010 217 #define ADI_4_AUX_MUX3_ADCCOMPB_IN_AUXIO4 0x00000008 218 #define ADI_4_AUX_MUX3_ADCCOMPB_IN_AUXIO5 0x00000004 219 #define ADI_4_AUX_MUX3_ADCCOMPB_IN_AUXIO6 0x00000002 220 #define ADI_4_AUX_MUX3_ADCCOMPB_IN_AUXIO7 0x00000001 221 #define ADI_4_AUX_MUX3_ADCCOMPB_IN_NC 0x00000000 222 223 //***************************************************************************** 224 // 225 // Register: ADI_4_AUX_O_ISRC 226 // 227 //***************************************************************************** 228 // Field: [7:2] TRIM 229 // 230 // Adjust current from current source. 231 // 232 // Output currents may be combined to get desired total current. 233 // ENUMs: 234 // 11P75U 11.75 uA 235 // 4P5U 4.5 uA 236 // 2P0U 2.0 uA 237 // 1P0U 1.0 uA 238 // 0P5U 0.5 uA 239 // 0P25U 0.25 uA 240 // NC No current connected 241 #define ADI_4_AUX_ISRC_TRIM_W 6 242 #define ADI_4_AUX_ISRC_TRIM_M 0x000000FC 243 #define ADI_4_AUX_ISRC_TRIM_S 2 244 #define ADI_4_AUX_ISRC_TRIM_11P75U 0x00000080 245 #define ADI_4_AUX_ISRC_TRIM_4P5U 0x00000040 246 #define ADI_4_AUX_ISRC_TRIM_2P0U 0x00000020 247 #define ADI_4_AUX_ISRC_TRIM_1P0U 0x00000010 248 #define ADI_4_AUX_ISRC_TRIM_0P5U 0x00000008 249 #define ADI_4_AUX_ISRC_TRIM_0P25U 0x00000004 250 #define ADI_4_AUX_ISRC_TRIM_NC 0x00000000 251 252 // Field: [0] EN 253 // 254 // Current source enable 255 #define ADI_4_AUX_ISRC_EN 0x00000001 256 #define ADI_4_AUX_ISRC_EN_BITN 0 257 #define ADI_4_AUX_ISRC_EN_M 0x00000001 258 #define ADI_4_AUX_ISRC_EN_S 0 259 260 //***************************************************************************** 261 // 262 // Register: ADI_4_AUX_O_COMP 263 // 264 //***************************************************************************** 265 // Field: [7] COMPA_REF_RES_EN 266 // 267 // Enables 400kohm resistance from COMPA reference node to ground. Used with 268 // COMPA_REF_CURR_EN to generate voltage reference for cap-sense. 269 #define ADI_4_AUX_COMP_COMPA_REF_RES_EN 0x00000080 270 #define ADI_4_AUX_COMP_COMPA_REF_RES_EN_BITN 7 271 #define ADI_4_AUX_COMP_COMPA_REF_RES_EN_M 0x00000080 272 #define ADI_4_AUX_COMP_COMPA_REF_RES_EN_S 7 273 274 // Field: [6] COMPA_REF_CURR_EN 275 // 276 // Enables 2uA IPTAT current from ISRC to COMPA reference node. Requires 277 // ISRC.EN = 1. Used with COMPA_REF_RES_EN to generate voltage reference for 278 // cap-sense. 279 #define ADI_4_AUX_COMP_COMPA_REF_CURR_EN 0x00000040 280 #define ADI_4_AUX_COMP_COMPA_REF_CURR_EN_BITN 6 281 #define ADI_4_AUX_COMP_COMPA_REF_CURR_EN_M 0x00000040 282 #define ADI_4_AUX_COMP_COMPA_REF_CURR_EN_S 6 283 284 // Field: [5:3] COMPB_TRIM 285 // 286 // COMPB voltage reference trim temperature coded: 287 // ENUMs: 288 // DIV4 Divide reference by 4 289 // DIV3 Divide reference by 3 290 // DIV2 Divide reference by 2 291 // DIV1 No reference division 292 #define ADI_4_AUX_COMP_COMPB_TRIM_W 3 293 #define ADI_4_AUX_COMP_COMPB_TRIM_M 0x00000038 294 #define ADI_4_AUX_COMP_COMPB_TRIM_S 3 295 #define ADI_4_AUX_COMP_COMPB_TRIM_DIV4 0x00000038 296 #define ADI_4_AUX_COMP_COMPB_TRIM_DIV3 0x00000018 297 #define ADI_4_AUX_COMP_COMPB_TRIM_DIV2 0x00000008 298 #define ADI_4_AUX_COMP_COMPB_TRIM_DIV1 0x00000000 299 300 // Field: [2] COMPB_EN 301 // 302 // Comparator B enable 303 #define ADI_4_AUX_COMP_COMPB_EN 0x00000004 304 #define ADI_4_AUX_COMP_COMPB_EN_BITN 2 305 #define ADI_4_AUX_COMP_COMPB_EN_M 0x00000004 306 #define ADI_4_AUX_COMP_COMPB_EN_S 2 307 308 // Field: [0] COMPA_EN 309 // 310 // COMPA enable 311 #define ADI_4_AUX_COMP_COMPA_EN 0x00000001 312 #define ADI_4_AUX_COMP_COMPA_EN_BITN 0 313 #define ADI_4_AUX_COMP_COMPA_EN_M 0x00000001 314 #define ADI_4_AUX_COMP_COMPA_EN_S 0 315 316 //***************************************************************************** 317 // 318 // Register: ADI_4_AUX_O_MUX4 319 // 320 //***************************************************************************** 321 // Field: [7:0] COMPA_REF 322 // 323 // Internal. Only to be used through TI provided API. 324 // ENUMs: 325 // AUXIO0 Internal. Only to be used through TI provided API. 326 // AUXIO1 Internal. Only to be used through TI provided API. 327 // AUXIO2 Internal. Only to be used through TI provided API. 328 // AUXIO3 Internal. Only to be used through TI provided API. 329 // AUXIO4 Internal. Only to be used through TI provided API. 330 // AUXIO5 Internal. Only to be used through TI provided API. 331 // AUXIO6 Internal. Only to be used through TI provided API. 332 // AUXIO7 Internal. Only to be used through TI provided API. 333 // NC Internal. Only to be used through TI provided API. 334 #define ADI_4_AUX_MUX4_COMPA_REF_W 8 335 #define ADI_4_AUX_MUX4_COMPA_REF_M 0x000000FF 336 #define ADI_4_AUX_MUX4_COMPA_REF_S 0 337 #define ADI_4_AUX_MUX4_COMPA_REF_AUXIO0 0x00000080 338 #define ADI_4_AUX_MUX4_COMPA_REF_AUXIO1 0x00000040 339 #define ADI_4_AUX_MUX4_COMPA_REF_AUXIO2 0x00000020 340 #define ADI_4_AUX_MUX4_COMPA_REF_AUXIO3 0x00000010 341 #define ADI_4_AUX_MUX4_COMPA_REF_AUXIO4 0x00000008 342 #define ADI_4_AUX_MUX4_COMPA_REF_AUXIO5 0x00000004 343 #define ADI_4_AUX_MUX4_COMPA_REF_AUXIO6 0x00000002 344 #define ADI_4_AUX_MUX4_COMPA_REF_AUXIO7 0x00000001 345 #define ADI_4_AUX_MUX4_COMPA_REF_NC 0x00000000 346 347 //***************************************************************************** 348 // 349 // Register: ADI_4_AUX_O_ADC0 350 // 351 //***************************************************************************** 352 // Field: [7] SMPL_MODE 353 // 354 // ADC Sampling mode: 355 // 356 // 0: Synchronous mode 357 // 1: Asynchronous mode 358 // 359 // The ADC does a sample-and-hold before conversion. In synchronous mode the 360 // sampling starts when the ADC clock detects a rising edge on the trigger 361 // signal. Jitter/uncertainty will be inferred in the detection if the trigger 362 // signal originates from a domain that is asynchronous to the ADC clock. 363 // SMPL_CYCLE_EXP determines the the duration of sampling. 364 // Conversion starts immediately after sampling ends. 365 // 366 // In asynchronous mode the sampling is continuous when enabled. Sampling ends 367 // and conversion starts immediately with the rising edge of the trigger 368 // signal. Sampling restarts when the conversion has finished. 369 // Asynchronous mode is useful when it is important to avoid jitter in the 370 // sampling instant of an externally driven signal 371 #define ADI_4_AUX_ADC0_SMPL_MODE 0x00000080 372 #define ADI_4_AUX_ADC0_SMPL_MODE_BITN 7 373 #define ADI_4_AUX_ADC0_SMPL_MODE_M 0x00000080 374 #define ADI_4_AUX_ADC0_SMPL_MODE_S 7 375 376 // Field: [6:3] SMPL_CYCLE_EXP 377 // 378 // Controls the sampling duration before conversion when the ADC is operated in 379 // synchronous mode (SMPL_MODE = 0). The setting has no effect in asynchronous 380 // mode. The sampling duration is given as 2^(SMPL_CYCLE_EXP + 1) / 6 us. 381 // ENUMs: 382 // 10P9_MS 65536x 6 MHz clock periods = 10.9ms 383 // 5P46_MS 32768x 6 MHz clock periods = 5.46ms 384 // 2P73_MS 16384x 6 MHz clock periods = 2.73ms 385 // 1P37_MS 8192x 6 MHz clock periods = 1.37ms 386 // 682_US 4096x 6 MHz clock periods = 682us 387 // 341_US 2048x 6 MHz clock periods = 341us 388 // 170_US 1024x 6 MHz clock periods = 170us 389 // 85P3_US 512x 6 MHz clock periods = 85.3us 390 // 42P6_US 256x 6 MHz clock periods = 42.6us 391 // 21P3_US 128x 6 MHz clock periods = 21.3us 392 // 10P6_US 64x 6 MHz clock periods = 10.6us 393 // 5P3_US 32x 6 MHz clock periods = 5.3us 394 // 2P7_US 16x 6 MHz clock periods = 2.7us 395 #define ADI_4_AUX_ADC0_SMPL_CYCLE_EXP_W 4 396 #define ADI_4_AUX_ADC0_SMPL_CYCLE_EXP_M 0x00000078 397 #define ADI_4_AUX_ADC0_SMPL_CYCLE_EXP_S 3 398 #define ADI_4_AUX_ADC0_SMPL_CYCLE_EXP_10P9_MS 0x00000078 399 #define ADI_4_AUX_ADC0_SMPL_CYCLE_EXP_5P46_MS 0x00000070 400 #define ADI_4_AUX_ADC0_SMPL_CYCLE_EXP_2P73_MS 0x00000068 401 #define ADI_4_AUX_ADC0_SMPL_CYCLE_EXP_1P37_MS 0x00000060 402 #define ADI_4_AUX_ADC0_SMPL_CYCLE_EXP_682_US 0x00000058 403 #define ADI_4_AUX_ADC0_SMPL_CYCLE_EXP_341_US 0x00000050 404 #define ADI_4_AUX_ADC0_SMPL_CYCLE_EXP_170_US 0x00000048 405 #define ADI_4_AUX_ADC0_SMPL_CYCLE_EXP_85P3_US 0x00000040 406 #define ADI_4_AUX_ADC0_SMPL_CYCLE_EXP_42P6_US 0x00000038 407 #define ADI_4_AUX_ADC0_SMPL_CYCLE_EXP_21P3_US 0x00000030 408 #define ADI_4_AUX_ADC0_SMPL_CYCLE_EXP_10P6_US 0x00000028 409 #define ADI_4_AUX_ADC0_SMPL_CYCLE_EXP_5P3_US 0x00000020 410 #define ADI_4_AUX_ADC0_SMPL_CYCLE_EXP_2P7_US 0x00000018 411 412 // Field: [1] RESET_N 413 // 414 // Reset ADC digital subchip, active low. ADC must be reset every time it is 415 // reconfigured. 416 // 417 // 0: Reset 418 // 1: Normal operation 419 #define ADI_4_AUX_ADC0_RESET_N 0x00000002 420 #define ADI_4_AUX_ADC0_RESET_N_BITN 1 421 #define ADI_4_AUX_ADC0_RESET_N_M 0x00000002 422 #define ADI_4_AUX_ADC0_RESET_N_S 1 423 424 // Field: [0] EN 425 // 426 // ADC Enable 427 // 428 // 0: Disable 429 // 1: Enable 430 #define ADI_4_AUX_ADC0_EN 0x00000001 431 #define ADI_4_AUX_ADC0_EN_BITN 0 432 #define ADI_4_AUX_ADC0_EN_M 0x00000001 433 #define ADI_4_AUX_ADC0_EN_S 0 434 435 //***************************************************************************** 436 // 437 // Register: ADI_4_AUX_O_ADC1 438 // 439 //***************************************************************************** 440 // Field: [0] SCALE_DIS 441 // 442 // Internal. Only to be used through TI provided API. 443 #define ADI_4_AUX_ADC1_SCALE_DIS 0x00000001 444 #define ADI_4_AUX_ADC1_SCALE_DIS_BITN 0 445 #define ADI_4_AUX_ADC1_SCALE_DIS_M 0x00000001 446 #define ADI_4_AUX_ADC1_SCALE_DIS_S 0 447 448 //***************************************************************************** 449 // 450 // Register: ADI_4_AUX_O_ADCREF0 451 // 452 //***************************************************************************** 453 // Field: [6] REF_ON_IDLE 454 // 455 // Keep ADCREF powered up in IDLE state when ADC0.SMPL_MODE = 0. 456 // 457 // Set to 1 if ADC0.SMPL_CYCLE_EXP is less than 6 (21.3us sampling time) 458 #define ADI_4_AUX_ADCREF0_REF_ON_IDLE 0x00000040 459 #define ADI_4_AUX_ADCREF0_REF_ON_IDLE_BITN 6 460 #define ADI_4_AUX_ADCREF0_REF_ON_IDLE_M 0x00000040 461 #define ADI_4_AUX_ADCREF0_REF_ON_IDLE_S 6 462 463 // Field: [5] IOMUX 464 // 465 // Internal. Only to be used through TI provided API. 466 #define ADI_4_AUX_ADCREF0_IOMUX 0x00000020 467 #define ADI_4_AUX_ADCREF0_IOMUX_BITN 5 468 #define ADI_4_AUX_ADCREF0_IOMUX_M 0x00000020 469 #define ADI_4_AUX_ADCREF0_IOMUX_S 5 470 471 // Field: [4] EXT 472 // 473 // Internal. Only to be used through TI provided API. 474 #define ADI_4_AUX_ADCREF0_EXT 0x00000010 475 #define ADI_4_AUX_ADCREF0_EXT_BITN 4 476 #define ADI_4_AUX_ADCREF0_EXT_M 0x00000010 477 #define ADI_4_AUX_ADCREF0_EXT_S 4 478 479 // Field: [3] SRC 480 // 481 // ADC reference source: 482 // 483 // 0: Fixed reference = 4.3V 484 // 1: Relative reference = VDDS 485 #define ADI_4_AUX_ADCREF0_SRC 0x00000008 486 #define ADI_4_AUX_ADCREF0_SRC_BITN 3 487 #define ADI_4_AUX_ADCREF0_SRC_M 0x00000008 488 #define ADI_4_AUX_ADCREF0_SRC_S 3 489 490 // Field: [0] EN 491 // 492 // ADC reference module enable: 493 // 494 // 0: ADC reference module powered down 495 // 1: ADC reference module enabled 496 #define ADI_4_AUX_ADCREF0_EN 0x00000001 497 #define ADI_4_AUX_ADCREF0_EN_BITN 0 498 #define ADI_4_AUX_ADCREF0_EN_M 0x00000001 499 #define ADI_4_AUX_ADCREF0_EN_S 0 500 501 //***************************************************************************** 502 // 503 // Register: ADI_4_AUX_O_ADCREF1 504 // 505 //***************************************************************************** 506 // Field: [5:0] VTRIM 507 // 508 // Trim output voltage of ADC fixed reference (64 steps, 2's complement). 509 // Applies only for ADCREF0.SRC = 0. 510 // 511 // Examples: 512 // 0x00 - nominal voltage 1.43V 513 // 0x01 - nominal + 0.4% 1.435V 514 // 0x3F - nominal - 0.4% 1.425V 515 // 0x1F - maximum voltage 1.6V 516 // 0x20 - minimum voltage 1.3V 517 #define ADI_4_AUX_ADCREF1_VTRIM_W 6 518 #define ADI_4_AUX_ADCREF1_VTRIM_M 0x0000003F 519 #define ADI_4_AUX_ADCREF1_VTRIM_S 0 520 521 522 #endif // __ADI_4_AUX__ 523