1 /****************************************************************************** 2 * Filename: hw_aon_ioc_h 3 * Revised: 2015-11-12 13:07:02 +0100 (Thu, 12 Nov 2015) 4 * Revision: 45056 5 * 6 * Copyright (c) 2015, Texas Instruments Incorporated 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions are met: 11 * 12 * 1) Redistributions of source code must retain the above copyright notice, 13 * this list of conditions and the following disclaimer. 14 * 15 * 2) Redistributions in binary form must reproduce the above copyright notice, 16 * this list of conditions and the following disclaimer in the documentation 17 * and/or other materials provided with the distribution. 18 * 19 * 3) Neither the name of the ORGANIZATION nor the names of its contributors may 20 * be used to endorse or promote products derived from this software without 21 * specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 24 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 27 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 33 * POSSIBILITY OF SUCH DAMAGE. 34 * 35 ******************************************************************************/ 36 37 #ifndef __HW_AON_IOC_H__ 38 #define __HW_AON_IOC_H__ 39 40 //***************************************************************************** 41 // 42 // This section defines the register offsets of 43 // AON_IOC component 44 // 45 //***************************************************************************** 46 // Internal 47 #define AON_IOC_O_IOSTRMIN 0x00000000 48 49 // Internal 50 #define AON_IOC_O_IOSTRMED 0x00000004 51 52 // Internal 53 #define AON_IOC_O_IOSTRMAX 0x00000008 54 55 // IO Latch Control 56 #define AON_IOC_O_IOCLATCH 0x0000000C 57 58 // SCLK_LF External Output Control 59 #define AON_IOC_O_CLK32KCTL 0x00000010 60 61 //***************************************************************************** 62 // 63 // Register: AON_IOC_O_IOSTRMIN 64 // 65 //***************************************************************************** 66 // Field: [2:0] GRAY_CODE 67 // 68 // Internal. Only to be used through TI provided API. 69 #define AON_IOC_IOSTRMIN_GRAY_CODE_W 3 70 #define AON_IOC_IOSTRMIN_GRAY_CODE_M 0x00000007 71 #define AON_IOC_IOSTRMIN_GRAY_CODE_S 0 72 73 //***************************************************************************** 74 // 75 // Register: AON_IOC_O_IOSTRMED 76 // 77 //***************************************************************************** 78 // Field: [2:0] GRAY_CODE 79 // 80 // Internal. Only to be used through TI provided API. 81 #define AON_IOC_IOSTRMED_GRAY_CODE_W 3 82 #define AON_IOC_IOSTRMED_GRAY_CODE_M 0x00000007 83 #define AON_IOC_IOSTRMED_GRAY_CODE_S 0 84 85 //***************************************************************************** 86 // 87 // Register: AON_IOC_O_IOSTRMAX 88 // 89 //***************************************************************************** 90 // Field: [2:0] GRAY_CODE 91 // 92 // Internal. Only to be used through TI provided API. 93 #define AON_IOC_IOSTRMAX_GRAY_CODE_W 3 94 #define AON_IOC_IOSTRMAX_GRAY_CODE_M 0x00000007 95 #define AON_IOC_IOSTRMAX_GRAY_CODE_S 0 96 97 //***************************************************************************** 98 // 99 // Register: AON_IOC_O_IOCLATCH 100 // 101 //***************************************************************************** 102 // Field: [0] EN 103 // 104 // Controls latches between MCU IOC and AON_IOC. 105 // 106 // The latches are transparent by default. 107 // 108 // They must be closed prior to power off the domain(s) controlling the IOs in 109 // order to preserve IO values on external pins. 110 // ENUMs: 111 // TRANSP Latches are transparent, meaning the value of the 112 // IO is directly controlled by the GPIO or 113 // peripheral value 114 // STATIC Latches are static, meaning the current value on 115 // the IO pin is frozen by latches and kept even 116 // if GPIO module or a peripheral module is turned 117 // off 118 #define AON_IOC_IOCLATCH_EN 0x00000001 119 #define AON_IOC_IOCLATCH_EN_BITN 0 120 #define AON_IOC_IOCLATCH_EN_M 0x00000001 121 #define AON_IOC_IOCLATCH_EN_S 0 122 #define AON_IOC_IOCLATCH_EN_TRANSP 0x00000001 123 #define AON_IOC_IOCLATCH_EN_STATIC 0x00000000 124 125 //***************************************************************************** 126 // 127 // Register: AON_IOC_O_CLK32KCTL 128 // 129 //***************************************************************************** 130 // Field: [0] OE_N 131 // 132 // 0: Output enable active. SCLK_LF output on IO pin that has PORT_ID (e.g. 133 // IOC:IOCFG0.PORT_ID) set to AON_CLK32K. 134 // 1: Output enable not active 135 #define AON_IOC_CLK32KCTL_OE_N 0x00000001 136 #define AON_IOC_CLK32KCTL_OE_N_BITN 0 137 #define AON_IOC_CLK32KCTL_OE_N_M 0x00000001 138 #define AON_IOC_CLK32KCTL_OE_N_S 0 139 140 141 #endif // __AON_IOC__ 142