1 /****************************************************************************** 2 * Filename: hw_aux_evctl_h 3 * Revised: 2015-11-12 13:07:02 +0100 (Thu, 12 Nov 2015) 4 * Revision: 45056 5 * 6 * Copyright (c) 2015, Texas Instruments Incorporated 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions are met: 11 * 12 * 1) Redistributions of source code must retain the above copyright notice, 13 * this list of conditions and the following disclaimer. 14 * 15 * 2) Redistributions in binary form must reproduce the above copyright notice, 16 * this list of conditions and the following disclaimer in the documentation 17 * and/or other materials provided with the distribution. 18 * 19 * 3) Neither the name of the ORGANIZATION nor the names of its contributors may 20 * be used to endorse or promote products derived from this software without 21 * specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 24 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 27 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 33 * POSSIBILITY OF SUCH DAMAGE. 34 * 35 ******************************************************************************/ 36 37 #ifndef __HW_AUX_EVCTL_H__ 38 #define __HW_AUX_EVCTL_H__ 39 40 //***************************************************************************** 41 // 42 // This section defines the register offsets of 43 // AUX_EVCTL component 44 // 45 //***************************************************************************** 46 // Vector Configuration 0 47 #define AUX_EVCTL_O_VECCFG0 0x00000000 48 49 // Vector Configuration 1 50 #define AUX_EVCTL_O_VECCFG1 0x00000004 51 52 // Sensor Controller Engine Wait Event Selection 53 #define AUX_EVCTL_O_SCEWEVSEL 0x00000008 54 55 // Events To AON Domain Flags 56 #define AUX_EVCTL_O_EVTOAONFLAGS 0x0000000C 57 58 // Events To AON Domain Polarity 59 #define AUX_EVCTL_O_EVTOAONPOL 0x00000010 60 61 // Direct Memory Access Control 62 #define AUX_EVCTL_O_DMACTL 0x00000014 63 64 // Software Event Set 65 #define AUX_EVCTL_O_SWEVSET 0x00000018 66 67 // Event Status 0 68 #define AUX_EVCTL_O_EVSTAT0 0x0000001C 69 70 // Event Status 1 71 #define AUX_EVCTL_O_EVSTAT1 0x00000020 72 73 // Event To MCU Domain Polarity 74 #define AUX_EVCTL_O_EVTOMCUPOL 0x00000024 75 76 // Events to MCU Domain Flags 77 #define AUX_EVCTL_O_EVTOMCUFLAGS 0x00000028 78 79 // Combined Event To MCU Domain Mask 80 #define AUX_EVCTL_O_COMBEVTOMCUMASK 0x0000002C 81 82 // Vector Flags 83 #define AUX_EVCTL_O_VECFLAGS 0x00000034 84 85 // Events To MCU Domain Flags Clear 86 #define AUX_EVCTL_O_EVTOMCUFLAGSCLR 0x00000038 87 88 // Events To AON Domain Clear 89 #define AUX_EVCTL_O_EVTOAONFLAGSCLR 0x0000003C 90 91 // Vector Flags Clear 92 #define AUX_EVCTL_O_VECFLAGSCLR 0x00000040 93 94 //***************************************************************************** 95 // 96 // Register: AUX_EVCTL_O_VECCFG0 97 // 98 //***************************************************************************** 99 // Field: [14] VEC1_POL 100 // 101 // Selects vector 1 trigger event polarity. 102 // 103 // To manually trigger vector 1 execution, set VEC1_EV to a known static value, 104 // and toggle VEC1_POL twice. 105 // ENUMs: 106 // FALL Falling edge triggers execution. 107 // RISE Rising edge triggers execution. 108 #define AUX_EVCTL_VECCFG0_VEC1_POL 0x00004000 109 #define AUX_EVCTL_VECCFG0_VEC1_POL_BITN 14 110 #define AUX_EVCTL_VECCFG0_VEC1_POL_M 0x00004000 111 #define AUX_EVCTL_VECCFG0_VEC1_POL_S 14 112 #define AUX_EVCTL_VECCFG0_VEC1_POL_FALL 0x00004000 113 #define AUX_EVCTL_VECCFG0_VEC1_POL_RISE 0x00000000 114 115 // Field: [13] VEC1_EN 116 // 117 // Enables (1) or disables (0) triggering of vector 1 execution. 118 // 119 // When enabled, the edge selected by VEC1_POL on the event selected by VEC1_EV 120 // will set VECFLAGS.VEC1, which in turn triggers vector 1 execution. 121 // 122 // Note: Lower vectors (0) have priority. 123 // ENUMs: 124 // EN An event selected by VEC1_EV with polarity from 125 // VEC1_POL triggers a jump to vector # 1 when 126 // AUX_SCE is in sleep 127 // DIS Event detection is disabled 128 #define AUX_EVCTL_VECCFG0_VEC1_EN 0x00002000 129 #define AUX_EVCTL_VECCFG0_VEC1_EN_BITN 13 130 #define AUX_EVCTL_VECCFG0_VEC1_EN_M 0x00002000 131 #define AUX_EVCTL_VECCFG0_VEC1_EN_S 13 132 #define AUX_EVCTL_VECCFG0_VEC1_EN_EN 0x00002000 133 #define AUX_EVCTL_VECCFG0_VEC1_EN_DIS 0x00000000 134 135 // Field: [12:8] VEC1_EV 136 // 137 // Selects vector 1 trigger source event. 138 // ENUMs: 139 // ADC_IRQ ADC_IRQ event 140 // MCU_EV MCU_EV event 141 // ACLK_REF ACLK_REF event 142 // AUXIO15 AUXIO15 input data 143 // AUXIO14 AUXIO14 input data 144 // AUXIO13 AUXIO13 input data 145 // AUXIO12 AUXIO12 input data 146 // AUXIO11 AUXIO11 input data 147 // AUXIO10 AUXIO10 input data 148 // AUXIO9 AUXIO9 input data 149 // AUXIO8 AUXIO8 input data 150 // AUXIO7 AUXIO7 input data 151 // AUXIO6 AUXIO6 input data 152 // AUXIO5 AUXIO5 input data 153 // AUXIO4 AUXIO4 input data 154 // AUXIO3 AUXIO3 input data 155 // AUXIO2 AUXIO2 input data 156 // AUXIO1 AUXIO1 input data 157 // AUXIO0 AUXIO0 input data 158 // AON_PROG_WU AON_PROG_WU event 159 // AON_SW AON_SW event 160 // OBSMUX1 OBSMUX1 event 161 // OBSMUX0 OBSMUX0 event 162 // ADC_FIFO_ALMOST_FULL ADC_FIFO_ALMOST_FULL event 163 // ADC_DONE ADC_DONE event 164 // SMPH_AUTOTAKE_DONE SMPH_AUTOTAKE_DONE event 165 // TIMER1_EV TIMER1_EV event 166 // TIMER0_EV TIMER0_EV event 167 // TDC_DONE TDC_DONE event 168 // AUX_COMPB AUX_COMPB event 169 // AUX_COMPA AUX_COMPA event 170 // AON_RTC_CH2 AON_RTC_CH2 event 171 #define AUX_EVCTL_VECCFG0_VEC1_EV_W 5 172 #define AUX_EVCTL_VECCFG0_VEC1_EV_M 0x00001F00 173 #define AUX_EVCTL_VECCFG0_VEC1_EV_S 8 174 #define AUX_EVCTL_VECCFG0_VEC1_EV_ADC_IRQ 0x00001F00 175 #define AUX_EVCTL_VECCFG0_VEC1_EV_MCU_EV 0x00001E00 176 #define AUX_EVCTL_VECCFG0_VEC1_EV_ACLK_REF 0x00001D00 177 #define AUX_EVCTL_VECCFG0_VEC1_EV_AUXIO15 0x00001C00 178 #define AUX_EVCTL_VECCFG0_VEC1_EV_AUXIO14 0x00001B00 179 #define AUX_EVCTL_VECCFG0_VEC1_EV_AUXIO13 0x00001A00 180 #define AUX_EVCTL_VECCFG0_VEC1_EV_AUXIO12 0x00001900 181 #define AUX_EVCTL_VECCFG0_VEC1_EV_AUXIO11 0x00001800 182 #define AUX_EVCTL_VECCFG0_VEC1_EV_AUXIO10 0x00001700 183 #define AUX_EVCTL_VECCFG0_VEC1_EV_AUXIO9 0x00001600 184 #define AUX_EVCTL_VECCFG0_VEC1_EV_AUXIO8 0x00001500 185 #define AUX_EVCTL_VECCFG0_VEC1_EV_AUXIO7 0x00001400 186 #define AUX_EVCTL_VECCFG0_VEC1_EV_AUXIO6 0x00001300 187 #define AUX_EVCTL_VECCFG0_VEC1_EV_AUXIO5 0x00001200 188 #define AUX_EVCTL_VECCFG0_VEC1_EV_AUXIO4 0x00001100 189 #define AUX_EVCTL_VECCFG0_VEC1_EV_AUXIO3 0x00001000 190 #define AUX_EVCTL_VECCFG0_VEC1_EV_AUXIO2 0x00000F00 191 #define AUX_EVCTL_VECCFG0_VEC1_EV_AUXIO1 0x00000E00 192 #define AUX_EVCTL_VECCFG0_VEC1_EV_AUXIO0 0x00000D00 193 #define AUX_EVCTL_VECCFG0_VEC1_EV_AON_PROG_WU 0x00000C00 194 #define AUX_EVCTL_VECCFG0_VEC1_EV_AON_SW 0x00000B00 195 #define AUX_EVCTL_VECCFG0_VEC1_EV_OBSMUX1 0x00000A00 196 #define AUX_EVCTL_VECCFG0_VEC1_EV_OBSMUX0 0x00000900 197 #define AUX_EVCTL_VECCFG0_VEC1_EV_ADC_FIFO_ALMOST_FULL 0x00000800 198 #define AUX_EVCTL_VECCFG0_VEC1_EV_ADC_DONE 0x00000700 199 #define AUX_EVCTL_VECCFG0_VEC1_EV_SMPH_AUTOTAKE_DONE 0x00000600 200 #define AUX_EVCTL_VECCFG0_VEC1_EV_TIMER1_EV 0x00000500 201 #define AUX_EVCTL_VECCFG0_VEC1_EV_TIMER0_EV 0x00000400 202 #define AUX_EVCTL_VECCFG0_VEC1_EV_TDC_DONE 0x00000300 203 #define AUX_EVCTL_VECCFG0_VEC1_EV_AUX_COMPB 0x00000200 204 #define AUX_EVCTL_VECCFG0_VEC1_EV_AUX_COMPA 0x00000100 205 #define AUX_EVCTL_VECCFG0_VEC1_EV_AON_RTC_CH2 0x00000000 206 207 // Field: [6] VEC0_POL 208 // 209 // Selects vector 0 trigger event polarity. 210 // 211 // To manually trigger vector 0 execution, set VEC0_EV to a known static value, 212 // and toggle VEC0_POL twice. 213 // ENUMs: 214 // FALL Falling edge triggers execution. 215 // RISE Rising edge triggers execution. 216 #define AUX_EVCTL_VECCFG0_VEC0_POL 0x00000040 217 #define AUX_EVCTL_VECCFG0_VEC0_POL_BITN 6 218 #define AUX_EVCTL_VECCFG0_VEC0_POL_M 0x00000040 219 #define AUX_EVCTL_VECCFG0_VEC0_POL_S 6 220 #define AUX_EVCTL_VECCFG0_VEC0_POL_FALL 0x00000040 221 #define AUX_EVCTL_VECCFG0_VEC0_POL_RISE 0x00000000 222 223 // Field: [5] VEC0_EN 224 // 225 // Enables (1) or disables (0) triggering of vector 0 execution. 226 // 227 // When enabled, the edge selected by VEC0_POL on the event selected by VEC0_EV 228 // will set VECFLAGS.VEC0, which in turn triggers vector 0 execution. 229 // ENUMs: 230 // EN An event selected by VEC0_EV with polarity from 231 // VEC0_POL triggers a jump to vector #0 when 232 // AUX_SCE is in sleep 233 // DIS Event detection is disabled 234 #define AUX_EVCTL_VECCFG0_VEC0_EN 0x00000020 235 #define AUX_EVCTL_VECCFG0_VEC0_EN_BITN 5 236 #define AUX_EVCTL_VECCFG0_VEC0_EN_M 0x00000020 237 #define AUX_EVCTL_VECCFG0_VEC0_EN_S 5 238 #define AUX_EVCTL_VECCFG0_VEC0_EN_EN 0x00000020 239 #define AUX_EVCTL_VECCFG0_VEC0_EN_DIS 0x00000000 240 241 // Field: [4:0] VEC0_EV 242 // 243 // Selects vector 0 trigger source event. 244 // ENUMs: 245 // ADC_IRQ ADC_IRQ event 246 // MCU_EV MCU_EV event 247 // ACLK_REF ACLK_REF event 248 // AUXIO15 AUXIO15 input data 249 // AUXIO14 AUXIO14 input data 250 // AUXIO13 AUXIO13 input data 251 // AUXIO12 AUXIO12 input data 252 // AUXIO11 AUXIO11 input data 253 // AUXIO10 AUXIO10 input data 254 // AUXIO9 AUXIO9 input data 255 // AUXIO8 AUXIO8 input data 256 // AUXIO7 AUXIO7 input data 257 // AUXIO6 AUXIO6 input data 258 // AUXIO5 AUXIO5 input data 259 // AUXIO4 AUXIO4 input data 260 // AUXIO3 AUXIO3 input data 261 // AUXIO2 AUXIO2 input data 262 // AUXIO1 AUXIO1 input data 263 // AUXIO0 AUXIO0 input data 264 // AON_PROG_WU AON_PROG_WU event 265 // AON_SW AON_SW event 266 // OBSMUX1 OBSMUX1 event 267 // OBSMUX0 OBSMUX0 event 268 // ADC_FIFO_ALMOST_FULL ADC_FIFO_ALMOST_FULL event 269 // ADC_DONE ADC_DONE event 270 // SMPH_AUTOTAKE_DONE SMPH_AUTOTAKE_DONE event 271 // TIMER1_EV TIMER1_EV event 272 // TIMER0_EV TIMER0_EV event 273 // TDC_DONE TDC_DONE event 274 // AUX_COMPB AUX_COMPB event 275 // AUX_COMPA AUX_COMPA event 276 // AON_RTC_CH2 AON_RTC_CH2 event 277 #define AUX_EVCTL_VECCFG0_VEC0_EV_W 5 278 #define AUX_EVCTL_VECCFG0_VEC0_EV_M 0x0000001F 279 #define AUX_EVCTL_VECCFG0_VEC0_EV_S 0 280 #define AUX_EVCTL_VECCFG0_VEC0_EV_ADC_IRQ 0x0000001F 281 #define AUX_EVCTL_VECCFG0_VEC0_EV_MCU_EV 0x0000001E 282 #define AUX_EVCTL_VECCFG0_VEC0_EV_ACLK_REF 0x0000001D 283 #define AUX_EVCTL_VECCFG0_VEC0_EV_AUXIO15 0x0000001C 284 #define AUX_EVCTL_VECCFG0_VEC0_EV_AUXIO14 0x0000001B 285 #define AUX_EVCTL_VECCFG0_VEC0_EV_AUXIO13 0x0000001A 286 #define AUX_EVCTL_VECCFG0_VEC0_EV_AUXIO12 0x00000019 287 #define AUX_EVCTL_VECCFG0_VEC0_EV_AUXIO11 0x00000018 288 #define AUX_EVCTL_VECCFG0_VEC0_EV_AUXIO10 0x00000017 289 #define AUX_EVCTL_VECCFG0_VEC0_EV_AUXIO9 0x00000016 290 #define AUX_EVCTL_VECCFG0_VEC0_EV_AUXIO8 0x00000015 291 #define AUX_EVCTL_VECCFG0_VEC0_EV_AUXIO7 0x00000014 292 #define AUX_EVCTL_VECCFG0_VEC0_EV_AUXIO6 0x00000013 293 #define AUX_EVCTL_VECCFG0_VEC0_EV_AUXIO5 0x00000012 294 #define AUX_EVCTL_VECCFG0_VEC0_EV_AUXIO4 0x00000011 295 #define AUX_EVCTL_VECCFG0_VEC0_EV_AUXIO3 0x00000010 296 #define AUX_EVCTL_VECCFG0_VEC0_EV_AUXIO2 0x0000000F 297 #define AUX_EVCTL_VECCFG0_VEC0_EV_AUXIO1 0x0000000E 298 #define AUX_EVCTL_VECCFG0_VEC0_EV_AUXIO0 0x0000000D 299 #define AUX_EVCTL_VECCFG0_VEC0_EV_AON_PROG_WU 0x0000000C 300 #define AUX_EVCTL_VECCFG0_VEC0_EV_AON_SW 0x0000000B 301 #define AUX_EVCTL_VECCFG0_VEC0_EV_OBSMUX1 0x0000000A 302 #define AUX_EVCTL_VECCFG0_VEC0_EV_OBSMUX0 0x00000009 303 #define AUX_EVCTL_VECCFG0_VEC0_EV_ADC_FIFO_ALMOST_FULL 0x00000008 304 #define AUX_EVCTL_VECCFG0_VEC0_EV_ADC_DONE 0x00000007 305 #define AUX_EVCTL_VECCFG0_VEC0_EV_SMPH_AUTOTAKE_DONE 0x00000006 306 #define AUX_EVCTL_VECCFG0_VEC0_EV_TIMER1_EV 0x00000005 307 #define AUX_EVCTL_VECCFG0_VEC0_EV_TIMER0_EV 0x00000004 308 #define AUX_EVCTL_VECCFG0_VEC0_EV_TDC_DONE 0x00000003 309 #define AUX_EVCTL_VECCFG0_VEC0_EV_AUX_COMPB 0x00000002 310 #define AUX_EVCTL_VECCFG0_VEC0_EV_AUX_COMPA 0x00000001 311 #define AUX_EVCTL_VECCFG0_VEC0_EV_AON_RTC_CH2 0x00000000 312 313 //***************************************************************************** 314 // 315 // Register: AUX_EVCTL_O_VECCFG1 316 // 317 //***************************************************************************** 318 // Field: [14] VEC3_POL 319 // 320 // Selects vector 3 trigger event polarity. 321 // 322 // To manually trigger vector 3 execution, set VEC3_EV to a known static value, 323 // and toggle VEC3_POL twice. 324 // ENUMs: 325 // FALL Falling edge triggers execution. 326 // RISE Rising edge triggers execution. 327 #define AUX_EVCTL_VECCFG1_VEC3_POL 0x00004000 328 #define AUX_EVCTL_VECCFG1_VEC3_POL_BITN 14 329 #define AUX_EVCTL_VECCFG1_VEC3_POL_M 0x00004000 330 #define AUX_EVCTL_VECCFG1_VEC3_POL_S 14 331 #define AUX_EVCTL_VECCFG1_VEC3_POL_FALL 0x00004000 332 #define AUX_EVCTL_VECCFG1_VEC3_POL_RISE 0x00000000 333 334 // Field: [13] VEC3_EN 335 // 336 // Enables (1) or disables (0) triggering of vector 3 execution. 337 // 338 // When enabled, the edge selected by VEC3_POL on the event selected by VEC3_EV 339 // will set VECFLAGS.VEC3, which in turn triggers vector 3 execution. 340 // 341 // Note: Lower vectors (0, 1 and 2) have priority. 342 // ENUMs: 343 // EN An event selected by VEC3_EV with polarity from 344 // VEC3_POL triggers a jump to vector # 3 when 345 // AUX_SCE is in sleep 346 // DIS Event detection is disabled 347 #define AUX_EVCTL_VECCFG1_VEC3_EN 0x00002000 348 #define AUX_EVCTL_VECCFG1_VEC3_EN_BITN 13 349 #define AUX_EVCTL_VECCFG1_VEC3_EN_M 0x00002000 350 #define AUX_EVCTL_VECCFG1_VEC3_EN_S 13 351 #define AUX_EVCTL_VECCFG1_VEC3_EN_EN 0x00002000 352 #define AUX_EVCTL_VECCFG1_VEC3_EN_DIS 0x00000000 353 354 // Field: [12:8] VEC3_EV 355 // 356 // Selects vector 3 trigger source event. 357 // ENUMs: 358 // ADC_IRQ ADC_IRQ event 359 // MCU_EV MCU_EV event 360 // ACLK_REF ACLK_REF event 361 // AUXIO15 AUXIO15 input data 362 // AUXIO14 AUXIO14 input data 363 // AUXIO13 AUXIO13 input data 364 // AUXIO12 AUXIO12 input data 365 // AUXIO11 AUXIO11 input data 366 // AUXIO10 AUXIO10 input data 367 // AUXIO9 AUXIO9 input data 368 // AUXIO8 AUXIO8 input data 369 // AUXIO7 AUXIO7 input data 370 // AUXIO6 AUXIO6 input data 371 // AUXIO5 AUXIO5 input data 372 // AUXIO4 AUXIO4 input data 373 // AUXIO3 AUXIO3 input data 374 // AUXIO2 AUXIO2 input data 375 // AUXIO1 AUXIO1 input data 376 // AUXIO0 AUXIO0 input data 377 // AON_PROG_WU AON_PROG_WU event 378 // AON_SW AON_SW event 379 // OBSMUX1 OBSMUX1 event 380 // OBSMUX0 OBSMUX0 event 381 // ADC_FIFO_ALMOST_FULL ADC_FIFO_ALMOST_FULL event 382 // ADC_DONE ADC_DONE event 383 // SMPH_AUTOTAKE_DONE SMPH_AUTOTAKE_DONE event 384 // TIMER1_EV TIMER1_EV event 385 // TIMER0_EV TIMER0_EV event 386 // TDC_DONE TDC_DONE event 387 // AUX_COMPB AUX_COMPB event 388 // AUX_COMPA AUX_COMPA event 389 // AON_RTC_CH2 AON_RTC_CH2 event 390 #define AUX_EVCTL_VECCFG1_VEC3_EV_W 5 391 #define AUX_EVCTL_VECCFG1_VEC3_EV_M 0x00001F00 392 #define AUX_EVCTL_VECCFG1_VEC3_EV_S 8 393 #define AUX_EVCTL_VECCFG1_VEC3_EV_ADC_IRQ 0x00001F00 394 #define AUX_EVCTL_VECCFG1_VEC3_EV_MCU_EV 0x00001E00 395 #define AUX_EVCTL_VECCFG1_VEC3_EV_ACLK_REF 0x00001D00 396 #define AUX_EVCTL_VECCFG1_VEC3_EV_AUXIO15 0x00001C00 397 #define AUX_EVCTL_VECCFG1_VEC3_EV_AUXIO14 0x00001B00 398 #define AUX_EVCTL_VECCFG1_VEC3_EV_AUXIO13 0x00001A00 399 #define AUX_EVCTL_VECCFG1_VEC3_EV_AUXIO12 0x00001900 400 #define AUX_EVCTL_VECCFG1_VEC3_EV_AUXIO11 0x00001800 401 #define AUX_EVCTL_VECCFG1_VEC3_EV_AUXIO10 0x00001700 402 #define AUX_EVCTL_VECCFG1_VEC3_EV_AUXIO9 0x00001600 403 #define AUX_EVCTL_VECCFG1_VEC3_EV_AUXIO8 0x00001500 404 #define AUX_EVCTL_VECCFG1_VEC3_EV_AUXIO7 0x00001400 405 #define AUX_EVCTL_VECCFG1_VEC3_EV_AUXIO6 0x00001300 406 #define AUX_EVCTL_VECCFG1_VEC3_EV_AUXIO5 0x00001200 407 #define AUX_EVCTL_VECCFG1_VEC3_EV_AUXIO4 0x00001100 408 #define AUX_EVCTL_VECCFG1_VEC3_EV_AUXIO3 0x00001000 409 #define AUX_EVCTL_VECCFG1_VEC3_EV_AUXIO2 0x00000F00 410 #define AUX_EVCTL_VECCFG1_VEC3_EV_AUXIO1 0x00000E00 411 #define AUX_EVCTL_VECCFG1_VEC3_EV_AUXIO0 0x00000D00 412 #define AUX_EVCTL_VECCFG1_VEC3_EV_AON_PROG_WU 0x00000C00 413 #define AUX_EVCTL_VECCFG1_VEC3_EV_AON_SW 0x00000B00 414 #define AUX_EVCTL_VECCFG1_VEC3_EV_OBSMUX1 0x00000A00 415 #define AUX_EVCTL_VECCFG1_VEC3_EV_OBSMUX0 0x00000900 416 #define AUX_EVCTL_VECCFG1_VEC3_EV_ADC_FIFO_ALMOST_FULL 0x00000800 417 #define AUX_EVCTL_VECCFG1_VEC3_EV_ADC_DONE 0x00000700 418 #define AUX_EVCTL_VECCFG1_VEC3_EV_SMPH_AUTOTAKE_DONE 0x00000600 419 #define AUX_EVCTL_VECCFG1_VEC3_EV_TIMER1_EV 0x00000500 420 #define AUX_EVCTL_VECCFG1_VEC3_EV_TIMER0_EV 0x00000400 421 #define AUX_EVCTL_VECCFG1_VEC3_EV_TDC_DONE 0x00000300 422 #define AUX_EVCTL_VECCFG1_VEC3_EV_AUX_COMPB 0x00000200 423 #define AUX_EVCTL_VECCFG1_VEC3_EV_AUX_COMPA 0x00000100 424 #define AUX_EVCTL_VECCFG1_VEC3_EV_AON_RTC_CH2 0x00000000 425 426 // Field: [6] VEC2_POL 427 // 428 // Selects vector 2 trigger event polarity. 429 // 430 // To manually trigger vector 2 execution, set VEC2_EV to a known static value, 431 // and toggle VEC2_POL twice. 432 // ENUMs: 433 // FALL Falling edge triggers execution. 434 // RISE Rising edge triggers execution. 435 #define AUX_EVCTL_VECCFG1_VEC2_POL 0x00000040 436 #define AUX_EVCTL_VECCFG1_VEC2_POL_BITN 6 437 #define AUX_EVCTL_VECCFG1_VEC2_POL_M 0x00000040 438 #define AUX_EVCTL_VECCFG1_VEC2_POL_S 6 439 #define AUX_EVCTL_VECCFG1_VEC2_POL_FALL 0x00000040 440 #define AUX_EVCTL_VECCFG1_VEC2_POL_RISE 0x00000000 441 442 // Field: [5] VEC2_EN 443 // 444 // Enables (1) or disables (0) triggering of vector 2 execution. 445 // 446 // When enabled, the edge selected by VEC2_POL on the event selected by VEC2_EV 447 // will set VECFLAGS.VEC2, which in turn triggers vector 2 execution. 448 // 449 // Note: Lower vectors (0 and 1) have priority. 450 // ENUMs: 451 // EN An event selected by VEC2_EV with polarity from 452 // VEC2_POL triggers a jump to vector # 2 when 453 // AUX_SCE is in sleep 454 // DIS Event detection is disabled 455 #define AUX_EVCTL_VECCFG1_VEC2_EN 0x00000020 456 #define AUX_EVCTL_VECCFG1_VEC2_EN_BITN 5 457 #define AUX_EVCTL_VECCFG1_VEC2_EN_M 0x00000020 458 #define AUX_EVCTL_VECCFG1_VEC2_EN_S 5 459 #define AUX_EVCTL_VECCFG1_VEC2_EN_EN 0x00000020 460 #define AUX_EVCTL_VECCFG1_VEC2_EN_DIS 0x00000000 461 462 // Field: [4:0] VEC2_EV 463 // 464 // Selects vector 2 trigger source event. 465 // ENUMs: 466 // ADC_IRQ ADC_IRQ event 467 // MCU_EV MCU_EV event 468 // ACLK_REF ACLK_REF event 469 // AUXIO15 AUXIO15 input data 470 // AUXIO14 AUXIO14 input data 471 // AUXIO13 AUXIO13 input data 472 // AUXIO12 AUXIO12 input data 473 // AUXIO11 AUXIO11 input data 474 // AUXIO10 AUXIO10 input data 475 // AUXIO9 AUXIO9 input data 476 // AUXIO8 AUXIO8 input data 477 // AUXIO7 AUXIO7 input data 478 // AUXIO6 AUXIO6 input data 479 // AUXIO5 AUXIO5 input data 480 // AUXIO4 AUXIO4 input data 481 // AUXIO3 AUXIO3 input data 482 // AUXIO2 AUXIO2 input data 483 // AUXIO1 AUXIO1 input data 484 // AUXIO0 AUXIO0 input data 485 // AON_PROG_WU AON_PROG_WU event 486 // AON_SW AON_SW event 487 // OBSMUX1 OBSMUX1 event 488 // OBSMUX0 OBSMUX0 event 489 // ADC_FIFO_ALMOST_FULL ADC_FIFO_ALMOST_FULL event 490 // ADC_DONE ADC_DONE event 491 // SMPH_AUTOTAKE_DONE SMPH_AUTOTAKE_DONE event 492 // TIMER1_EV TIMER1_EV event 493 // TIMER0_EV TIMER0_EV event 494 // TDC_DONE TDC_DONE event 495 // AUX_COMPB AUX_COMPB event 496 // AUX_COMPA AUX_COMPA event 497 // AON_RTC_CH2 AON_RTC_CH2 event 498 #define AUX_EVCTL_VECCFG1_VEC2_EV_W 5 499 #define AUX_EVCTL_VECCFG1_VEC2_EV_M 0x0000001F 500 #define AUX_EVCTL_VECCFG1_VEC2_EV_S 0 501 #define AUX_EVCTL_VECCFG1_VEC2_EV_ADC_IRQ 0x0000001F 502 #define AUX_EVCTL_VECCFG1_VEC2_EV_MCU_EV 0x0000001E 503 #define AUX_EVCTL_VECCFG1_VEC2_EV_ACLK_REF 0x0000001D 504 #define AUX_EVCTL_VECCFG1_VEC2_EV_AUXIO15 0x0000001C 505 #define AUX_EVCTL_VECCFG1_VEC2_EV_AUXIO14 0x0000001B 506 #define AUX_EVCTL_VECCFG1_VEC2_EV_AUXIO13 0x0000001A 507 #define AUX_EVCTL_VECCFG1_VEC2_EV_AUXIO12 0x00000019 508 #define AUX_EVCTL_VECCFG1_VEC2_EV_AUXIO11 0x00000018 509 #define AUX_EVCTL_VECCFG1_VEC2_EV_AUXIO10 0x00000017 510 #define AUX_EVCTL_VECCFG1_VEC2_EV_AUXIO9 0x00000016 511 #define AUX_EVCTL_VECCFG1_VEC2_EV_AUXIO8 0x00000015 512 #define AUX_EVCTL_VECCFG1_VEC2_EV_AUXIO7 0x00000014 513 #define AUX_EVCTL_VECCFG1_VEC2_EV_AUXIO6 0x00000013 514 #define AUX_EVCTL_VECCFG1_VEC2_EV_AUXIO5 0x00000012 515 #define AUX_EVCTL_VECCFG1_VEC2_EV_AUXIO4 0x00000011 516 #define AUX_EVCTL_VECCFG1_VEC2_EV_AUXIO3 0x00000010 517 #define AUX_EVCTL_VECCFG1_VEC2_EV_AUXIO2 0x0000000F 518 #define AUX_EVCTL_VECCFG1_VEC2_EV_AUXIO1 0x0000000E 519 #define AUX_EVCTL_VECCFG1_VEC2_EV_AUXIO0 0x0000000D 520 #define AUX_EVCTL_VECCFG1_VEC2_EV_AON_PROG_WU 0x0000000C 521 #define AUX_EVCTL_VECCFG1_VEC2_EV_AON_SW 0x0000000B 522 #define AUX_EVCTL_VECCFG1_VEC2_EV_OBSMUX1 0x0000000A 523 #define AUX_EVCTL_VECCFG1_VEC2_EV_OBSMUX0 0x00000009 524 #define AUX_EVCTL_VECCFG1_VEC2_EV_ADC_FIFO_ALMOST_FULL 0x00000008 525 #define AUX_EVCTL_VECCFG1_VEC2_EV_ADC_DONE 0x00000007 526 #define AUX_EVCTL_VECCFG1_VEC2_EV_SMPH_AUTOTAKE_DONE 0x00000006 527 #define AUX_EVCTL_VECCFG1_VEC2_EV_TIMER1_EV 0x00000005 528 #define AUX_EVCTL_VECCFG1_VEC2_EV_TIMER0_EV 0x00000004 529 #define AUX_EVCTL_VECCFG1_VEC2_EV_TDC_DONE 0x00000003 530 #define AUX_EVCTL_VECCFG1_VEC2_EV_AUX_COMPB 0x00000002 531 #define AUX_EVCTL_VECCFG1_VEC2_EV_AUX_COMPA 0x00000001 532 #define AUX_EVCTL_VECCFG1_VEC2_EV_AON_RTC_CH2 0x00000000 533 534 //***************************************************************************** 535 // 536 // Register: AUX_EVCTL_O_SCEWEVSEL 537 // 538 //***************************************************************************** 539 // Field: [4:0] WEV7_EV 540 // 541 // Selects the event source to be mapped to AUX_SCE:WUSTAT.EV_SIGNALS bit 7. 542 // ENUMs: 543 // ADC_IRQ ADC_IRQ event 544 // MCU_EV MCU_EV event 545 // ACLK_REF ACLK_REF event 546 // AUXIO15 AUXIO15 input data 547 // AUXIO14 AUXIO14 input data 548 // AUXIO13 AUXIO13 input data 549 // AUXIO12 AUXIO12 input data 550 // AUXIO11 AUXIO11 input data 551 // AUXIO10 AUXIO10 input data 552 // AUXIO9 AUXIO9 input data 553 // AUXIO8 AUXIO8 input data 554 // AUXIO7 AUXIO7 input data 555 // AUXIO6 AUXIO6 input data 556 // AUXIO5 AUXIO5 input data 557 // AUXIO4 AUXIO4 input data 558 // AUXIO3 AUXIO3 input data 559 // AUXIO2 AUXIO2 input data 560 // AUXIO1 AUXIO1 input data 561 // AUXIO0 AUXIO0 input data 562 // AON_PROG_WU AON_PROG_WU event 563 // AON_SW AON_SW event 564 // OBSMUX1 OBSMUX1 event 565 // OBSMUX0 OBSMUX0 event 566 // ADC_FIFO_ALMOST_FULL ADC_FIFO_ALMOST_FULL event 567 // ADC_DONE ADC_DONE event 568 // SMPH_AUTOTAKE_DONE SMPH_AUTOTAKE_DONE event 569 // TIMER1_EV TIMER1_EV event 570 // TIMER0_EV TIMER0_EV event 571 // TDC_DONE TDC_DONE event 572 // AUX_COMPB AUX_COMPB event 573 // AUX_COMPA AUX_COMPA event 574 // AON_RTC_CH2 AON_RTC_CH2 event 575 #define AUX_EVCTL_SCEWEVSEL_WEV7_EV_W 5 576 #define AUX_EVCTL_SCEWEVSEL_WEV7_EV_M 0x0000001F 577 #define AUX_EVCTL_SCEWEVSEL_WEV7_EV_S 0 578 #define AUX_EVCTL_SCEWEVSEL_WEV7_EV_ADC_IRQ 0x0000001F 579 #define AUX_EVCTL_SCEWEVSEL_WEV7_EV_MCU_EV 0x0000001E 580 #define AUX_EVCTL_SCEWEVSEL_WEV7_EV_ACLK_REF 0x0000001D 581 #define AUX_EVCTL_SCEWEVSEL_WEV7_EV_AUXIO15 0x0000001C 582 #define AUX_EVCTL_SCEWEVSEL_WEV7_EV_AUXIO14 0x0000001B 583 #define AUX_EVCTL_SCEWEVSEL_WEV7_EV_AUXIO13 0x0000001A 584 #define AUX_EVCTL_SCEWEVSEL_WEV7_EV_AUXIO12 0x00000019 585 #define AUX_EVCTL_SCEWEVSEL_WEV7_EV_AUXIO11 0x00000018 586 #define AUX_EVCTL_SCEWEVSEL_WEV7_EV_AUXIO10 0x00000017 587 #define AUX_EVCTL_SCEWEVSEL_WEV7_EV_AUXIO9 0x00000016 588 #define AUX_EVCTL_SCEWEVSEL_WEV7_EV_AUXIO8 0x00000015 589 #define AUX_EVCTL_SCEWEVSEL_WEV7_EV_AUXIO7 0x00000014 590 #define AUX_EVCTL_SCEWEVSEL_WEV7_EV_AUXIO6 0x00000013 591 #define AUX_EVCTL_SCEWEVSEL_WEV7_EV_AUXIO5 0x00000012 592 #define AUX_EVCTL_SCEWEVSEL_WEV7_EV_AUXIO4 0x00000011 593 #define AUX_EVCTL_SCEWEVSEL_WEV7_EV_AUXIO3 0x00000010 594 #define AUX_EVCTL_SCEWEVSEL_WEV7_EV_AUXIO2 0x0000000F 595 #define AUX_EVCTL_SCEWEVSEL_WEV7_EV_AUXIO1 0x0000000E 596 #define AUX_EVCTL_SCEWEVSEL_WEV7_EV_AUXIO0 0x0000000D 597 #define AUX_EVCTL_SCEWEVSEL_WEV7_EV_AON_PROG_WU 0x0000000C 598 #define AUX_EVCTL_SCEWEVSEL_WEV7_EV_AON_SW 0x0000000B 599 #define AUX_EVCTL_SCEWEVSEL_WEV7_EV_OBSMUX1 0x0000000A 600 #define AUX_EVCTL_SCEWEVSEL_WEV7_EV_OBSMUX0 0x00000009 601 #define AUX_EVCTL_SCEWEVSEL_WEV7_EV_ADC_FIFO_ALMOST_FULL 0x00000008 602 #define AUX_EVCTL_SCEWEVSEL_WEV7_EV_ADC_DONE 0x00000007 603 #define AUX_EVCTL_SCEWEVSEL_WEV7_EV_SMPH_AUTOTAKE_DONE 0x00000006 604 #define AUX_EVCTL_SCEWEVSEL_WEV7_EV_TIMER1_EV 0x00000005 605 #define AUX_EVCTL_SCEWEVSEL_WEV7_EV_TIMER0_EV 0x00000004 606 #define AUX_EVCTL_SCEWEVSEL_WEV7_EV_TDC_DONE 0x00000003 607 #define AUX_EVCTL_SCEWEVSEL_WEV7_EV_AUX_COMPB 0x00000002 608 #define AUX_EVCTL_SCEWEVSEL_WEV7_EV_AUX_COMPA 0x00000001 609 #define AUX_EVCTL_SCEWEVSEL_WEV7_EV_AON_RTC_CH2 0x00000000 610 611 //***************************************************************************** 612 // 613 // Register: AUX_EVCTL_O_EVTOAONFLAGS 614 // 615 //***************************************************************************** 616 // Field: [8] TIMER1_EV 617 // 618 // TIMER1_EV event flag. 619 #define AUX_EVCTL_EVTOAONFLAGS_TIMER1_EV 0x00000100 620 #define AUX_EVCTL_EVTOAONFLAGS_TIMER1_EV_BITN 8 621 #define AUX_EVCTL_EVTOAONFLAGS_TIMER1_EV_M 0x00000100 622 #define AUX_EVCTL_EVTOAONFLAGS_TIMER1_EV_S 8 623 624 // Field: [7] TIMER0_EV 625 // 626 // TIMER0_EV event flag. 627 #define AUX_EVCTL_EVTOAONFLAGS_TIMER0_EV 0x00000080 628 #define AUX_EVCTL_EVTOAONFLAGS_TIMER0_EV_BITN 7 629 #define AUX_EVCTL_EVTOAONFLAGS_TIMER0_EV_M 0x00000080 630 #define AUX_EVCTL_EVTOAONFLAGS_TIMER0_EV_S 7 631 632 // Field: [6] TDC_DONE 633 // 634 // TDC_DONE event flag. 635 #define AUX_EVCTL_EVTOAONFLAGS_TDC_DONE 0x00000040 636 #define AUX_EVCTL_EVTOAONFLAGS_TDC_DONE_BITN 6 637 #define AUX_EVCTL_EVTOAONFLAGS_TDC_DONE_M 0x00000040 638 #define AUX_EVCTL_EVTOAONFLAGS_TDC_DONE_S 6 639 640 // Field: [5] ADC_DONE 641 // 642 // ADC_DONE event flag. 643 #define AUX_EVCTL_EVTOAONFLAGS_ADC_DONE 0x00000020 644 #define AUX_EVCTL_EVTOAONFLAGS_ADC_DONE_BITN 5 645 #define AUX_EVCTL_EVTOAONFLAGS_ADC_DONE_M 0x00000020 646 #define AUX_EVCTL_EVTOAONFLAGS_ADC_DONE_S 5 647 648 // Field: [4] AUX_COMPB 649 // 650 // AUX_COMPB event flag. 651 #define AUX_EVCTL_EVTOAONFLAGS_AUX_COMPB 0x00000010 652 #define AUX_EVCTL_EVTOAONFLAGS_AUX_COMPB_BITN 4 653 #define AUX_EVCTL_EVTOAONFLAGS_AUX_COMPB_M 0x00000010 654 #define AUX_EVCTL_EVTOAONFLAGS_AUX_COMPB_S 4 655 656 // Field: [3] AUX_COMPA 657 // 658 // AUX_COMPA event flag. 659 #define AUX_EVCTL_EVTOAONFLAGS_AUX_COMPA 0x00000008 660 #define AUX_EVCTL_EVTOAONFLAGS_AUX_COMPA_BITN 3 661 #define AUX_EVCTL_EVTOAONFLAGS_AUX_COMPA_M 0x00000008 662 #define AUX_EVCTL_EVTOAONFLAGS_AUX_COMPA_S 3 663 664 // Field: [2] SWEV2 665 // 666 // SWEV2 event flag. 667 #define AUX_EVCTL_EVTOAONFLAGS_SWEV2 0x00000004 668 #define AUX_EVCTL_EVTOAONFLAGS_SWEV2_BITN 2 669 #define AUX_EVCTL_EVTOAONFLAGS_SWEV2_M 0x00000004 670 #define AUX_EVCTL_EVTOAONFLAGS_SWEV2_S 2 671 672 // Field: [1] SWEV1 673 // 674 // SWEV1 event flag. 675 #define AUX_EVCTL_EVTOAONFLAGS_SWEV1 0x00000002 676 #define AUX_EVCTL_EVTOAONFLAGS_SWEV1_BITN 1 677 #define AUX_EVCTL_EVTOAONFLAGS_SWEV1_M 0x00000002 678 #define AUX_EVCTL_EVTOAONFLAGS_SWEV1_S 1 679 680 // Field: [0] SWEV0 681 // 682 // SWEV0 event flag. 683 #define AUX_EVCTL_EVTOAONFLAGS_SWEV0 0x00000001 684 #define AUX_EVCTL_EVTOAONFLAGS_SWEV0_BITN 0 685 #define AUX_EVCTL_EVTOAONFLAGS_SWEV0_M 0x00000001 686 #define AUX_EVCTL_EVTOAONFLAGS_SWEV0_S 0 687 688 //***************************************************************************** 689 // 690 // Register: AUX_EVCTL_O_EVTOAONPOL 691 // 692 //***************************************************************************** 693 // Field: [8] TIMER1_EV 694 // 695 // Selects the event source level that sets EVTOAONFLAGS.TIMER1_EV. 696 // ENUMs: 697 // LOW Low level 698 // HIGH High level 699 #define AUX_EVCTL_EVTOAONPOL_TIMER1_EV 0x00000100 700 #define AUX_EVCTL_EVTOAONPOL_TIMER1_EV_BITN 8 701 #define AUX_EVCTL_EVTOAONPOL_TIMER1_EV_M 0x00000100 702 #define AUX_EVCTL_EVTOAONPOL_TIMER1_EV_S 8 703 #define AUX_EVCTL_EVTOAONPOL_TIMER1_EV_LOW 0x00000100 704 #define AUX_EVCTL_EVTOAONPOL_TIMER1_EV_HIGH 0x00000000 705 706 // Field: [7] TIMER0_EV 707 // 708 // Selects the event source level that sets EVTOAONFLAGS.TIMER0_EV. 709 // ENUMs: 710 // LOW Low level 711 // HIGH High level 712 #define AUX_EVCTL_EVTOAONPOL_TIMER0_EV 0x00000080 713 #define AUX_EVCTL_EVTOAONPOL_TIMER0_EV_BITN 7 714 #define AUX_EVCTL_EVTOAONPOL_TIMER0_EV_M 0x00000080 715 #define AUX_EVCTL_EVTOAONPOL_TIMER0_EV_S 7 716 #define AUX_EVCTL_EVTOAONPOL_TIMER0_EV_LOW 0x00000080 717 #define AUX_EVCTL_EVTOAONPOL_TIMER0_EV_HIGH 0x00000000 718 719 // Field: [6] TDC_DONE 720 // 721 // Selects the event source level that sets EVTOAONFLAGS.TDC_DONE. 722 // ENUMs: 723 // LOW Low level 724 // HIGH High level 725 #define AUX_EVCTL_EVTOAONPOL_TDC_DONE 0x00000040 726 #define AUX_EVCTL_EVTOAONPOL_TDC_DONE_BITN 6 727 #define AUX_EVCTL_EVTOAONPOL_TDC_DONE_M 0x00000040 728 #define AUX_EVCTL_EVTOAONPOL_TDC_DONE_S 6 729 #define AUX_EVCTL_EVTOAONPOL_TDC_DONE_LOW 0x00000040 730 #define AUX_EVCTL_EVTOAONPOL_TDC_DONE_HIGH 0x00000000 731 732 // Field: [5] ADC_DONE 733 // 734 // Selects the event source level that sets EVTOAONFLAGS.ADC_DONE. 735 // ENUMs: 736 // LOW Low level 737 // HIGH High level 738 #define AUX_EVCTL_EVTOAONPOL_ADC_DONE 0x00000020 739 #define AUX_EVCTL_EVTOAONPOL_ADC_DONE_BITN 5 740 #define AUX_EVCTL_EVTOAONPOL_ADC_DONE_M 0x00000020 741 #define AUX_EVCTL_EVTOAONPOL_ADC_DONE_S 5 742 #define AUX_EVCTL_EVTOAONPOL_ADC_DONE_LOW 0x00000020 743 #define AUX_EVCTL_EVTOAONPOL_ADC_DONE_HIGH 0x00000000 744 745 // Field: [4] AUX_COMPB 746 // 747 // Selects the event source level that sets EVTOAONFLAGS.AUX_COMPB. 748 // ENUMs: 749 // LOW Low level 750 // HIGH High level 751 #define AUX_EVCTL_EVTOAONPOL_AUX_COMPB 0x00000010 752 #define AUX_EVCTL_EVTOAONPOL_AUX_COMPB_BITN 4 753 #define AUX_EVCTL_EVTOAONPOL_AUX_COMPB_M 0x00000010 754 #define AUX_EVCTL_EVTOAONPOL_AUX_COMPB_S 4 755 #define AUX_EVCTL_EVTOAONPOL_AUX_COMPB_LOW 0x00000010 756 #define AUX_EVCTL_EVTOAONPOL_AUX_COMPB_HIGH 0x00000000 757 758 // Field: [3] AUX_COMPA 759 // 760 // Selects the event source level that sets EVTOAONFLAGS.AUX_COMPA. 761 // ENUMs: 762 // LOW Low level 763 // HIGH High level 764 #define AUX_EVCTL_EVTOAONPOL_AUX_COMPA 0x00000008 765 #define AUX_EVCTL_EVTOAONPOL_AUX_COMPA_BITN 3 766 #define AUX_EVCTL_EVTOAONPOL_AUX_COMPA_M 0x00000008 767 #define AUX_EVCTL_EVTOAONPOL_AUX_COMPA_S 3 768 #define AUX_EVCTL_EVTOAONPOL_AUX_COMPA_LOW 0x00000008 769 #define AUX_EVCTL_EVTOAONPOL_AUX_COMPA_HIGH 0x00000000 770 771 //***************************************************************************** 772 // 773 // Register: AUX_EVCTL_O_DMACTL 774 // 775 //***************************************************************************** 776 // Field: [2] REQ_MODE 777 // 778 // DMA Request mode 779 // ENUMs: 780 // SINGLE Single requests are generated on DMA channel 7 781 // when the condition configured in SEL is met 782 // BURST Burst requests are generated on DMA channel 7 when 783 // the condition configured in SEL is met 784 #define AUX_EVCTL_DMACTL_REQ_MODE 0x00000004 785 #define AUX_EVCTL_DMACTL_REQ_MODE_BITN 2 786 #define AUX_EVCTL_DMACTL_REQ_MODE_M 0x00000004 787 #define AUX_EVCTL_DMACTL_REQ_MODE_S 2 788 #define AUX_EVCTL_DMACTL_REQ_MODE_SINGLE 0x00000004 789 #define AUX_EVCTL_DMACTL_REQ_MODE_BURST 0x00000000 790 791 // Field: [1] EN 792 // 793 // 0: DMA interface is disabled 794 // 1: DMA interface is enabled 795 #define AUX_EVCTL_DMACTL_EN 0x00000002 796 #define AUX_EVCTL_DMACTL_EN_BITN 1 797 #define AUX_EVCTL_DMACTL_EN_M 0x00000002 798 #define AUX_EVCTL_DMACTL_EN_S 1 799 800 // Field: [0] SEL 801 // 802 // Selection of FIFO watermark level required to trigger an ADC_DMA transfer 803 // ENUMs: 804 // FIFO_ALMOST_FULL ADC_DMA event will be generated when the ADC FIFO 805 // is almost full (3/4 full) 806 // FIFO_NOT_EMPTY ADC_DMA event will be generated when there are 807 // valid samples in the ADC FIFO 808 #define AUX_EVCTL_DMACTL_SEL 0x00000001 809 #define AUX_EVCTL_DMACTL_SEL_BITN 0 810 #define AUX_EVCTL_DMACTL_SEL_M 0x00000001 811 #define AUX_EVCTL_DMACTL_SEL_S 0 812 #define AUX_EVCTL_DMACTL_SEL_FIFO_ALMOST_FULL 0x00000001 813 #define AUX_EVCTL_DMACTL_SEL_FIFO_NOT_EMPTY 0x00000000 814 815 //***************************************************************************** 816 // 817 // Register: AUX_EVCTL_O_SWEVSET 818 // 819 //***************************************************************************** 820 // Field: [2] SWEV2 821 // 822 // Writing 1 sets software event 2. 823 // 824 // For the MCU domain, the event flag can be read from EVTOAONFLAGS.SWEV2 and 825 // cleared using EVTOAONFLAGSCLR.SWEV2. 826 #define AUX_EVCTL_SWEVSET_SWEV2 0x00000004 827 #define AUX_EVCTL_SWEVSET_SWEV2_BITN 2 828 #define AUX_EVCTL_SWEVSET_SWEV2_M 0x00000004 829 #define AUX_EVCTL_SWEVSET_SWEV2_S 2 830 831 // Field: [1] SWEV1 832 // 833 // Writing 1 sets software event 1. 834 // 835 // For the MCU domain, the event flag can be read from EVTOAONFLAGS.SWEV1 and 836 // cleared using EVTOAONFLAGSCLR.SWEV1. 837 #define AUX_EVCTL_SWEVSET_SWEV1 0x00000002 838 #define AUX_EVCTL_SWEVSET_SWEV1_BITN 1 839 #define AUX_EVCTL_SWEVSET_SWEV1_M 0x00000002 840 #define AUX_EVCTL_SWEVSET_SWEV1_S 1 841 842 // Field: [0] SWEV0 843 // 844 // Writing 1 sets software event 0. 845 // 846 // For the MCU domain, the event flag can be read from EVTOAONFLAGS.SWEV0 and 847 // cleared using EVTOAONFLAGSCLR.SWEV0. 848 #define AUX_EVCTL_SWEVSET_SWEV0 0x00000001 849 #define AUX_EVCTL_SWEVSET_SWEV0_BITN 0 850 #define AUX_EVCTL_SWEVSET_SWEV0_M 0x00000001 851 #define AUX_EVCTL_SWEVSET_SWEV0_S 0 852 853 //***************************************************************************** 854 // 855 // Register: AUX_EVCTL_O_EVSTAT0 856 // 857 //***************************************************************************** 858 // Field: [15] AUXIO2 859 // 860 // Current value of AUXIO2 input data line 861 #define AUX_EVCTL_EVSTAT0_AUXIO2 0x00008000 862 #define AUX_EVCTL_EVSTAT0_AUXIO2_BITN 15 863 #define AUX_EVCTL_EVSTAT0_AUXIO2_M 0x00008000 864 #define AUX_EVCTL_EVSTAT0_AUXIO2_S 15 865 866 // Field: [14] AUXIO1 867 // 868 // Current value of AUXIO1 input data line 869 #define AUX_EVCTL_EVSTAT0_AUXIO1 0x00004000 870 #define AUX_EVCTL_EVSTAT0_AUXIO1_BITN 14 871 #define AUX_EVCTL_EVSTAT0_AUXIO1_M 0x00004000 872 #define AUX_EVCTL_EVSTAT0_AUXIO1_S 14 873 874 // Field: [13] AUXIO0 875 // 876 // Current value of AUXIO0 input data line 877 #define AUX_EVCTL_EVSTAT0_AUXIO0 0x00002000 878 #define AUX_EVCTL_EVSTAT0_AUXIO0_BITN 13 879 #define AUX_EVCTL_EVSTAT0_AUXIO0_M 0x00002000 880 #define AUX_EVCTL_EVSTAT0_AUXIO0_S 13 881 882 // Field: [12] AON_PROG_WU 883 // 884 // Current value of OBSMUX3 event line 885 #define AUX_EVCTL_EVSTAT0_AON_PROG_WU 0x00001000 886 #define AUX_EVCTL_EVSTAT0_AON_PROG_WU_BITN 12 887 #define AUX_EVCTL_EVSTAT0_AON_PROG_WU_M 0x00001000 888 #define AUX_EVCTL_EVSTAT0_AON_PROG_WU_S 12 889 890 // Field: [11] AON_SW 891 // 892 // Current value of OBSMUX2 event line 893 #define AUX_EVCTL_EVSTAT0_AON_SW 0x00000800 894 #define AUX_EVCTL_EVSTAT0_AON_SW_BITN 11 895 #define AUX_EVCTL_EVSTAT0_AON_SW_M 0x00000800 896 #define AUX_EVCTL_EVSTAT0_AON_SW_S 11 897 898 // Field: [10] OBSMUX1 899 // 900 // Current value of OBSMUX1 event line 901 #define AUX_EVCTL_EVSTAT0_OBSMUX1 0x00000400 902 #define AUX_EVCTL_EVSTAT0_OBSMUX1_BITN 10 903 #define AUX_EVCTL_EVSTAT0_OBSMUX1_M 0x00000400 904 #define AUX_EVCTL_EVSTAT0_OBSMUX1_S 10 905 906 // Field: [9] OBSMUX0 907 // 908 // Current value of OBSMUX0 event line 909 #define AUX_EVCTL_EVSTAT0_OBSMUX0 0x00000200 910 #define AUX_EVCTL_EVSTAT0_OBSMUX0_BITN 9 911 #define AUX_EVCTL_EVSTAT0_OBSMUX0_M 0x00000200 912 #define AUX_EVCTL_EVSTAT0_OBSMUX0_S 9 913 914 // Field: [8] ADC_FIFO_ALMOST_FULL 915 // 916 // Current value of ADC_FIFO_ALMOST_FULL event line 917 #define AUX_EVCTL_EVSTAT0_ADC_FIFO_ALMOST_FULL 0x00000100 918 #define AUX_EVCTL_EVSTAT0_ADC_FIFO_ALMOST_FULL_BITN 8 919 #define AUX_EVCTL_EVSTAT0_ADC_FIFO_ALMOST_FULL_M 0x00000100 920 #define AUX_EVCTL_EVSTAT0_ADC_FIFO_ALMOST_FULL_S 8 921 922 // Field: [7] ADC_DONE 923 // 924 // Current value of ADC_DONE event line 925 #define AUX_EVCTL_EVSTAT0_ADC_DONE 0x00000080 926 #define AUX_EVCTL_EVSTAT0_ADC_DONE_BITN 7 927 #define AUX_EVCTL_EVSTAT0_ADC_DONE_M 0x00000080 928 #define AUX_EVCTL_EVSTAT0_ADC_DONE_S 7 929 930 // Field: [6] SMPH_AUTOTAKE_DONE 931 // 932 // Current value of SMPH_AUTOTAKE_DONE event line 933 #define AUX_EVCTL_EVSTAT0_SMPH_AUTOTAKE_DONE 0x00000040 934 #define AUX_EVCTL_EVSTAT0_SMPH_AUTOTAKE_DONE_BITN 6 935 #define AUX_EVCTL_EVSTAT0_SMPH_AUTOTAKE_DONE_M 0x00000040 936 #define AUX_EVCTL_EVSTAT0_SMPH_AUTOTAKE_DONE_S 6 937 938 // Field: [5] TIMER1_EV 939 // 940 // Current value of TIMER1_EV event line 941 #define AUX_EVCTL_EVSTAT0_TIMER1_EV 0x00000020 942 #define AUX_EVCTL_EVSTAT0_TIMER1_EV_BITN 5 943 #define AUX_EVCTL_EVSTAT0_TIMER1_EV_M 0x00000020 944 #define AUX_EVCTL_EVSTAT0_TIMER1_EV_S 5 945 946 // Field: [4] TIMER0_EV 947 // 948 // Current value of TIMER0_EV event line 949 #define AUX_EVCTL_EVSTAT0_TIMER0_EV 0x00000010 950 #define AUX_EVCTL_EVSTAT0_TIMER0_EV_BITN 4 951 #define AUX_EVCTL_EVSTAT0_TIMER0_EV_M 0x00000010 952 #define AUX_EVCTL_EVSTAT0_TIMER0_EV_S 4 953 954 // Field: [3] TDC_DONE 955 // 956 // Current value of TDC_DONE event line 957 #define AUX_EVCTL_EVSTAT0_TDC_DONE 0x00000008 958 #define AUX_EVCTL_EVSTAT0_TDC_DONE_BITN 3 959 #define AUX_EVCTL_EVSTAT0_TDC_DONE_M 0x00000008 960 #define AUX_EVCTL_EVSTAT0_TDC_DONE_S 3 961 962 // Field: [2] AUX_COMPB 963 // 964 // Current value of AUX_COMPB event line 965 #define AUX_EVCTL_EVSTAT0_AUX_COMPB 0x00000004 966 #define AUX_EVCTL_EVSTAT0_AUX_COMPB_BITN 2 967 #define AUX_EVCTL_EVSTAT0_AUX_COMPB_M 0x00000004 968 #define AUX_EVCTL_EVSTAT0_AUX_COMPB_S 2 969 970 // Field: [1] AUX_COMPA 971 // 972 // Current value of AUX_COMPA event line 973 #define AUX_EVCTL_EVSTAT0_AUX_COMPA 0x00000002 974 #define AUX_EVCTL_EVSTAT0_AUX_COMPA_BITN 1 975 #define AUX_EVCTL_EVSTAT0_AUX_COMPA_M 0x00000002 976 #define AUX_EVCTL_EVSTAT0_AUX_COMPA_S 1 977 978 // Field: [0] AON_RTC_CH2 979 // 980 // Current value of AON_RTC_CH2 event line 981 #define AUX_EVCTL_EVSTAT0_AON_RTC_CH2 0x00000001 982 #define AUX_EVCTL_EVSTAT0_AON_RTC_CH2_BITN 0 983 #define AUX_EVCTL_EVSTAT0_AON_RTC_CH2_M 0x00000001 984 #define AUX_EVCTL_EVSTAT0_AON_RTC_CH2_S 0 985 986 //***************************************************************************** 987 // 988 // Register: AUX_EVCTL_O_EVSTAT1 989 // 990 //***************************************************************************** 991 // Field: [15] ADC_IRQ 992 // 993 // Current value of ADC_IRQ event line 994 #define AUX_EVCTL_EVSTAT1_ADC_IRQ 0x00008000 995 #define AUX_EVCTL_EVSTAT1_ADC_IRQ_BITN 15 996 #define AUX_EVCTL_EVSTAT1_ADC_IRQ_M 0x00008000 997 #define AUX_EVCTL_EVSTAT1_ADC_IRQ_S 15 998 999 // Field: [14] MCU_EV 1000 // 1001 // Current value of MCU_EV event line 1002 #define AUX_EVCTL_EVSTAT1_MCU_EV 0x00004000 1003 #define AUX_EVCTL_EVSTAT1_MCU_EV_BITN 14 1004 #define AUX_EVCTL_EVSTAT1_MCU_EV_M 0x00004000 1005 #define AUX_EVCTL_EVSTAT1_MCU_EV_S 14 1006 1007 // Field: [13] ACLK_REF 1008 // 1009 // Current value of ACLK_REF event line 1010 #define AUX_EVCTL_EVSTAT1_ACLK_REF 0x00002000 1011 #define AUX_EVCTL_EVSTAT1_ACLK_REF_BITN 13 1012 #define AUX_EVCTL_EVSTAT1_ACLK_REF_M 0x00002000 1013 #define AUX_EVCTL_EVSTAT1_ACLK_REF_S 13 1014 1015 // Field: [12] AUXIO15 1016 // 1017 // Current value of AUXIO15 input data line 1018 #define AUX_EVCTL_EVSTAT1_AUXIO15 0x00001000 1019 #define AUX_EVCTL_EVSTAT1_AUXIO15_BITN 12 1020 #define AUX_EVCTL_EVSTAT1_AUXIO15_M 0x00001000 1021 #define AUX_EVCTL_EVSTAT1_AUXIO15_S 12 1022 1023 // Field: [11] AUXIO14 1024 // 1025 // Current value of AUXIO14 input data line 1026 #define AUX_EVCTL_EVSTAT1_AUXIO14 0x00000800 1027 #define AUX_EVCTL_EVSTAT1_AUXIO14_BITN 11 1028 #define AUX_EVCTL_EVSTAT1_AUXIO14_M 0x00000800 1029 #define AUX_EVCTL_EVSTAT1_AUXIO14_S 11 1030 1031 // Field: [10] AUXIO13 1032 // 1033 // Current value of AUXIO13 input data line 1034 #define AUX_EVCTL_EVSTAT1_AUXIO13 0x00000400 1035 #define AUX_EVCTL_EVSTAT1_AUXIO13_BITN 10 1036 #define AUX_EVCTL_EVSTAT1_AUXIO13_M 0x00000400 1037 #define AUX_EVCTL_EVSTAT1_AUXIO13_S 10 1038 1039 // Field: [9] AUXIO12 1040 // 1041 // Current value of AUXIO12 input data line 1042 #define AUX_EVCTL_EVSTAT1_AUXIO12 0x00000200 1043 #define AUX_EVCTL_EVSTAT1_AUXIO12_BITN 9 1044 #define AUX_EVCTL_EVSTAT1_AUXIO12_M 0x00000200 1045 #define AUX_EVCTL_EVSTAT1_AUXIO12_S 9 1046 1047 // Field: [8] AUXIO11 1048 // 1049 // Current value of AUXIO11 input data line 1050 #define AUX_EVCTL_EVSTAT1_AUXIO11 0x00000100 1051 #define AUX_EVCTL_EVSTAT1_AUXIO11_BITN 8 1052 #define AUX_EVCTL_EVSTAT1_AUXIO11_M 0x00000100 1053 #define AUX_EVCTL_EVSTAT1_AUXIO11_S 8 1054 1055 // Field: [7] AUXIO10 1056 // 1057 // Current value of AUXIO10 input data line 1058 #define AUX_EVCTL_EVSTAT1_AUXIO10 0x00000080 1059 #define AUX_EVCTL_EVSTAT1_AUXIO10_BITN 7 1060 #define AUX_EVCTL_EVSTAT1_AUXIO10_M 0x00000080 1061 #define AUX_EVCTL_EVSTAT1_AUXIO10_S 7 1062 1063 // Field: [6] AUXIO9 1064 // 1065 // Current value of AUXIO9 input data line 1066 #define AUX_EVCTL_EVSTAT1_AUXIO9 0x00000040 1067 #define AUX_EVCTL_EVSTAT1_AUXIO9_BITN 6 1068 #define AUX_EVCTL_EVSTAT1_AUXIO9_M 0x00000040 1069 #define AUX_EVCTL_EVSTAT1_AUXIO9_S 6 1070 1071 // Field: [5] AUXIO8 1072 // 1073 // Current value of AUXIO8 input data line 1074 #define AUX_EVCTL_EVSTAT1_AUXIO8 0x00000020 1075 #define AUX_EVCTL_EVSTAT1_AUXIO8_BITN 5 1076 #define AUX_EVCTL_EVSTAT1_AUXIO8_M 0x00000020 1077 #define AUX_EVCTL_EVSTAT1_AUXIO8_S 5 1078 1079 // Field: [4] AUXIO7 1080 // 1081 // Current value of AUXIO7 input data line 1082 #define AUX_EVCTL_EVSTAT1_AUXIO7 0x00000010 1083 #define AUX_EVCTL_EVSTAT1_AUXIO7_BITN 4 1084 #define AUX_EVCTL_EVSTAT1_AUXIO7_M 0x00000010 1085 #define AUX_EVCTL_EVSTAT1_AUXIO7_S 4 1086 1087 // Field: [3] AUXIO6 1088 // 1089 // Current value of AUXIO6 input data line 1090 #define AUX_EVCTL_EVSTAT1_AUXIO6 0x00000008 1091 #define AUX_EVCTL_EVSTAT1_AUXIO6_BITN 3 1092 #define AUX_EVCTL_EVSTAT1_AUXIO6_M 0x00000008 1093 #define AUX_EVCTL_EVSTAT1_AUXIO6_S 3 1094 1095 // Field: [2] AUXIO5 1096 // 1097 // Current value of AUXIO5 input data line 1098 #define AUX_EVCTL_EVSTAT1_AUXIO5 0x00000004 1099 #define AUX_EVCTL_EVSTAT1_AUXIO5_BITN 2 1100 #define AUX_EVCTL_EVSTAT1_AUXIO5_M 0x00000004 1101 #define AUX_EVCTL_EVSTAT1_AUXIO5_S 2 1102 1103 // Field: [1] AUXIO4 1104 // 1105 // Current value of AUXIO4 input data line 1106 #define AUX_EVCTL_EVSTAT1_AUXIO4 0x00000002 1107 #define AUX_EVCTL_EVSTAT1_AUXIO4_BITN 1 1108 #define AUX_EVCTL_EVSTAT1_AUXIO4_M 0x00000002 1109 #define AUX_EVCTL_EVSTAT1_AUXIO4_S 1 1110 1111 // Field: [0] AUXIO3 1112 // 1113 // Current value of AUXIO3 input data line 1114 #define AUX_EVCTL_EVSTAT1_AUXIO3 0x00000001 1115 #define AUX_EVCTL_EVSTAT1_AUXIO3_BITN 0 1116 #define AUX_EVCTL_EVSTAT1_AUXIO3_M 0x00000001 1117 #define AUX_EVCTL_EVSTAT1_AUXIO3_S 0 1118 1119 //***************************************************************************** 1120 // 1121 // Register: AUX_EVCTL_O_EVTOMCUPOL 1122 // 1123 //***************************************************************************** 1124 // Field: [10] ADC_IRQ 1125 // 1126 // Selects the event source level that sets EVTOMCUFLAGS.ADC_IRQ. 1127 // ENUMs: 1128 // LOW Low level 1129 // HIGH High level 1130 #define AUX_EVCTL_EVTOMCUPOL_ADC_IRQ 0x00000400 1131 #define AUX_EVCTL_EVTOMCUPOL_ADC_IRQ_BITN 10 1132 #define AUX_EVCTL_EVTOMCUPOL_ADC_IRQ_M 0x00000400 1133 #define AUX_EVCTL_EVTOMCUPOL_ADC_IRQ_S 10 1134 #define AUX_EVCTL_EVTOMCUPOL_ADC_IRQ_LOW 0x00000400 1135 #define AUX_EVCTL_EVTOMCUPOL_ADC_IRQ_HIGH 0x00000000 1136 1137 // Field: [9] OBSMUX0 1138 // 1139 // Selects the event source level that sets EVTOMCUFLAGS.OBSMUX0. 1140 // ENUMs: 1141 // LOW Low level 1142 // HIGH High level 1143 #define AUX_EVCTL_EVTOMCUPOL_OBSMUX0 0x00000200 1144 #define AUX_EVCTL_EVTOMCUPOL_OBSMUX0_BITN 9 1145 #define AUX_EVCTL_EVTOMCUPOL_OBSMUX0_M 0x00000200 1146 #define AUX_EVCTL_EVTOMCUPOL_OBSMUX0_S 9 1147 #define AUX_EVCTL_EVTOMCUPOL_OBSMUX0_LOW 0x00000200 1148 #define AUX_EVCTL_EVTOMCUPOL_OBSMUX0_HIGH 0x00000000 1149 1150 // Field: [8] ADC_FIFO_ALMOST_FULL 1151 // 1152 // Selects the event source level that sets EVTOMCUFLAGS.ADC_FIFO_ALMOST_FULL. 1153 // ENUMs: 1154 // LOW Low level 1155 // HIGH High level 1156 #define AUX_EVCTL_EVTOMCUPOL_ADC_FIFO_ALMOST_FULL 0x00000100 1157 #define AUX_EVCTL_EVTOMCUPOL_ADC_FIFO_ALMOST_FULL_BITN 8 1158 #define AUX_EVCTL_EVTOMCUPOL_ADC_FIFO_ALMOST_FULL_M 0x00000100 1159 #define AUX_EVCTL_EVTOMCUPOL_ADC_FIFO_ALMOST_FULL_S 8 1160 #define AUX_EVCTL_EVTOMCUPOL_ADC_FIFO_ALMOST_FULL_LOW 0x00000100 1161 #define AUX_EVCTL_EVTOMCUPOL_ADC_FIFO_ALMOST_FULL_HIGH 0x00000000 1162 1163 // Field: [7] ADC_DONE 1164 // 1165 // Selects the event source level that sets EVTOMCUFLAGS.ADC_DONE. 1166 // ENUMs: 1167 // LOW Low level 1168 // HIGH High level 1169 #define AUX_EVCTL_EVTOMCUPOL_ADC_DONE 0x00000080 1170 #define AUX_EVCTL_EVTOMCUPOL_ADC_DONE_BITN 7 1171 #define AUX_EVCTL_EVTOMCUPOL_ADC_DONE_M 0x00000080 1172 #define AUX_EVCTL_EVTOMCUPOL_ADC_DONE_S 7 1173 #define AUX_EVCTL_EVTOMCUPOL_ADC_DONE_LOW 0x00000080 1174 #define AUX_EVCTL_EVTOMCUPOL_ADC_DONE_HIGH 0x00000000 1175 1176 // Field: [6] SMPH_AUTOTAKE_DONE 1177 // 1178 // Selects the event source level that sets EVTOMCUFLAGS.SMPH_AUTOTAKE_DONE. 1179 // ENUMs: 1180 // LOW Low level 1181 // HIGH High level 1182 #define AUX_EVCTL_EVTOMCUPOL_SMPH_AUTOTAKE_DONE 0x00000040 1183 #define AUX_EVCTL_EVTOMCUPOL_SMPH_AUTOTAKE_DONE_BITN 6 1184 #define AUX_EVCTL_EVTOMCUPOL_SMPH_AUTOTAKE_DONE_M 0x00000040 1185 #define AUX_EVCTL_EVTOMCUPOL_SMPH_AUTOTAKE_DONE_S 6 1186 #define AUX_EVCTL_EVTOMCUPOL_SMPH_AUTOTAKE_DONE_LOW 0x00000040 1187 #define AUX_EVCTL_EVTOMCUPOL_SMPH_AUTOTAKE_DONE_HIGH 0x00000000 1188 1189 // Field: [5] TIMER1_EV 1190 // 1191 // Selects the event source level that sets EVTOMCUFLAGS.TIMER1_EV. 1192 // ENUMs: 1193 // LOW Low level 1194 // HIGH High level 1195 #define AUX_EVCTL_EVTOMCUPOL_TIMER1_EV 0x00000020 1196 #define AUX_EVCTL_EVTOMCUPOL_TIMER1_EV_BITN 5 1197 #define AUX_EVCTL_EVTOMCUPOL_TIMER1_EV_M 0x00000020 1198 #define AUX_EVCTL_EVTOMCUPOL_TIMER1_EV_S 5 1199 #define AUX_EVCTL_EVTOMCUPOL_TIMER1_EV_LOW 0x00000020 1200 #define AUX_EVCTL_EVTOMCUPOL_TIMER1_EV_HIGH 0x00000000 1201 1202 // Field: [4] TIMER0_EV 1203 // 1204 // Selects the event source level that sets EVTOMCUFLAGS.TIMER0_EV. 1205 // ENUMs: 1206 // LOW Low level 1207 // HIGH High level 1208 #define AUX_EVCTL_EVTOMCUPOL_TIMER0_EV 0x00000010 1209 #define AUX_EVCTL_EVTOMCUPOL_TIMER0_EV_BITN 4 1210 #define AUX_EVCTL_EVTOMCUPOL_TIMER0_EV_M 0x00000010 1211 #define AUX_EVCTL_EVTOMCUPOL_TIMER0_EV_S 4 1212 #define AUX_EVCTL_EVTOMCUPOL_TIMER0_EV_LOW 0x00000010 1213 #define AUX_EVCTL_EVTOMCUPOL_TIMER0_EV_HIGH 0x00000000 1214 1215 // Field: [3] TDC_DONE 1216 // 1217 // Selects the event source level that sets EVTOMCUFLAGS.TDC_DONE. 1218 // ENUMs: 1219 // LOW Low level 1220 // HIGH High level 1221 #define AUX_EVCTL_EVTOMCUPOL_TDC_DONE 0x00000008 1222 #define AUX_EVCTL_EVTOMCUPOL_TDC_DONE_BITN 3 1223 #define AUX_EVCTL_EVTOMCUPOL_TDC_DONE_M 0x00000008 1224 #define AUX_EVCTL_EVTOMCUPOL_TDC_DONE_S 3 1225 #define AUX_EVCTL_EVTOMCUPOL_TDC_DONE_LOW 0x00000008 1226 #define AUX_EVCTL_EVTOMCUPOL_TDC_DONE_HIGH 0x00000000 1227 1228 // Field: [2] AUX_COMPB 1229 // 1230 // Selects the event source level that sets EVTOMCUFLAGS.AUX_COMPB. 1231 // ENUMs: 1232 // LOW Low level 1233 // HIGH High level 1234 #define AUX_EVCTL_EVTOMCUPOL_AUX_COMPB 0x00000004 1235 #define AUX_EVCTL_EVTOMCUPOL_AUX_COMPB_BITN 2 1236 #define AUX_EVCTL_EVTOMCUPOL_AUX_COMPB_M 0x00000004 1237 #define AUX_EVCTL_EVTOMCUPOL_AUX_COMPB_S 2 1238 #define AUX_EVCTL_EVTOMCUPOL_AUX_COMPB_LOW 0x00000004 1239 #define AUX_EVCTL_EVTOMCUPOL_AUX_COMPB_HIGH 0x00000000 1240 1241 // Field: [1] AUX_COMPA 1242 // 1243 // Selects the event source level that sets EVTOMCUFLAGS.AUX_COMPA. 1244 // ENUMs: 1245 // LOW Low level 1246 // HIGH High level 1247 #define AUX_EVCTL_EVTOMCUPOL_AUX_COMPA 0x00000002 1248 #define AUX_EVCTL_EVTOMCUPOL_AUX_COMPA_BITN 1 1249 #define AUX_EVCTL_EVTOMCUPOL_AUX_COMPA_M 0x00000002 1250 #define AUX_EVCTL_EVTOMCUPOL_AUX_COMPA_S 1 1251 #define AUX_EVCTL_EVTOMCUPOL_AUX_COMPA_LOW 0x00000002 1252 #define AUX_EVCTL_EVTOMCUPOL_AUX_COMPA_HIGH 0x00000000 1253 1254 // Field: [0] AON_WU_EV 1255 // 1256 // Selects the event source level that sets EVTOMCUFLAGS.AON_WU_EV 1257 // ENUMs: 1258 // LOW Low level 1259 // HIGH High level 1260 #define AUX_EVCTL_EVTOMCUPOL_AON_WU_EV 0x00000001 1261 #define AUX_EVCTL_EVTOMCUPOL_AON_WU_EV_BITN 0 1262 #define AUX_EVCTL_EVTOMCUPOL_AON_WU_EV_M 0x00000001 1263 #define AUX_EVCTL_EVTOMCUPOL_AON_WU_EV_S 0 1264 #define AUX_EVCTL_EVTOMCUPOL_AON_WU_EV_LOW 0x00000001 1265 #define AUX_EVCTL_EVTOMCUPOL_AON_WU_EV_HIGH 0x00000000 1266 1267 //***************************************************************************** 1268 // 1269 // Register: AUX_EVCTL_O_EVTOMCUFLAGS 1270 // 1271 //***************************************************************************** 1272 // Field: [10] ADC_IRQ 1273 // 1274 // ADC_IRQ event flag. 1275 #define AUX_EVCTL_EVTOMCUFLAGS_ADC_IRQ 0x00000400 1276 #define AUX_EVCTL_EVTOMCUFLAGS_ADC_IRQ_BITN 10 1277 #define AUX_EVCTL_EVTOMCUFLAGS_ADC_IRQ_M 0x00000400 1278 #define AUX_EVCTL_EVTOMCUFLAGS_ADC_IRQ_S 10 1279 1280 // Field: [9] OBSMUX0 1281 // 1282 // OBSMUX0 event flag. 1283 #define AUX_EVCTL_EVTOMCUFLAGS_OBSMUX0 0x00000200 1284 #define AUX_EVCTL_EVTOMCUFLAGS_OBSMUX0_BITN 9 1285 #define AUX_EVCTL_EVTOMCUFLAGS_OBSMUX0_M 0x00000200 1286 #define AUX_EVCTL_EVTOMCUFLAGS_OBSMUX0_S 9 1287 1288 // Field: [8] ADC_FIFO_ALMOST_FULL 1289 // 1290 // ADC_FIFO_ALMOST_FULL event flag. 1291 #define AUX_EVCTL_EVTOMCUFLAGS_ADC_FIFO_ALMOST_FULL 0x00000100 1292 #define AUX_EVCTL_EVTOMCUFLAGS_ADC_FIFO_ALMOST_FULL_BITN 8 1293 #define AUX_EVCTL_EVTOMCUFLAGS_ADC_FIFO_ALMOST_FULL_M 0x00000100 1294 #define AUX_EVCTL_EVTOMCUFLAGS_ADC_FIFO_ALMOST_FULL_S 8 1295 1296 // Field: [7] ADC_DONE 1297 // 1298 // ADC_DONE event flag. 1299 #define AUX_EVCTL_EVTOMCUFLAGS_ADC_DONE 0x00000080 1300 #define AUX_EVCTL_EVTOMCUFLAGS_ADC_DONE_BITN 7 1301 #define AUX_EVCTL_EVTOMCUFLAGS_ADC_DONE_M 0x00000080 1302 #define AUX_EVCTL_EVTOMCUFLAGS_ADC_DONE_S 7 1303 1304 // Field: [6] SMPH_AUTOTAKE_DONE 1305 // 1306 // SMPH_AUTOTAKE_DONE event flag. 1307 #define AUX_EVCTL_EVTOMCUFLAGS_SMPH_AUTOTAKE_DONE 0x00000040 1308 #define AUX_EVCTL_EVTOMCUFLAGS_SMPH_AUTOTAKE_DONE_BITN 6 1309 #define AUX_EVCTL_EVTOMCUFLAGS_SMPH_AUTOTAKE_DONE_M 0x00000040 1310 #define AUX_EVCTL_EVTOMCUFLAGS_SMPH_AUTOTAKE_DONE_S 6 1311 1312 // Field: [5] TIMER1_EV 1313 // 1314 // TIMER1_EV event flag. 1315 #define AUX_EVCTL_EVTOMCUFLAGS_TIMER1_EV 0x00000020 1316 #define AUX_EVCTL_EVTOMCUFLAGS_TIMER1_EV_BITN 5 1317 #define AUX_EVCTL_EVTOMCUFLAGS_TIMER1_EV_M 0x00000020 1318 #define AUX_EVCTL_EVTOMCUFLAGS_TIMER1_EV_S 5 1319 1320 // Field: [4] TIMER0_EV 1321 // 1322 // TIMER0_EV event flag. 1323 #define AUX_EVCTL_EVTOMCUFLAGS_TIMER0_EV 0x00000010 1324 #define AUX_EVCTL_EVTOMCUFLAGS_TIMER0_EV_BITN 4 1325 #define AUX_EVCTL_EVTOMCUFLAGS_TIMER0_EV_M 0x00000010 1326 #define AUX_EVCTL_EVTOMCUFLAGS_TIMER0_EV_S 4 1327 1328 // Field: [3] TDC_DONE 1329 // 1330 // TDC_DONE event flag. 1331 #define AUX_EVCTL_EVTOMCUFLAGS_TDC_DONE 0x00000008 1332 #define AUX_EVCTL_EVTOMCUFLAGS_TDC_DONE_BITN 3 1333 #define AUX_EVCTL_EVTOMCUFLAGS_TDC_DONE_M 0x00000008 1334 #define AUX_EVCTL_EVTOMCUFLAGS_TDC_DONE_S 3 1335 1336 // Field: [2] AUX_COMPB 1337 // 1338 // AUX_COMPB event flag. 1339 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_COMPB 0x00000004 1340 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_COMPB_BITN 2 1341 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_COMPB_M 0x00000004 1342 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_COMPB_S 2 1343 1344 // Field: [1] AUX_COMPA 1345 // 1346 // AUX_COMPA event flag. 1347 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_COMPA 0x00000002 1348 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_COMPA_BITN 1 1349 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_COMPA_M 0x00000002 1350 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_COMPA_S 1 1351 1352 // Field: [0] AON_WU_EV 1353 // 1354 // AON_WU_EV event flag. 1355 // 1356 // This is an OR of the AON_RTC_CH2, AON_PROG_WU and AON_SW events. These event 1357 // sources must be cleared before clearing AON_WU_EV. 1358 #define AUX_EVCTL_EVTOMCUFLAGS_AON_WU_EV 0x00000001 1359 #define AUX_EVCTL_EVTOMCUFLAGS_AON_WU_EV_BITN 0 1360 #define AUX_EVCTL_EVTOMCUFLAGS_AON_WU_EV_M 0x00000001 1361 #define AUX_EVCTL_EVTOMCUFLAGS_AON_WU_EV_S 0 1362 1363 //***************************************************************************** 1364 // 1365 // Register: AUX_EVCTL_O_COMBEVTOMCUMASK 1366 // 1367 //***************************************************************************** 1368 // Field: [10] ADC_IRQ 1369 // 1370 // Includes (1) or excludes (0) EVTOMCUFLAGS.ADC_IRQ contribution to the 1371 // AUX_COMB event. 1372 #define AUX_EVCTL_COMBEVTOMCUMASK_ADC_IRQ 0x00000400 1373 #define AUX_EVCTL_COMBEVTOMCUMASK_ADC_IRQ_BITN 10 1374 #define AUX_EVCTL_COMBEVTOMCUMASK_ADC_IRQ_M 0x00000400 1375 #define AUX_EVCTL_COMBEVTOMCUMASK_ADC_IRQ_S 10 1376 1377 // Field: [9] OBSMUX0 1378 // 1379 // Includes (1) or excludes (0) EVTOMCUFLAGS.OBSMUX0 contribution to the 1380 // AUX_COMB event. 1381 #define AUX_EVCTL_COMBEVTOMCUMASK_OBSMUX0 0x00000200 1382 #define AUX_EVCTL_COMBEVTOMCUMASK_OBSMUX0_BITN 9 1383 #define AUX_EVCTL_COMBEVTOMCUMASK_OBSMUX0_M 0x00000200 1384 #define AUX_EVCTL_COMBEVTOMCUMASK_OBSMUX0_S 9 1385 1386 // Field: [8] ADC_FIFO_ALMOST_FULL 1387 // 1388 // Includes (1) or excludes (0) EVTOMCUFLAGS.ADC_FIFO_ALMOST_FULL contribution 1389 // to the AUX_COMB event. 1390 #define AUX_EVCTL_COMBEVTOMCUMASK_ADC_FIFO_ALMOST_FULL 0x00000100 1391 #define AUX_EVCTL_COMBEVTOMCUMASK_ADC_FIFO_ALMOST_FULL_BITN 8 1392 #define AUX_EVCTL_COMBEVTOMCUMASK_ADC_FIFO_ALMOST_FULL_M 0x00000100 1393 #define AUX_EVCTL_COMBEVTOMCUMASK_ADC_FIFO_ALMOST_FULL_S 8 1394 1395 // Field: [7] ADC_DONE 1396 // 1397 // Includes (1) or excludes (0) EVTOMCUFLAGS.ADC_DONE contribution to the 1398 // AUX_COMB event. 1399 #define AUX_EVCTL_COMBEVTOMCUMASK_ADC_DONE 0x00000080 1400 #define AUX_EVCTL_COMBEVTOMCUMASK_ADC_DONE_BITN 7 1401 #define AUX_EVCTL_COMBEVTOMCUMASK_ADC_DONE_M 0x00000080 1402 #define AUX_EVCTL_COMBEVTOMCUMASK_ADC_DONE_S 7 1403 1404 // Field: [6] SMPH_AUTOTAKE_DONE 1405 // 1406 // Includes (1) or excludes (0) EVTOMCUFLAGS.SMPH_AUTOTAKE_DONE contribution to 1407 // the AUX_COMB event. 1408 #define AUX_EVCTL_COMBEVTOMCUMASK_SMPH_AUTOTAKE_DONE 0x00000040 1409 #define AUX_EVCTL_COMBEVTOMCUMASK_SMPH_AUTOTAKE_DONE_BITN 6 1410 #define AUX_EVCTL_COMBEVTOMCUMASK_SMPH_AUTOTAKE_DONE_M 0x00000040 1411 #define AUX_EVCTL_COMBEVTOMCUMASK_SMPH_AUTOTAKE_DONE_S 6 1412 1413 // Field: [5] TIMER1_EV 1414 // 1415 // Includes (1) or excludes (0) EVTOMCUFLAGS.TIMER1_EV contribution to the 1416 // AUX_COMB event. 1417 #define AUX_EVCTL_COMBEVTOMCUMASK_TIMER1_EV 0x00000020 1418 #define AUX_EVCTL_COMBEVTOMCUMASK_TIMER1_EV_BITN 5 1419 #define AUX_EVCTL_COMBEVTOMCUMASK_TIMER1_EV_M 0x00000020 1420 #define AUX_EVCTL_COMBEVTOMCUMASK_TIMER1_EV_S 5 1421 1422 // Field: [4] TIMER0_EV 1423 // 1424 // Includes (1) or excludes (0) EVTOMCUFLAGS.TIMER0_EV contribution to the 1425 // AUX_COMB event. 1426 #define AUX_EVCTL_COMBEVTOMCUMASK_TIMER0_EV 0x00000010 1427 #define AUX_EVCTL_COMBEVTOMCUMASK_TIMER0_EV_BITN 4 1428 #define AUX_EVCTL_COMBEVTOMCUMASK_TIMER0_EV_M 0x00000010 1429 #define AUX_EVCTL_COMBEVTOMCUMASK_TIMER0_EV_S 4 1430 1431 // Field: [3] TDC_DONE 1432 // 1433 // Includes (1) or excludes (0) EVTOMCUFLAGS.TDC_DONE contribution to the 1434 // AUX_COMB event. 1435 #define AUX_EVCTL_COMBEVTOMCUMASK_TDC_DONE 0x00000008 1436 #define AUX_EVCTL_COMBEVTOMCUMASK_TDC_DONE_BITN 3 1437 #define AUX_EVCTL_COMBEVTOMCUMASK_TDC_DONE_M 0x00000008 1438 #define AUX_EVCTL_COMBEVTOMCUMASK_TDC_DONE_S 3 1439 1440 // Field: [2] AUX_COMPB 1441 // 1442 // Includes (1) or excludes (0) EVTOMCUFLAGS.AUX_COMPB contribution to the 1443 // AUX_COMB event. 1444 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_COMPB 0x00000004 1445 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_COMPB_BITN 2 1446 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_COMPB_M 0x00000004 1447 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_COMPB_S 2 1448 1449 // Field: [1] AUX_COMPA 1450 // 1451 // Includes (1) or excludes (0) EVTOMCUFLAGS.AUX_COMPA contribution to the 1452 // AUX_COMB event. 1453 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_COMPA 0x00000002 1454 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_COMPA_BITN 1 1455 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_COMPA_M 0x00000002 1456 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_COMPA_S 1 1457 1458 // Field: [0] AON_WU_EV 1459 // 1460 // Includes (1) or excludes (0) EVTOMCUFLAGS.AON_WU_EV contribution to the 1461 // AUX_COMB event. 1462 #define AUX_EVCTL_COMBEVTOMCUMASK_AON_WU_EV 0x00000001 1463 #define AUX_EVCTL_COMBEVTOMCUMASK_AON_WU_EV_BITN 0 1464 #define AUX_EVCTL_COMBEVTOMCUMASK_AON_WU_EV_M 0x00000001 1465 #define AUX_EVCTL_COMBEVTOMCUMASK_AON_WU_EV_S 0 1466 1467 //***************************************************************************** 1468 // 1469 // Register: AUX_EVCTL_O_VECFLAGS 1470 // 1471 //***************************************************************************** 1472 // Field: [3] VEC3 1473 // 1474 // The vector flag is set if the edge selected VECCFG1.VEC3_POL occurs on the 1475 // event selected in VECCFG1.VEC3_EV. 1476 // 1477 // The flag is cleared by writing a 0 to this bit, or (preferably) a 1 to 1478 // VECFLAGSCLR.VEC3. 1479 #define AUX_EVCTL_VECFLAGS_VEC3 0x00000008 1480 #define AUX_EVCTL_VECFLAGS_VEC3_BITN 3 1481 #define AUX_EVCTL_VECFLAGS_VEC3_M 0x00000008 1482 #define AUX_EVCTL_VECFLAGS_VEC3_S 3 1483 1484 // Field: [2] VEC2 1485 // 1486 // The vector flag is set if the edge selected VECCFG1.VEC2_POL occurs on the 1487 // event selected in VECCFG1.VEC2_EV. 1488 // 1489 // The flag is cleared by writing a 0 to this bit, or (preferably) a 1 to 1490 // VECFLAGSCLR.VEC2. 1491 #define AUX_EVCTL_VECFLAGS_VEC2 0x00000004 1492 #define AUX_EVCTL_VECFLAGS_VEC2_BITN 2 1493 #define AUX_EVCTL_VECFLAGS_VEC2_M 0x00000004 1494 #define AUX_EVCTL_VECFLAGS_VEC2_S 2 1495 1496 // Field: [1] VEC1 1497 // 1498 // The vector flag is set if the edge selected VECCFG0.VEC1_POL occurs on the 1499 // event selected in VECCFG0.VEC1_EV. 1500 // 1501 // The flag is cleared by writing a 0 to this bit, or (preferably) a 1 to 1502 // VECFLAGSCLR.VEC1. 1503 #define AUX_EVCTL_VECFLAGS_VEC1 0x00000002 1504 #define AUX_EVCTL_VECFLAGS_VEC1_BITN 1 1505 #define AUX_EVCTL_VECFLAGS_VEC1_M 0x00000002 1506 #define AUX_EVCTL_VECFLAGS_VEC1_S 1 1507 1508 // Field: [0] VEC0 1509 // 1510 // The vector flag is set if the edge selected VECCFG0.VEC0_POL occurs on the 1511 // event selected in VECCFG0.VEC0_EV. 1512 // 1513 // The flag is cleared by writing a 0 to this bit, or (preferably) a 1 to 1514 // VECFLAGSCLR.VEC0. 1515 #define AUX_EVCTL_VECFLAGS_VEC0 0x00000001 1516 #define AUX_EVCTL_VECFLAGS_VEC0_BITN 0 1517 #define AUX_EVCTL_VECFLAGS_VEC0_M 0x00000001 1518 #define AUX_EVCTL_VECFLAGS_VEC0_S 0 1519 1520 //***************************************************************************** 1521 // 1522 // Register: AUX_EVCTL_O_EVTOMCUFLAGSCLR 1523 // 1524 //***************************************************************************** 1525 // Field: [10] ADC_IRQ 1526 // 1527 // Writing 1 clears EVTOMCUFLAGS.ADC_IRQ. 1528 // 1529 // Read value is 0. 1530 #define AUX_EVCTL_EVTOMCUFLAGSCLR_ADC_IRQ 0x00000400 1531 #define AUX_EVCTL_EVTOMCUFLAGSCLR_ADC_IRQ_BITN 10 1532 #define AUX_EVCTL_EVTOMCUFLAGSCLR_ADC_IRQ_M 0x00000400 1533 #define AUX_EVCTL_EVTOMCUFLAGSCLR_ADC_IRQ_S 10 1534 1535 // Field: [9] OBSMUX0 1536 // 1537 // Writing 1 clears EVTOMCUFLAGS.OBSMUX0. 1538 // 1539 // Read value is 0. 1540 #define AUX_EVCTL_EVTOMCUFLAGSCLR_OBSMUX0 0x00000200 1541 #define AUX_EVCTL_EVTOMCUFLAGSCLR_OBSMUX0_BITN 9 1542 #define AUX_EVCTL_EVTOMCUFLAGSCLR_OBSMUX0_M 0x00000200 1543 #define AUX_EVCTL_EVTOMCUFLAGSCLR_OBSMUX0_S 9 1544 1545 // Field: [8] ADC_FIFO_ALMOST_FULL 1546 // 1547 // Writing 1 clears EVTOMCUFLAGS.ADC_FIFO_ALMOST_FULL. 1548 // 1549 // Read value is 0. 1550 #define AUX_EVCTL_EVTOMCUFLAGSCLR_ADC_FIFO_ALMOST_FULL 0x00000100 1551 #define AUX_EVCTL_EVTOMCUFLAGSCLR_ADC_FIFO_ALMOST_FULL_BITN 8 1552 #define AUX_EVCTL_EVTOMCUFLAGSCLR_ADC_FIFO_ALMOST_FULL_M 0x00000100 1553 #define AUX_EVCTL_EVTOMCUFLAGSCLR_ADC_FIFO_ALMOST_FULL_S 8 1554 1555 // Field: [7] ADC_DONE 1556 // 1557 // Writing 1 clears EVTOMCUFLAGS.ADC_DONE. 1558 // 1559 // Read value is 0. 1560 #define AUX_EVCTL_EVTOMCUFLAGSCLR_ADC_DONE 0x00000080 1561 #define AUX_EVCTL_EVTOMCUFLAGSCLR_ADC_DONE_BITN 7 1562 #define AUX_EVCTL_EVTOMCUFLAGSCLR_ADC_DONE_M 0x00000080 1563 #define AUX_EVCTL_EVTOMCUFLAGSCLR_ADC_DONE_S 7 1564 1565 // Field: [6] SMPH_AUTOTAKE_DONE 1566 // 1567 // Writing 1 clears [EVTOMCUFLAGS.SMPH_AUTOTAKE_DONE. 1568 // 1569 // Read value is 0. 1570 #define AUX_EVCTL_EVTOMCUFLAGSCLR_SMPH_AUTOTAKE_DONE 0x00000040 1571 #define AUX_EVCTL_EVTOMCUFLAGSCLR_SMPH_AUTOTAKE_DONE_BITN 6 1572 #define AUX_EVCTL_EVTOMCUFLAGSCLR_SMPH_AUTOTAKE_DONE_M 0x00000040 1573 #define AUX_EVCTL_EVTOMCUFLAGSCLR_SMPH_AUTOTAKE_DONE_S 6 1574 1575 // Field: [5] TIMER1_EV 1576 // 1577 // Writing 1 clears EVTOMCUFLAGS.TIMER1_EV. 1578 // 1579 // Read value is 0. 1580 #define AUX_EVCTL_EVTOMCUFLAGSCLR_TIMER1_EV 0x00000020 1581 #define AUX_EVCTL_EVTOMCUFLAGSCLR_TIMER1_EV_BITN 5 1582 #define AUX_EVCTL_EVTOMCUFLAGSCLR_TIMER1_EV_M 0x00000020 1583 #define AUX_EVCTL_EVTOMCUFLAGSCLR_TIMER1_EV_S 5 1584 1585 // Field: [4] TIMER0_EV 1586 // 1587 // Writing 1 clears EVTOMCUFLAGS.TIMER0_EV. 1588 // 1589 // Read value is 0. 1590 #define AUX_EVCTL_EVTOMCUFLAGSCLR_TIMER0_EV 0x00000010 1591 #define AUX_EVCTL_EVTOMCUFLAGSCLR_TIMER0_EV_BITN 4 1592 #define AUX_EVCTL_EVTOMCUFLAGSCLR_TIMER0_EV_M 0x00000010 1593 #define AUX_EVCTL_EVTOMCUFLAGSCLR_TIMER0_EV_S 4 1594 1595 // Field: [3] TDC_DONE 1596 // 1597 // Writing 1 clears EVTOMCUFLAGS.TDC_DONE. 1598 // 1599 // Read value is 0. 1600 #define AUX_EVCTL_EVTOMCUFLAGSCLR_TDC_DONE 0x00000008 1601 #define AUX_EVCTL_EVTOMCUFLAGSCLR_TDC_DONE_BITN 3 1602 #define AUX_EVCTL_EVTOMCUFLAGSCLR_TDC_DONE_M 0x00000008 1603 #define AUX_EVCTL_EVTOMCUFLAGSCLR_TDC_DONE_S 3 1604 1605 // Field: [2] AUX_COMPB 1606 // 1607 // Writing 1 clears EVTOMCUFLAGS.AUX_COMPB. 1608 // 1609 // Read value is 0. 1610 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_COMPB 0x00000004 1611 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_COMPB_BITN 2 1612 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_COMPB_M 0x00000004 1613 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_COMPB_S 2 1614 1615 // Field: [1] AUX_COMPA 1616 // 1617 // Writing 1 clears EVTOMCUFLAGS.AUX_COMPA. 1618 // 1619 // Read value is 0. 1620 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_COMPA 0x00000002 1621 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_COMPA_BITN 1 1622 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_COMPA_M 0x00000002 1623 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_COMPA_S 1 1624 1625 // Field: [0] AON_WU_EV 1626 // 1627 // Writing 1 clears EVTOMCUFLAGS.AON_WU_EV. 1628 // 1629 // Read value is 0. 1630 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AON_WU_EV 0x00000001 1631 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AON_WU_EV_BITN 0 1632 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AON_WU_EV_M 0x00000001 1633 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AON_WU_EV_S 0 1634 1635 //***************************************************************************** 1636 // 1637 // Register: AUX_EVCTL_O_EVTOAONFLAGSCLR 1638 // 1639 //***************************************************************************** 1640 // Field: [8] TIMER1_EV 1641 // 1642 // Writing 1 clears EVTOAONFLAGS.TIMER1_EV. 1643 // 1644 // Read value is 0. 1645 #define AUX_EVCTL_EVTOAONFLAGSCLR_TIMER1_EV 0x00000100 1646 #define AUX_EVCTL_EVTOAONFLAGSCLR_TIMER1_EV_BITN 8 1647 #define AUX_EVCTL_EVTOAONFLAGSCLR_TIMER1_EV_M 0x00000100 1648 #define AUX_EVCTL_EVTOAONFLAGSCLR_TIMER1_EV_S 8 1649 1650 // Field: [7] TIMER0_EV 1651 // 1652 // Writing 1 clears EVTOAONFLAGS.TIMER0_EV. 1653 // 1654 // Read value is 0. 1655 #define AUX_EVCTL_EVTOAONFLAGSCLR_TIMER0_EV 0x00000080 1656 #define AUX_EVCTL_EVTOAONFLAGSCLR_TIMER0_EV_BITN 7 1657 #define AUX_EVCTL_EVTOAONFLAGSCLR_TIMER0_EV_M 0x00000080 1658 #define AUX_EVCTL_EVTOAONFLAGSCLR_TIMER0_EV_S 7 1659 1660 // Field: [6] TDC_DONE 1661 // 1662 // Writing 1 clears EVTOAONFLAGS.TDC_DONE. 1663 // 1664 // Read value is 0. 1665 #define AUX_EVCTL_EVTOAONFLAGSCLR_TDC_DONE 0x00000040 1666 #define AUX_EVCTL_EVTOAONFLAGSCLR_TDC_DONE_BITN 6 1667 #define AUX_EVCTL_EVTOAONFLAGSCLR_TDC_DONE_M 0x00000040 1668 #define AUX_EVCTL_EVTOAONFLAGSCLR_TDC_DONE_S 6 1669 1670 // Field: [5] ADC_DONE 1671 // 1672 // Writing 1 clears EVTOAONFLAGS.ADC_DONE. 1673 // 1674 // Read value is 0. 1675 #define AUX_EVCTL_EVTOAONFLAGSCLR_ADC_DONE 0x00000020 1676 #define AUX_EVCTL_EVTOAONFLAGSCLR_ADC_DONE_BITN 5 1677 #define AUX_EVCTL_EVTOAONFLAGSCLR_ADC_DONE_M 0x00000020 1678 #define AUX_EVCTL_EVTOAONFLAGSCLR_ADC_DONE_S 5 1679 1680 // Field: [4] AUX_COMPB 1681 // 1682 // Writing 1 clears EVTOAONFLAGS.AUX_COMPB. 1683 // 1684 // Read value is 0. 1685 #define AUX_EVCTL_EVTOAONFLAGSCLR_AUX_COMPB 0x00000010 1686 #define AUX_EVCTL_EVTOAONFLAGSCLR_AUX_COMPB_BITN 4 1687 #define AUX_EVCTL_EVTOAONFLAGSCLR_AUX_COMPB_M 0x00000010 1688 #define AUX_EVCTL_EVTOAONFLAGSCLR_AUX_COMPB_S 4 1689 1690 // Field: [3] AUX_COMPA 1691 // 1692 // Writing 1 clears EVTOAONFLAGS.AUX_COMPA. 1693 // 1694 // Read value is 0. 1695 #define AUX_EVCTL_EVTOAONFLAGSCLR_AUX_COMPA 0x00000008 1696 #define AUX_EVCTL_EVTOAONFLAGSCLR_AUX_COMPA_BITN 3 1697 #define AUX_EVCTL_EVTOAONFLAGSCLR_AUX_COMPA_M 0x00000008 1698 #define AUX_EVCTL_EVTOAONFLAGSCLR_AUX_COMPA_S 3 1699 1700 // Field: [2] SWEV2 1701 // 1702 // Writing 1 clears EVTOAONFLAGS.SWEV2. 1703 // 1704 // Read value is 0. 1705 #define AUX_EVCTL_EVTOAONFLAGSCLR_SWEV2 0x00000004 1706 #define AUX_EVCTL_EVTOAONFLAGSCLR_SWEV2_BITN 2 1707 #define AUX_EVCTL_EVTOAONFLAGSCLR_SWEV2_M 0x00000004 1708 #define AUX_EVCTL_EVTOAONFLAGSCLR_SWEV2_S 2 1709 1710 // Field: [1] SWEV1 1711 // 1712 // Writing 1 clears EVTOAONFLAGS.SWEV1. 1713 // 1714 // Read value is 0. 1715 #define AUX_EVCTL_EVTOAONFLAGSCLR_SWEV1 0x00000002 1716 #define AUX_EVCTL_EVTOAONFLAGSCLR_SWEV1_BITN 1 1717 #define AUX_EVCTL_EVTOAONFLAGSCLR_SWEV1_M 0x00000002 1718 #define AUX_EVCTL_EVTOAONFLAGSCLR_SWEV1_S 1 1719 1720 // Field: [0] SWEV0 1721 // 1722 // Writing 1 clears EVTOAONFLAGS.SWEV0. 1723 // 1724 // Read value is 0. 1725 #define AUX_EVCTL_EVTOAONFLAGSCLR_SWEV0 0x00000001 1726 #define AUX_EVCTL_EVTOAONFLAGSCLR_SWEV0_BITN 0 1727 #define AUX_EVCTL_EVTOAONFLAGSCLR_SWEV0_M 0x00000001 1728 #define AUX_EVCTL_EVTOAONFLAGSCLR_SWEV0_S 0 1729 1730 //***************************************************************************** 1731 // 1732 // Register: AUX_EVCTL_O_VECFLAGSCLR 1733 // 1734 //***************************************************************************** 1735 // Field: [3] VEC3 1736 // 1737 // Writing 1 clears VECFLAGS.VEC3. 1738 // 1739 // Read value is 0. 1740 #define AUX_EVCTL_VECFLAGSCLR_VEC3 0x00000008 1741 #define AUX_EVCTL_VECFLAGSCLR_VEC3_BITN 3 1742 #define AUX_EVCTL_VECFLAGSCLR_VEC3_M 0x00000008 1743 #define AUX_EVCTL_VECFLAGSCLR_VEC3_S 3 1744 1745 // Field: [2] VEC2 1746 // 1747 // Writing 1 clears VECFLAGS.VEC2. 1748 // 1749 // Read value is 0. 1750 #define AUX_EVCTL_VECFLAGSCLR_VEC2 0x00000004 1751 #define AUX_EVCTL_VECFLAGSCLR_VEC2_BITN 2 1752 #define AUX_EVCTL_VECFLAGSCLR_VEC2_M 0x00000004 1753 #define AUX_EVCTL_VECFLAGSCLR_VEC2_S 2 1754 1755 // Field: [1] VEC1 1756 // 1757 // Writing 1 clears VECFLAGS.VEC1. 1758 // 1759 // Read value is 0. 1760 #define AUX_EVCTL_VECFLAGSCLR_VEC1 0x00000002 1761 #define AUX_EVCTL_VECFLAGSCLR_VEC1_BITN 1 1762 #define AUX_EVCTL_VECFLAGSCLR_VEC1_M 0x00000002 1763 #define AUX_EVCTL_VECFLAGSCLR_VEC1_S 1 1764 1765 // Field: [0] VEC0 1766 // 1767 // Writing 1 clears VECFLAGS.VEC0. 1768 // 1769 // Read value is 0. 1770 #define AUX_EVCTL_VECFLAGSCLR_VEC0 0x00000001 1771 #define AUX_EVCTL_VECFLAGSCLR_VEC0_BITN 0 1772 #define AUX_EVCTL_VECFLAGSCLR_VEC0_M 0x00000001 1773 #define AUX_EVCTL_VECFLAGSCLR_VEC0_S 0 1774 1775 1776 #endif // __AUX_EVCTL__ 1777