1 /******************************************************************************
2 *  Filename:       hw_rfc_rat_h
3 *  Revised:        2015-11-12 13:07:02 +0100 (Thu, 12 Nov 2015)
4 *  Revision:       45056
5 *
6 * Copyright (c) 2015, Texas Instruments Incorporated
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35 ******************************************************************************/
36 
37 #ifndef __HW_RFC_RAT_H__
38 #define __HW_RFC_RAT_H__
39 
40 //*****************************************************************************
41 //
42 // This section defines the register offsets of
43 // RFC_RAT component
44 //
45 //*****************************************************************************
46 // Radio Timer Counter Value
47 #define RFC_RAT_O_RATCNT                                            0x00000004
48 
49 // Timer Channel 0 Capture/Compare Register
50 #define RFC_RAT_O_RATCH0VAL                                         0x00000080
51 
52 // Timer Channel 1 Capture/Compare Register
53 #define RFC_RAT_O_RATCH1VAL                                         0x00000084
54 
55 // Timer Channel 2 Capture/Compare Register
56 #define RFC_RAT_O_RATCH2VAL                                         0x00000088
57 
58 // Timer Channel 3 Capture/Compare Register
59 #define RFC_RAT_O_RATCH3VAL                                         0x0000008C
60 
61 // Timer Channel 4 Capture/Compare Register
62 #define RFC_RAT_O_RATCH4VAL                                         0x00000090
63 
64 // Timer Channel 5 Capture/Compare Register
65 #define RFC_RAT_O_RATCH5VAL                                         0x00000094
66 
67 // Timer Channel 6 Capture/Compare Register
68 #define RFC_RAT_O_RATCH6VAL                                         0x00000098
69 
70 // Timer Channel 7 Capture/Compare Register
71 #define RFC_RAT_O_RATCH7VAL                                         0x0000009C
72 
73 //*****************************************************************************
74 //
75 // Register: RFC_RAT_O_RATCNT
76 //
77 //*****************************************************************************
78 // Field:  [31:0] CNT
79 //
80 // Counter value. This is not writable while radio timer counter is enabled.
81 #define RFC_RAT_RATCNT_CNT_W                                                32
82 #define RFC_RAT_RATCNT_CNT_M                                        0xFFFFFFFF
83 #define RFC_RAT_RATCNT_CNT_S                                                 0
84 
85 //*****************************************************************************
86 //
87 // Register: RFC_RAT_O_RATCH0VAL
88 //
89 //*****************************************************************************
90 // Field:  [31:0] VAL
91 //
92 // Capture/compare value. The system CPU can safely read this register, but it
93 // is recommended to use the CPE API commands to configure it for compare mode.
94 #define RFC_RAT_RATCH0VAL_VAL_W                                             32
95 #define RFC_RAT_RATCH0VAL_VAL_M                                     0xFFFFFFFF
96 #define RFC_RAT_RATCH0VAL_VAL_S                                              0
97 
98 //*****************************************************************************
99 //
100 // Register: RFC_RAT_O_RATCH1VAL
101 //
102 //*****************************************************************************
103 // Field:  [31:0] VAL
104 //
105 // Capture/compare value. The system CPU can safely read this register, but it
106 // is recommended to use the CPE API commands to configure it for compare mode.
107 #define RFC_RAT_RATCH1VAL_VAL_W                                             32
108 #define RFC_RAT_RATCH1VAL_VAL_M                                     0xFFFFFFFF
109 #define RFC_RAT_RATCH1VAL_VAL_S                                              0
110 
111 //*****************************************************************************
112 //
113 // Register: RFC_RAT_O_RATCH2VAL
114 //
115 //*****************************************************************************
116 // Field:  [31:0] VAL
117 //
118 // Capture/compare value. The system CPU can safely read this register, but it
119 // is recommended to use the CPE API commands to configure it for compare mode.
120 #define RFC_RAT_RATCH2VAL_VAL_W                                             32
121 #define RFC_RAT_RATCH2VAL_VAL_M                                     0xFFFFFFFF
122 #define RFC_RAT_RATCH2VAL_VAL_S                                              0
123 
124 //*****************************************************************************
125 //
126 // Register: RFC_RAT_O_RATCH3VAL
127 //
128 //*****************************************************************************
129 // Field:  [31:0] VAL
130 //
131 // Capture/compare value. The system CPU can safely read this register, but it
132 // is recommended to use the CPE API commands to configure it for compare mode.
133 #define RFC_RAT_RATCH3VAL_VAL_W                                             32
134 #define RFC_RAT_RATCH3VAL_VAL_M                                     0xFFFFFFFF
135 #define RFC_RAT_RATCH3VAL_VAL_S                                              0
136 
137 //*****************************************************************************
138 //
139 // Register: RFC_RAT_O_RATCH4VAL
140 //
141 //*****************************************************************************
142 // Field:  [31:0] VAL
143 //
144 // Capture/compare value. The system CPU can safely read this register, but it
145 // is recommended to use the CPE API commands to configure it for compare mode.
146 #define RFC_RAT_RATCH4VAL_VAL_W                                             32
147 #define RFC_RAT_RATCH4VAL_VAL_M                                     0xFFFFFFFF
148 #define RFC_RAT_RATCH4VAL_VAL_S                                              0
149 
150 //*****************************************************************************
151 //
152 // Register: RFC_RAT_O_RATCH5VAL
153 //
154 //*****************************************************************************
155 // Field:  [31:0] VAL
156 //
157 // Capture/compare value. The system CPU can safely read this register, but it
158 // is recommended to use the CPE API commands to configure it for compare mode.
159 #define RFC_RAT_RATCH5VAL_VAL_W                                             32
160 #define RFC_RAT_RATCH5VAL_VAL_M                                     0xFFFFFFFF
161 #define RFC_RAT_RATCH5VAL_VAL_S                                              0
162 
163 //*****************************************************************************
164 //
165 // Register: RFC_RAT_O_RATCH6VAL
166 //
167 //*****************************************************************************
168 // Field:  [31:0] VAL
169 //
170 // Capture/compare value. The system CPU can safely read this register, but it
171 // is recommended to use the CPE API commands to configure it for compare mode.
172 #define RFC_RAT_RATCH6VAL_VAL_W                                             32
173 #define RFC_RAT_RATCH6VAL_VAL_M                                     0xFFFFFFFF
174 #define RFC_RAT_RATCH6VAL_VAL_S                                              0
175 
176 //*****************************************************************************
177 //
178 // Register: RFC_RAT_O_RATCH7VAL
179 //
180 //*****************************************************************************
181 // Field:  [31:0] VAL
182 //
183 // Capture/compare value. The system CPU can safely read this register, but it
184 // is recommended to use the CPE API commands to configure it for compare mode.
185 #define RFC_RAT_RATCH7VAL_VAL_W                                             32
186 #define RFC_RAT_RATCH7VAL_VAL_M                                     0xFFFFFFFF
187 #define RFC_RAT_RATCH7VAL_VAL_S                                              0
188 
189 
190 #endif // __RFC_RAT__
191