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31 
32 #ifndef NRF_KMU_H__
33 #define NRF_KMU_H__
34 
35 #include <nrfx.h>
36 
37 #ifdef __cplusplus
38 extern "C" {
39 #endif
40 
41 /**
42  * @defgroup nrf_kmu_hal KMU HAL
43  * @{
44  * @ingroup nrf_kmu
45  * @brief   Hardware access layer for managing the Key Management Unit (KMU) peripheral.
46  */
47 
48 /** @brief KMU tasks. */
49 typedef enum
50 {
51     NRF_KMU_TASK_PUSH_KEYSLOT = offsetof(NRF_KMU_Type, TASKS_PUSH_KEYSLOT), ///< Push a key slot over secure APB.
52 } nrf_kmu_task_t;
53 
54 /** @brief KMU events. */
55 typedef enum
56 {
57     NRF_KMU_EVENT_KEYSLOT_PUSHED  = offsetof(NRF_KMU_Type, EVENTS_KEYSLOT_PUSHED),  ///< Key successfully pushed over secure APB.
58     NRF_KMU_EVENT_KEYSLOT_REVOKED = offsetof(NRF_KMU_Type, EVENTS_KEYSLOT_REVOKED), ///< Key has been revoked and cannot be tasked for selection.
59     NRF_KMU_EVENT_KEYSLOT_ERROR   = offsetof(NRF_KMU_Type, EVENTS_KEYSLOT_ERROR)    ///< No key slot selected or no destination address defined or error during push mechanism.
60 } nrf_kmu_event_t;
61 
62 /** @brief KMU interrupts. */
63 typedef enum
64 {
65     NRF_KMU_INT_PUSHED_MASK  = KMU_INTEN_KEYSLOT_PUSHED_Msk,  ///< Interrupt on KEYSLOT_PUSHED event.
66     NRF_KMU_INT_REVOKED_MASK = KMU_INTEN_KEYSLOT_REVOKED_Msk, ///< Interrupt on KEYSLOT_REVOKED event.
67     NRF_KMU_INT_ERROR_MASK   = KMU_INTEN_KEYSLOT_ERROR_Msk    ///< Interrupt on KEYSLOT_ERROR event.
68 } nrf_kmu_int_mask_t;
69 
70 /** @brief KMU operation status. */
71 typedef enum
72 {
73     NRF_KMU_STATUS_BLOCKED_MASK  = KMU_STATUS_BLOCKED_Msk,  ///< Access violation detected and blocked.
74     NRF_KMU_STATUS_SELECTED_MASK = KMU_STATUS_SELECTED_Msk, ///< Key slot ID successfully selected by KMU
75 } nrf_kmu_status_t;
76 
77 
78 /**
79  * @brief Function for activating a specific KMU task.
80  *
81  * @param[in] p_reg Pointer to the structure of registers of the peripheral.
82  * @param[in] task  Task to be activated.
83  */
84 NRF_STATIC_INLINE void nrf_kmu_task_trigger(NRF_KMU_Type * p_reg, nrf_kmu_task_t task);
85 
86 /**
87  * @brief Function for getting the address of a specific KMU task register.
88  *
89  * @param[in] p_reg Pointer to the structure of registers of the peripheral.
90  * @param[in] task  Requested task.
91  *
92  * @return Address of the specified task register.
93  */
94 NRF_STATIC_INLINE uint32_t nrf_kmu_task_address_get(NRF_KMU_Type const * p_reg,
95                                                     nrf_kmu_task_t       task);
96 
97 /**
98  * @brief Function for clearing a specific KMU event.
99  *
100  * @param[in] p_reg Pointer to the structure of registers of the peripheral.
101  * @param[in] event Event to clear.
102  */
103 NRF_STATIC_INLINE void nrf_kmu_event_clear(NRF_KMU_Type * p_reg, nrf_kmu_event_t event);
104 
105 /**
106  * @brief Function for retrieving the state of the KMU event.
107  *
108  * @param[in] p_reg Pointer to the structure of registers of the peripheral.
109  * @param[in] event Event to be checked.
110  *
111  * @retval true  The event has been generated.
112  * @retval false The event has not been generated.
113  */
114 NRF_STATIC_INLINE bool nrf_kmu_event_check(NRF_KMU_Type const * p_reg, nrf_kmu_event_t event);
115 
116 /**
117  * @brief Function for getting the address of a specific KMU event register.
118  *
119  * @param[in] p_reg Pointer to the structure of registers of the peripheral.
120  * @param[in] event Requested event.
121  *
122  * @return Address of the specified event register.
123  */
124 NRF_STATIC_INLINE uint32_t nrf_kmu_event_address_get(NRF_KMU_Type const * p_reg,
125                                                      nrf_kmu_event_t      event);
126 
127 /**
128  * @brief Function for enabling specified interrupts.
129  *
130  * @param[in] p_reg Pointer to the structure of registers of the peripheral.
131  * @param[in] mask  Interrupts to be enabled.
132  */
133 NRF_STATIC_INLINE void nrf_kmu_int_enable(NRF_KMU_Type * p_reg, uint32_t mask);
134 
135 /**
136  * @brief Function for disabling specified interrupts.
137  *
138  * @param[in] p_reg Pointer to the structure of registers of the peripheral.
139  * @param[in] mask  Interrupts to be disabled.
140  */
141 NRF_STATIC_INLINE void nrf_kmu_int_disable(NRF_KMU_Type * p_reg, uint32_t mask);
142 
143 /**
144  * @brief Function for checking if the specified interrupts are enabled.
145  *
146  * @param[in] p_reg Pointer to the structure of registers of the peripheral.
147  * @param[in] mask  Mask of interrupts to be checked.
148  *
149  * @return Mask of enabled interrupts.
150  */
151 NRF_STATIC_INLINE uint32_t nrf_kmu_int_enable_check(NRF_KMU_Type const * p_reg, uint32_t mask);
152 
153 /**
154  * @brief Function for retrieving the state of interrupts.
155  *
156  * Function returns bitmask. Please use @ref nrf_kmu_int_mask_t to check interrupts status.
157  *
158  * @param[in] p_reg Pointer to the structure of registers of the peripheral.
159  *
160  * @return Bitmask with pending interrupts bits.
161  */
162 NRF_STATIC_INLINE uint32_t nrf_kmu_intpend_get(NRF_KMU_Type const * p_reg);
163 
164 /**
165  * @brief Function for getting status bits of the KMU operation.
166  *
167  * Function returns bitmask. Please use @ref nrf_kmu_status_t to check operations status.
168  *
169  * @param[in] p_reg Pointer to the structure of registers of the peripheral.
170  *
171  * @return Bitmask with operation status bits.
172  */
173 NRF_STATIC_INLINE uint32_t nrf_kmu_status_get(NRF_KMU_Type const * p_reg);
174 
175 /**
176  * @brief Function for selecting the key slot ID.
177  *
178  * @param[in] p_reg      Pointer to the structure of registers of the peripheral.
179  * @param[in] keyslot_id Key slot ID to be read over AHB or pushed over
180  *                       secure APB when TASKS_PUSH_KEYSLOT is started.
181  */
182 NRF_STATIC_INLINE void nrf_kmu_keyslot_set(NRF_KMU_Type * p_reg, uint8_t keyslot_id);
183 
184 /**
185  * @brief Function for getting the key slot ID.
186  *
187  * @param[in] p_reg Pointer to the structure of registers of the peripheral.
188  *
189  * @return Key slot ID.
190  */
191 NRF_STATIC_INLINE uint8_t nrf_kmu_keyslot_get(NRF_KMU_Type const * p_reg);
192 
193 
194 #ifndef NRF_DECLARE_ONLY
195 
nrf_kmu_task_trigger(NRF_KMU_Type * p_reg,nrf_kmu_task_t task)196 NRF_STATIC_INLINE void nrf_kmu_task_trigger(NRF_KMU_Type * p_reg, nrf_kmu_task_t task)
197 {
198     *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
199 }
200 
nrf_kmu_task_address_get(NRF_KMU_Type const * p_reg,nrf_kmu_task_t task)201 NRF_STATIC_INLINE uint32_t nrf_kmu_task_address_get(NRF_KMU_Type const * p_reg,
202                                                     nrf_kmu_task_t       task)
203 {
204     return ((uint32_t)p_reg + (uint32_t)task);
205 }
206 
nrf_kmu_event_clear(NRF_KMU_Type * p_reg,nrf_kmu_event_t event)207 NRF_STATIC_INLINE void nrf_kmu_event_clear(NRF_KMU_Type * p_reg, nrf_kmu_event_t event)
208 {
209     *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
210     volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event));
211     (void)dummy;
212 }
213 
nrf_kmu_event_check(NRF_KMU_Type const * p_reg,nrf_kmu_event_t event)214 NRF_STATIC_INLINE bool nrf_kmu_event_check(NRF_KMU_Type const * p_reg, nrf_kmu_event_t event)
215 {
216     return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
217 }
218 
nrf_kmu_event_address_get(NRF_KMU_Type const * p_reg,nrf_kmu_event_t event)219 NRF_STATIC_INLINE uint32_t nrf_kmu_event_address_get(NRF_KMU_Type const * p_reg,
220                                                      nrf_kmu_event_t      event)
221 {
222     return ((uint32_t)p_reg + (uint32_t)event);
223 }
224 
nrf_kmu_int_enable(NRF_KMU_Type * p_reg,uint32_t mask)225 NRF_STATIC_INLINE void nrf_kmu_int_enable(NRF_KMU_Type * p_reg, uint32_t mask)
226 {
227     p_reg->INTENSET = mask;
228 }
229 
nrf_kmu_int_disable(NRF_KMU_Type * p_reg,uint32_t mask)230 NRF_STATIC_INLINE void nrf_kmu_int_disable(NRF_KMU_Type * p_reg, uint32_t mask)
231 {
232     p_reg->INTENCLR = mask;
233 }
234 
nrf_kmu_int_enable_check(NRF_KMU_Type const * p_reg,uint32_t mask)235 NRF_STATIC_INLINE uint32_t nrf_kmu_int_enable_check(NRF_KMU_Type const * p_reg, uint32_t mask)
236 {
237     return p_reg->INTENSET & mask;
238 }
239 
nrf_kmu_intpend_get(NRF_KMU_Type const * p_reg)240 NRF_STATIC_INLINE uint32_t nrf_kmu_intpend_get(NRF_KMU_Type const * p_reg)
241 {
242     return p_reg->INTPEND;
243 }
244 
nrf_kmu_status_get(NRF_KMU_Type const * p_reg)245 NRF_STATIC_INLINE uint32_t nrf_kmu_status_get(NRF_KMU_Type const * p_reg)
246 {
247     return p_reg->STATUS;
248 }
249 
nrf_kmu_keyslot_set(NRF_KMU_Type * p_reg,uint8_t keyslot_id)250 NRF_STATIC_INLINE void nrf_kmu_keyslot_set(NRF_KMU_Type * p_reg, uint8_t keyslot_id)
251 {
252     p_reg->SELECTKEYSLOT = (uint32_t) keyslot_id;
253 }
254 
nrf_kmu_keyslot_get(NRF_KMU_Type const * p_reg)255 NRF_STATIC_INLINE uint8_t nrf_kmu_keyslot_get(NRF_KMU_Type const * p_reg)
256 {
257     return (uint8_t) p_reg->SELECTKEYSLOT;
258 }
259 
260 #endif // NRF_DECLARE_ONLY
261 
262 /** @} */
263 
264 #ifdef __cplusplus
265 }
266 #endif
267 
268 #endif // NRF_KMU_H__
269