1/*
2
3Copyright (c) 2009-2020 ARM Limited. All rights reserved.
4
5    SPDX-License-Identifier: Apache-2.0
6
7Licensed under the Apache License, Version 2.0 (the License); you may
8not use this file except in compliance with the License.
9You may obtain a copy of the License at
10
11    www.apache.org/licenses/LICENSE-2.0
12
13Unless required by applicable law or agreed to in writing, software
14distributed under the License is distributed on an AS IS BASIS, WITHOUT
15WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
16See the License for the specific language governing permissions and
17limitations under the License.
18
19NOTICE: This file has been modified by Nordic Semiconductor ASA.
20
21*/
22
23    .syntax unified
24    .arch armv6-m
25
26#ifdef __STARTUP_CONFIG
27#include "startup_config.h"
28#ifndef __STARTUP_CONFIG_STACK_ALIGNEMENT
29#define __STARTUP_CONFIG_STACK_ALIGNEMENT 3
30#endif
31#endif
32
33    .section .stack
34#if defined(__STARTUP_CONFIG)
35    .align __STARTUP_CONFIG_STACK_ALIGNEMENT
36    .equ    Stack_Size, __STARTUP_CONFIG_STACK_SIZE
37#elif defined(__STACK_SIZE)
38    .align 3
39    .equ    Stack_Size, __STACK_SIZE
40#else
41    .align 3
42    .equ    Stack_Size, 2048
43#endif
44    .globl __StackTop
45    .globl __StackLimit
46__StackLimit:
47    .space Stack_Size
48    .size __StackLimit, . - __StackLimit
49__StackTop:
50    .size __StackTop, . - __StackTop
51
52    .section .heap
53    .align 3
54#if defined(__STARTUP_CONFIG)
55    .equ Heap_Size, __STARTUP_CONFIG_HEAP_SIZE
56#elif defined(__HEAP_SIZE)
57    .equ Heap_Size, __HEAP_SIZE
58#else
59    .equ Heap_Size, 2048
60#endif
61    .globl __HeapBase
62    .globl __HeapLimit
63__HeapBase:
64    .if Heap_Size
65    .space Heap_Size
66    .endif
67    .size __HeapBase, . - __HeapBase
68__HeapLimit:
69    .size __HeapLimit, . - __HeapLimit
70
71    .section .isr_vector, "ax"
72    .align 2
73    .globl __isr_vector
74__isr_vector:
75    .long   __StackTop                  /* Top of Stack */
76    .long   Reset_Handler
77    .long   NMI_Handler
78    .long   HardFault_Handler
79    .long   0                           /*Reserved */
80    .long   0                           /*Reserved */
81    .long   0                           /*Reserved */
82    .long   0                           /*Reserved */
83    .long   0                           /*Reserved */
84    .long   0                           /*Reserved */
85    .long   0                           /*Reserved */
86    .long   SVC_Handler
87    .long   0                           /*Reserved */
88    .long   0                           /*Reserved */
89    .long   PendSV_Handler
90    .long   SysTick_Handler
91
92  /* External Interrupts */
93    .long   POWER_CLOCK_IRQHandler
94    .long   RADIO_IRQHandler
95    .long   UART0_IRQHandler
96    .long   SPI0_TWI0_IRQHandler
97    .long   SPI1_TWI1_IRQHandler
98    .long   0                           /*Reserved */
99    .long   GPIOTE_IRQHandler
100    .long   ADC_IRQHandler
101    .long   TIMER0_IRQHandler
102    .long   TIMER1_IRQHandler
103    .long   TIMER2_IRQHandler
104    .long   RTC0_IRQHandler
105    .long   TEMP_IRQHandler
106    .long   RNG_IRQHandler
107    .long   ECB_IRQHandler
108    .long   CCM_AAR_IRQHandler
109    .long   WDT_IRQHandler
110    .long   RTC1_IRQHandler
111    .long   QDEC_IRQHandler
112    .long   LPCOMP_IRQHandler
113    .long   SWI0_IRQHandler
114    .long   SWI1_IRQHandler
115    .long   SWI2_IRQHandler
116    .long   SWI3_IRQHandler
117    .long   SWI4_IRQHandler
118    .long   SWI5_IRQHandler
119    .long   0                           /*Reserved */
120    .long   0                           /*Reserved */
121    .long   0                           /*Reserved */
122    .long   0                           /*Reserved */
123    .long   0                           /*Reserved */
124    .long   0                           /*Reserved */
125
126    .size __isr_vector, . - __isr_vector
127
128/* Reset Handler */
129
130    .equ    NRF_POWER_RAMON_ADDRESS,             0x40000524
131    .equ    NRF_POWER_RAMONB_ADDRESS,            0x40000554
132    .equ    NRF_POWER_RAMONx_RAMxON_ONMODE_Msk,  0x3
133
134    .text
135    .thumb
136    .thumb_func
137    .align 1
138    .globl Reset_Handler
139    .type Reset_Handler, %function
140Reset_Handler:
141
142    MOVS    R1, #NRF_POWER_RAMONx_RAMxON_ONMODE_Msk
143
144    LDR     R0, =NRF_POWER_RAMON_ADDRESS
145    LDR     R2, [R0]
146    ORRS    R2, R1
147    STR     R2, [R0]
148
149    LDR     R0, =NRF_POWER_RAMONB_ADDRESS
150    LDR     R2, [R0]
151    ORRS    R2, R1
152    STR     R2, [R0]
153
154/* Loop to copy data from read only memory to RAM.
155 * The ranges of copy from/to are specified by following symbols:
156 *      __etext: LMA of start of the section to copy from. Usually end of text
157 *      __data_start__: VMA of start of the section to copy to.
158 *      __bss_start__: VMA of end of the section to copy to. Normally __data_end__ is used, but by using __bss_start__
159 *                    the user can add their own initialized data section before BSS section with the INSERT AFTER command.
160 *
161 * All addresses must be aligned to 4 bytes boundary.
162 */
163#ifndef __STARTUP_SKIP_ETEXT
164    ldr r1, =__etext
165    ldr r2, =__data_start__
166    ldr r3, =__bss_start__
167
168    subs r3, r3, r2
169    ble .L_loop1_done
170
171.L_loop1:
172    subs r3, r3, #4
173    ldr r0, [r1,r3]
174    str r0, [r2,r3]
175    bgt .L_loop1
176
177.L_loop1_done:
178#endif
179
180/* This part of work usually is done in C library startup code. Otherwise,
181 * define __STARTUP_CLEAR_BSS to enable it in this startup. This section
182 * clears the RAM where BSS data is located.
183 *
184 * The BSS section is specified by following symbols
185 *    __bss_start__: start of the BSS section.
186 *    __bss_end__: end of the BSS section.
187 *
188 * All addresses must be aligned to 4 bytes boundary.
189 */
190#ifdef __STARTUP_CLEAR_BSS
191    ldr r1, =__bss_start__
192    ldr r2, =__bss_end__
193
194    movs r0, 0
195
196    subs r2, r2, r1
197    ble .L_loop3_done
198
199.L_loop3:
200    subs r2, r2, #4
201    str r0, [r1, r2]
202    bgt .L_loop3
203
204.L_loop3_done:
205#endif /* __STARTUP_CLEAR_BSS */
206
207/* Execute SystemInit function. */
208    bl SystemInit
209
210/* Call _start function provided by libraries.
211 * If those libraries are not accessible, define __START as your entry point.
212 */
213#ifndef __START
214#define __START _start
215#endif
216    bl __START
217
218    .pool
219    .size   Reset_Handler,.-Reset_Handler
220
221    .section ".text"
222
223
224/* Dummy Exception Handlers (infinite loops which can be modified) */
225
226    .weak   NMI_Handler
227    .type   NMI_Handler, %function
228NMI_Handler:
229    b       .
230    .size   NMI_Handler, . - NMI_Handler
231
232
233    .weak   HardFault_Handler
234    .type   HardFault_Handler, %function
235HardFault_Handler:
236    b       .
237    .size   HardFault_Handler, . - HardFault_Handler
238
239
240    .weak   SVC_Handler
241    .type   SVC_Handler, %function
242SVC_Handler:
243    b       .
244    .size   SVC_Handler, . - SVC_Handler
245
246
247    .weak   PendSV_Handler
248    .type   PendSV_Handler, %function
249PendSV_Handler:
250    b       .
251    .size   PendSV_Handler, . - PendSV_Handler
252
253
254    .weak   SysTick_Handler
255    .type   SysTick_Handler, %function
256SysTick_Handler:
257    b       .
258    .size   SysTick_Handler, . - SysTick_Handler
259
260
261/* IRQ Handlers */
262
263    .globl  Default_Handler
264    .type   Default_Handler, %function
265Default_Handler:
266    b       .
267    .size   Default_Handler, . - Default_Handler
268
269    .macro  IRQ handler
270    .weak   \handler
271    .set    \handler, Default_Handler
272    .endm
273
274    IRQ  POWER_CLOCK_IRQHandler
275    IRQ  RADIO_IRQHandler
276    IRQ  UART0_IRQHandler
277    IRQ  SPI0_TWI0_IRQHandler
278    IRQ  SPI1_TWI1_IRQHandler
279    IRQ  GPIOTE_IRQHandler
280    IRQ  ADC_IRQHandler
281    IRQ  TIMER0_IRQHandler
282    IRQ  TIMER1_IRQHandler
283    IRQ  TIMER2_IRQHandler
284    IRQ  RTC0_IRQHandler
285    IRQ  TEMP_IRQHandler
286    IRQ  RNG_IRQHandler
287    IRQ  ECB_IRQHandler
288    IRQ  CCM_AAR_IRQHandler
289    IRQ  WDT_IRQHandler
290    IRQ  RTC1_IRQHandler
291    IRQ  QDEC_IRQHandler
292    IRQ  LPCOMP_IRQHandler
293    IRQ  SWI0_IRQHandler
294    IRQ  SWI1_IRQHandler
295    IRQ  SWI2_IRQHandler
296    IRQ  SWI3_IRQHandler
297    IRQ  SWI4_IRQHandler
298    IRQ  SWI5_IRQHandler
299
300  .end
301