1/***********************************************************************************
2 *                           SEGGER Microcontroller GmbH                           *
3 *                               The Embedded Experts                              *
4 ***********************************************************************************
5 *                                                                                 *
6 *                   (c) 2014 - 2018 SEGGER Microcontroller GmbH                   *
7 *                                                                                 *
8 *                  www.segger.com     Support: support@segger.com                 *
9 *                                                                                 *
10 ***********************************************************************************
11 *                                                                                 *
12 *        All rights reserved.                                                     *
13 *                                                                                 *
14 *        Redistribution and use in source and binary forms, with or               *
15 *        without modification, are permitted provided that the following          *
16 *        conditions are met:                                                      *
17 *                                                                                 *
18 *        - Redistributions of source code must retain the above copyright         *
19 *          notice, this list of conditions and the following disclaimer.          *
20 *                                                                                 *
21 *        - Neither the name of SEGGER Microcontroller GmbH                        *
22 *          nor the names of its contributors may be used to endorse or            *
23 *          promote products derived from this software without specific           *
24 *          prior written permission.                                              *
25 *                                                                                 *
26 *        THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND                   *
27 *        CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,              *
28 *        INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF                 *
29 *        MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE                 *
30 *        DISCLAIMED.                                                              *
31 *        IN NO EVENT SHALL SEGGER Microcontroller GmbH BE LIABLE FOR              *
32 *        ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR                 *
33 *        CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT        *
34 *        OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;          *
35 *        OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF            *
36 *        LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT                *
37 *        (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE        *
38 *        USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH         *
39 *        DAMAGE.                                                                  *
40 *                                                                                 *
41 ***********************************************************************************/
42
43/************************************************************************************
44 *                         Preprocessor Definitions                                 *
45 *                         ------------------------                                 *
46 * VECTORS_IN_RAM                                                                   *
47 *                                                                                  *
48 *   If defined, an area of RAM will large enough to store the vector table         *
49 *   will be reserved.                                                              *
50 *                                                                                  *
51 ************************************************************************************/
52
53  .syntax unified
54  .code 16
55
56  .section .init, "ax"
57  .align 0
58
59/************************************************************************************
60 * Default Exception Handlers                                                       *
61 ************************************************************************************/
62
63
64  .thumb_func
65  .weak   NMI_Handler
66NMI_Handler:
67  b     .
68
69  .thumb_func
70  .weak   HardFault_Handler
71HardFault_Handler:
72  b     .
73
74  .thumb_func
75  .weak   MemoryManagement_Handler
76MemoryManagement_Handler:
77  b     .
78
79  .thumb_func
80  .weak   BusFault_Handler
81BusFault_Handler:
82  b     .
83
84  .thumb_func
85  .weak   UsageFault_Handler
86UsageFault_Handler:
87  b     .
88
89  .thumb_func
90  .weak   SVC_Handler
91SVC_Handler:
92  b     .
93
94  .thumb_func
95  .weak   DebugMon_Handler
96DebugMon_Handler:
97  b     .
98
99  .thumb_func
100  .weak   PendSV_Handler
101PendSV_Handler:
102  b     .
103
104  .thumb_func
105  .weak   SysTick_Handler
106SysTick_Handler:
107  b     .
108
109  .thumb_func
110  .weak   Dummy_Handler
111Dummy_Handler:
112  b     .
113
114/************************************************************************************
115 * Default Interrupt Handlers                                                       *
116 ************************************************************************************/
117
118.weak POWER_CLOCK_IRQHandler
119.thumb_set POWER_CLOCK_IRQHandler, Dummy_Handler
120
121.weak RADIO_IRQHandler
122.thumb_set RADIO_IRQHandler, Dummy_Handler
123
124.weak UARTE0_UART0_IRQHandler
125.thumb_set UARTE0_UART0_IRQHandler, Dummy_Handler
126
127.weak SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
128.thumb_set SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler, Dummy_Handler
129
130.weak SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
131.thumb_set SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler, Dummy_Handler
132
133.weak NFCT_IRQHandler
134.thumb_set NFCT_IRQHandler, Dummy_Handler
135
136.weak GPIOTE_IRQHandler
137.thumb_set GPIOTE_IRQHandler, Dummy_Handler
138
139.weak SAADC_IRQHandler
140.thumb_set SAADC_IRQHandler, Dummy_Handler
141
142.weak TIMER0_IRQHandler
143.thumb_set TIMER0_IRQHandler, Dummy_Handler
144
145.weak TIMER1_IRQHandler
146.thumb_set TIMER1_IRQHandler, Dummy_Handler
147
148.weak TIMER2_IRQHandler
149.thumb_set TIMER2_IRQHandler, Dummy_Handler
150
151.weak RTC0_IRQHandler
152.thumb_set RTC0_IRQHandler, Dummy_Handler
153
154.weak TEMP_IRQHandler
155.thumb_set TEMP_IRQHandler, Dummy_Handler
156
157.weak RNG_IRQHandler
158.thumb_set RNG_IRQHandler, Dummy_Handler
159
160.weak ECB_IRQHandler
161.thumb_set ECB_IRQHandler, Dummy_Handler
162
163.weak CCM_AAR_IRQHandler
164.thumb_set CCM_AAR_IRQHandler, Dummy_Handler
165
166.weak WDT_IRQHandler
167.thumb_set WDT_IRQHandler, Dummy_Handler
168
169.weak RTC1_IRQHandler
170.thumb_set RTC1_IRQHandler, Dummy_Handler
171
172.weak QDEC_IRQHandler
173.thumb_set QDEC_IRQHandler, Dummy_Handler
174
175.weak COMP_LPCOMP_IRQHandler
176.thumb_set COMP_LPCOMP_IRQHandler, Dummy_Handler
177
178.weak SWI0_EGU0_IRQHandler
179.thumb_set SWI0_EGU0_IRQHandler, Dummy_Handler
180
181.weak SWI1_EGU1_IRQHandler
182.thumb_set SWI1_EGU1_IRQHandler, Dummy_Handler
183
184.weak SWI2_EGU2_IRQHandler
185.thumb_set SWI2_EGU2_IRQHandler, Dummy_Handler
186
187.weak SWI3_EGU3_IRQHandler
188.thumb_set SWI3_EGU3_IRQHandler, Dummy_Handler
189
190.weak SWI4_EGU4_IRQHandler
191.thumb_set SWI4_EGU4_IRQHandler, Dummy_Handler
192
193.weak SWI5_EGU5_IRQHandler
194.thumb_set SWI5_EGU5_IRQHandler, Dummy_Handler
195
196.weak TIMER3_IRQHandler
197.thumb_set TIMER3_IRQHandler, Dummy_Handler
198
199.weak TIMER4_IRQHandler
200.thumb_set TIMER4_IRQHandler, Dummy_Handler
201
202.weak PWM0_IRQHandler
203.thumb_set PWM0_IRQHandler, Dummy_Handler
204
205.weak PDM_IRQHandler
206.thumb_set PDM_IRQHandler, Dummy_Handler
207
208.weak MWU_IRQHandler
209.thumb_set MWU_IRQHandler, Dummy_Handler
210
211.weak PWM1_IRQHandler
212.thumb_set PWM1_IRQHandler, Dummy_Handler
213
214.weak PWM2_IRQHandler
215.thumb_set PWM2_IRQHandler, Dummy_Handler
216
217.weak SPIM2_SPIS2_SPI2_IRQHandler
218.thumb_set SPIM2_SPIS2_SPI2_IRQHandler, Dummy_Handler
219
220.weak RTC2_IRQHandler
221.thumb_set RTC2_IRQHandler, Dummy_Handler
222
223.weak I2S_IRQHandler
224.thumb_set I2S_IRQHandler, Dummy_Handler
225
226.weak FPU_IRQHandler
227.thumb_set FPU_IRQHandler, Dummy_Handler
228
229.weak USBD_IRQHandler
230.thumb_set USBD_IRQHandler, Dummy_Handler
231
232.weak UARTE1_IRQHandler
233.thumb_set UARTE1_IRQHandler, Dummy_Handler
234
235.weak PWM3_IRQHandler
236.thumb_set PWM3_IRQHandler, Dummy_Handler
237
238.weak SPIM3_IRQHandler
239.thumb_set SPIM3_IRQHandler, Dummy_Handler
240
241/************************************************************************************
242 * Reset Handler Extensions                                                         *
243 ************************************************************************************/
244
245  .extern Reset_Handler
246  .global nRFInitialize
247  .extern afterInitialize
248
249  .thumb_func
250nRFInitialize:
251  b afterInitialize
252
253
254/************************************************************************************
255 * Vector Table                                                                     *
256 ************************************************************************************/
257
258  .section .vectors, "ax"
259  .align 0
260  .global _vectors
261  .extern __stack_end__
262
263_vectors:
264  .word __stack_end__
265  .word Reset_Handler
266  .word NMI_Handler
267  .word HardFault_Handler
268  .word MemoryManagement_Handler
269  .word BusFault_Handler
270  .word UsageFault_Handler
271  .word 0                           /*Reserved */
272  .word 0                           /*Reserved */
273  .word 0                           /*Reserved */
274  .word 0                           /*Reserved */
275  .word SVC_Handler
276  .word DebugMon_Handler
277  .word 0                           /*Reserved */
278  .word PendSV_Handler
279  .word SysTick_Handler
280
281/* External Interrupts */
282  .word   POWER_CLOCK_IRQHandler
283  .word   RADIO_IRQHandler
284  .word   UARTE0_UART0_IRQHandler
285  .word   SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
286  .word   SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
287  .word   NFCT_IRQHandler
288  .word   GPIOTE_IRQHandler
289  .word   SAADC_IRQHandler
290  .word   TIMER0_IRQHandler
291  .word   TIMER1_IRQHandler
292  .word   TIMER2_IRQHandler
293  .word   RTC0_IRQHandler
294  .word   TEMP_IRQHandler
295  .word   RNG_IRQHandler
296  .word   ECB_IRQHandler
297  .word   CCM_AAR_IRQHandler
298  .word   WDT_IRQHandler
299  .word   RTC1_IRQHandler
300  .word   QDEC_IRQHandler
301  .word   COMP_LPCOMP_IRQHandler
302  .word   SWI0_EGU0_IRQHandler
303  .word   SWI1_EGU1_IRQHandler
304  .word   SWI2_EGU2_IRQHandler
305  .word   SWI3_EGU3_IRQHandler
306  .word   SWI4_EGU4_IRQHandler
307  .word   SWI5_EGU5_IRQHandler
308  .word   TIMER3_IRQHandler
309  .word   TIMER4_IRQHandler
310  .word   PWM0_IRQHandler
311  .word   PDM_IRQHandler
312  .word   0                           /*Reserved */
313  .word   0                           /*Reserved */
314  .word   MWU_IRQHandler
315  .word   PWM1_IRQHandler
316  .word   PWM2_IRQHandler
317  .word   SPIM2_SPIS2_SPI2_IRQHandler
318  .word   RTC2_IRQHandler
319  .word   I2S_IRQHandler
320  .word   FPU_IRQHandler
321  .word   USBD_IRQHandler
322  .word   UARTE1_IRQHandler
323  .word   0                           /*Reserved */
324  .word   0                           /*Reserved */
325  .word   0                           /*Reserved */
326  .word   0                           /*Reserved */
327  .word   PWM3_IRQHandler
328  .word   0                           /*Reserved */
329  .word   SPIM3_IRQHandler
330  .word   0                           /*Reserved */
331  .word   0                           /*Reserved */
332  .word   0                           /*Reserved */
333  .word   0                           /*Reserved */
334  .word   0                           /*Reserved */
335  .word   0                           /*Reserved */
336  .word   0                           /*Reserved */
337  .word   0                           /*Reserved */
338  .word   0                           /*Reserved */
339  .word   0                           /*Reserved */
340  .word   0                           /*Reserved */
341  .word   0                           /*Reserved */
342  .word   0                           /*Reserved */
343  .word   0                           /*Reserved */
344  .word   0                           /*Reserved */
345  .word   0                           /*Reserved */
346  .word   0                           /*Reserved */
347  .word   0                           /*Reserved */
348  .word   0                           /*Reserved */
349  .word   0                           /*Reserved */
350  .word   0                           /*Reserved */
351  .word   0                           /*Reserved */
352  .word   0                           /*Reserved */
353  .word   0                           /*Reserved */
354  .word   0                           /*Reserved */
355  .word   0                           /*Reserved */
356  .word   0                           /*Reserved */
357  .word   0                           /*Reserved */
358  .word   0                           /*Reserved */
359  .word   0                           /*Reserved */
360  .word   0                           /*Reserved */
361  .word   0                           /*Reserved */
362  .word   0                           /*Reserved */
363  .word   0                           /*Reserved */
364  .word   0                           /*Reserved */
365  .word   0                           /*Reserved */
366  .word   0                           /*Reserved */
367  .word   0                           /*Reserved */
368  .word   0                           /*Reserved */
369  .word   0                           /*Reserved */
370  .word   0                           /*Reserved */
371  .word   0                           /*Reserved */
372  .word   0                           /*Reserved */
373  .word   0                           /*Reserved */
374  .word   0                           /*Reserved */
375  .word   0                           /*Reserved */
376  .word   0                           /*Reserved */
377  .word   0                           /*Reserved */
378  .word   0                           /*Reserved */
379  .word   0                           /*Reserved */
380  .word   0                           /*Reserved */
381  .word   0                           /*Reserved */
382  .word   0                           /*Reserved */
383  .word   0                           /*Reserved */
384  .word   0                           /*Reserved */
385  .word   0                           /*Reserved */
386  .word   0                           /*Reserved */
387  .word   0                           /*Reserved */
388  .word   0                           /*Reserved */
389  .word   0                           /*Reserved */
390  .word   0                           /*Reserved */
391  .word   0                           /*Reserved */
392  .word   0                           /*Reserved */
393  .word   0                           /*Reserved */
394_vectors_end:
395
396#ifdef VECTORS_IN_RAM
397  .section .vectors_ram, "ax"
398  .align 0
399  .global _vectors_ram
400
401_vectors_ram:
402  .space _vectors_end - _vectors, 0
403#endif
404