1 /**
2  * Copyright (c) 2021 Raspberry Pi (Trading) Ltd.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 // =============================================================================
7 // Register block : SYSINFO
8 // Version        : 1
9 // Bus type       : apb
10 // Description    : None
11 // =============================================================================
12 #ifndef HARDWARE_REGS_SYSINFO_DEFINED
13 #define HARDWARE_REGS_SYSINFO_DEFINED
14 // =============================================================================
15 // Register    : SYSINFO_CHIP_ID
16 // Description : JEDEC JEP-106 compliant chip identifier.
17 #define SYSINFO_CHIP_ID_OFFSET 0x00000000
18 #define SYSINFO_CHIP_ID_BITS   0xffffffff
19 #define SYSINFO_CHIP_ID_RESET  0x00000000
20 // -----------------------------------------------------------------------------
21 // Field       : SYSINFO_CHIP_ID_REVISION
22 // Description : None
23 #define SYSINFO_CHIP_ID_REVISION_RESET  "-"
24 #define SYSINFO_CHIP_ID_REVISION_BITS   0xf0000000
25 #define SYSINFO_CHIP_ID_REVISION_MSB    31
26 #define SYSINFO_CHIP_ID_REVISION_LSB    28
27 #define SYSINFO_CHIP_ID_REVISION_ACCESS "RO"
28 // -----------------------------------------------------------------------------
29 // Field       : SYSINFO_CHIP_ID_PART
30 // Description : None
31 #define SYSINFO_CHIP_ID_PART_RESET  "-"
32 #define SYSINFO_CHIP_ID_PART_BITS   0x0ffff000
33 #define SYSINFO_CHIP_ID_PART_MSB    27
34 #define SYSINFO_CHIP_ID_PART_LSB    12
35 #define SYSINFO_CHIP_ID_PART_ACCESS "RO"
36 // -----------------------------------------------------------------------------
37 // Field       : SYSINFO_CHIP_ID_MANUFACTURER
38 // Description : None
39 #define SYSINFO_CHIP_ID_MANUFACTURER_RESET  "-"
40 #define SYSINFO_CHIP_ID_MANUFACTURER_BITS   0x00000fff
41 #define SYSINFO_CHIP_ID_MANUFACTURER_MSB    11
42 #define SYSINFO_CHIP_ID_MANUFACTURER_LSB    0
43 #define SYSINFO_CHIP_ID_MANUFACTURER_ACCESS "RO"
44 // =============================================================================
45 // Register    : SYSINFO_PLATFORM
46 // Description : Platform register. Allows software to know what environment it
47 //               is running in.
48 #define SYSINFO_PLATFORM_OFFSET 0x00000004
49 #define SYSINFO_PLATFORM_BITS   0x00000003
50 #define SYSINFO_PLATFORM_RESET  0x00000000
51 // -----------------------------------------------------------------------------
52 // Field       : SYSINFO_PLATFORM_ASIC
53 // Description : None
54 #define SYSINFO_PLATFORM_ASIC_RESET  0x0
55 #define SYSINFO_PLATFORM_ASIC_BITS   0x00000002
56 #define SYSINFO_PLATFORM_ASIC_MSB    1
57 #define SYSINFO_PLATFORM_ASIC_LSB    1
58 #define SYSINFO_PLATFORM_ASIC_ACCESS "RO"
59 // -----------------------------------------------------------------------------
60 // Field       : SYSINFO_PLATFORM_FPGA
61 // Description : None
62 #define SYSINFO_PLATFORM_FPGA_RESET  0x0
63 #define SYSINFO_PLATFORM_FPGA_BITS   0x00000001
64 #define SYSINFO_PLATFORM_FPGA_MSB    0
65 #define SYSINFO_PLATFORM_FPGA_LSB    0
66 #define SYSINFO_PLATFORM_FPGA_ACCESS "RO"
67 // =============================================================================
68 // Register    : SYSINFO_GITREF_RP2040
69 // Description : Git hash of the chip source. Used to identify chip version.
70 #define SYSINFO_GITREF_RP2040_OFFSET 0x00000040
71 #define SYSINFO_GITREF_RP2040_BITS   0xffffffff
72 #define SYSINFO_GITREF_RP2040_RESET  "-"
73 #define SYSINFO_GITREF_RP2040_MSB    31
74 #define SYSINFO_GITREF_RP2040_LSB    0
75 #define SYSINFO_GITREF_RP2040_ACCESS "RO"
76 // =============================================================================
77 #endif // HARDWARE_REGS_SYSINFO_DEFINED
78