1 //***************************************************************************** 2 // 3 // hw_comp.h - Macros used when accessing the comparator hardware. 4 // 5 // Copyright (c) 2005-2012 Texas Instruments Incorporated. All rights reserved. 6 // Software License Agreement 7 // 8 // Redistribution and use in source and binary forms, with or without 9 // modification, are permitted provided that the following conditions 10 // are met: 11 // 12 // Redistributions of source code must retain the above copyright 13 // notice, this list of conditions and the following disclaimer. 14 // 15 // Redistributions in binary form must reproduce the above copyright 16 // notice, this list of conditions and the following disclaimer in the 17 // documentation and/or other materials provided with the 18 // distribution. 19 // 20 // Neither the name of Texas Instruments Incorporated nor the names of 21 // its contributors may be used to endorse or promote products derived 22 // from this software without specific prior written permission. 23 // 24 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 25 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 26 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 27 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 28 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 29 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 30 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 31 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 32 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 33 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 34 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35 // 36 // This is part of revision 9453 of the Stellaris Firmware Development Package. 37 // 38 //***************************************************************************** 39 40 #ifndef __HW_COMP_H__ 41 #define __HW_COMP_H__ 42 43 //***************************************************************************** 44 // 45 // The following are defines for the Comparator register offsets. 46 // 47 //***************************************************************************** 48 #define COMP_O_ACMIS 0x00000000 // Analog Comparator Masked 49 // Interrupt Status 50 #define COMP_O_ACRIS 0x00000004 // Analog Comparator Raw Interrupt 51 // Status 52 #define COMP_O_ACINTEN 0x00000008 // Analog Comparator Interrupt 53 // Enable 54 #define COMP_O_ACREFCTL 0x00000010 // Analog Comparator Reference 55 // Voltage Control 56 #define COMP_O_ACSTAT0 0x00000020 // Analog Comparator Status 0 57 #define COMP_O_ACCTL0 0x00000024 // Analog Comparator Control 0 58 #define COMP_O_ACSTAT1 0x00000040 // Analog Comparator Status 1 59 #define COMP_O_ACCTL1 0x00000044 // Analog Comparator Control 1 60 #define COMP_O_ACSTAT2 0x00000060 // Analog Comparator Status 2 61 #define COMP_O_ACCTL2 0x00000064 // Analog Comparator Control 2 62 #define COMP_O_PP 0x00000FC0 // Analog Comparator Peripheral 63 // Properties 64 65 //***************************************************************************** 66 // 67 // The following are defines for the bit fields in the COMP_O_ACMIS register. 68 // 69 //***************************************************************************** 70 #define COMP_ACMIS_IN2 0x00000004 // Comparator 2 Masked Interrupt 71 // Status 72 #define COMP_ACMIS_IN1 0x00000002 // Comparator 1 Masked Interrupt 73 // Status 74 #define COMP_ACMIS_IN0 0x00000001 // Comparator 0 Masked Interrupt 75 // Status 76 77 //***************************************************************************** 78 // 79 // The following are defines for the bit fields in the COMP_O_ACRIS register. 80 // 81 //***************************************************************************** 82 #define COMP_ACRIS_IN2 0x00000004 // Comparator 2 Interrupt Status 83 #define COMP_ACRIS_IN1 0x00000002 // Comparator 1 Interrupt Status 84 #define COMP_ACRIS_IN0 0x00000001 // Comparator 0 Interrupt Status 85 86 //***************************************************************************** 87 // 88 // The following are defines for the bit fields in the COMP_O_ACINTEN register. 89 // 90 //***************************************************************************** 91 #define COMP_ACINTEN_IN2 0x00000004 // Comparator 2 Interrupt Enable 92 #define COMP_ACINTEN_IN1 0x00000002 // Comparator 1 Interrupt Enable 93 #define COMP_ACINTEN_IN0 0x00000001 // Comparator 0 Interrupt Enable 94 95 //***************************************************************************** 96 // 97 // The following are defines for the bit fields in the COMP_O_ACREFCTL 98 // register. 99 // 100 //***************************************************************************** 101 #define COMP_ACREFCTL_EN 0x00000200 // Resistor Ladder Enable 102 #define COMP_ACREFCTL_RNG 0x00000100 // Resistor Ladder Range 103 #define COMP_ACREFCTL_VREF_M 0x0000000F // Resistor Ladder Voltage Ref 104 #define COMP_ACREFCTL_VREF_S 0 105 106 //***************************************************************************** 107 // 108 // The following are defines for the bit fields in the COMP_O_ACSTAT0 register. 109 // 110 //***************************************************************************** 111 #define COMP_ACSTAT0_OVAL 0x00000002 // Comparator Output Value 112 113 //***************************************************************************** 114 // 115 // The following are defines for the bit fields in the COMP_O_ACCTL0 register. 116 // 117 //***************************************************************************** 118 #define COMP_ACCTL0_TOEN 0x00000800 // Trigger Output Enable 119 #define COMP_ACCTL0_ASRCP_M 0x00000600 // Analog Source Positive 120 #define COMP_ACCTL0_ASRCP_PIN 0x00000000 // Pin value of Cn+ 121 #define COMP_ACCTL0_ASRCP_PIN0 0x00000200 // Pin value of C0+ 122 #define COMP_ACCTL0_ASRCP_REF 0x00000400 // Internal voltage reference 123 #define COMP_ACCTL0_TSLVAL 0x00000080 // Trigger Sense Level Value 124 #define COMP_ACCTL0_TSEN_M 0x00000060 // Trigger Sense 125 #define COMP_ACCTL0_TSEN_LEVEL 0x00000000 // Level sense, see TSLVAL 126 #define COMP_ACCTL0_TSEN_FALL 0x00000020 // Falling edge 127 #define COMP_ACCTL0_TSEN_RISE 0x00000040 // Rising edge 128 #define COMP_ACCTL0_TSEN_BOTH 0x00000060 // Either edge 129 #define COMP_ACCTL0_ISLVAL 0x00000010 // Interrupt Sense Level Value 130 #define COMP_ACCTL0_ISEN_M 0x0000000C // Interrupt Sense 131 #define COMP_ACCTL0_ISEN_LEVEL 0x00000000 // Level sense, see ISLVAL 132 #define COMP_ACCTL0_ISEN_FALL 0x00000004 // Falling edge 133 #define COMP_ACCTL0_ISEN_RISE 0x00000008 // Rising edge 134 #define COMP_ACCTL0_ISEN_BOTH 0x0000000C // Either edge 135 #define COMP_ACCTL0_CINV 0x00000002 // Comparator Output Invert 136 137 //***************************************************************************** 138 // 139 // The following are defines for the bit fields in the COMP_O_ACSTAT1 register. 140 // 141 //***************************************************************************** 142 #define COMP_ACSTAT1_OVAL 0x00000002 // Comparator Output Value 143 144 //***************************************************************************** 145 // 146 // The following are defines for the bit fields in the COMP_O_ACCTL1 register. 147 // 148 //***************************************************************************** 149 #define COMP_ACCTL1_TOEN 0x00000800 // Trigger Output Enable 150 #define COMP_ACCTL1_ASRCP_M 0x00000600 // Analog Source Positive 151 #define COMP_ACCTL1_ASRCP_PIN 0x00000000 // Pin value of Cn+ 152 #define COMP_ACCTL1_ASRCP_PIN0 0x00000200 // Pin value of C0+ 153 #define COMP_ACCTL1_ASRCP_REF 0x00000400 // Internal voltage reference 154 // (VIREF) 155 #define COMP_ACCTL1_TSLVAL 0x00000080 // Trigger Sense Level Value 156 #define COMP_ACCTL1_TSEN_M 0x00000060 // Trigger Sense 157 #define COMP_ACCTL1_TSEN_LEVEL 0x00000000 // Level sense, see TSLVAL 158 #define COMP_ACCTL1_TSEN_FALL 0x00000020 // Falling edge 159 #define COMP_ACCTL1_TSEN_RISE 0x00000040 // Rising edge 160 #define COMP_ACCTL1_TSEN_BOTH 0x00000060 // Either edge 161 #define COMP_ACCTL1_ISLVAL 0x00000010 // Interrupt Sense Level Value 162 #define COMP_ACCTL1_ISEN_M 0x0000000C // Interrupt Sense 163 #define COMP_ACCTL1_ISEN_LEVEL 0x00000000 // Level sense, see ISLVAL 164 #define COMP_ACCTL1_ISEN_FALL 0x00000004 // Falling edge 165 #define COMP_ACCTL1_ISEN_RISE 0x00000008 // Rising edge 166 #define COMP_ACCTL1_ISEN_BOTH 0x0000000C // Either edge 167 #define COMP_ACCTL1_CINV 0x00000002 // Comparator Output Invert 168 169 //***************************************************************************** 170 // 171 // The following are defines for the bit fields in the COMP_O_ACSTAT2 register. 172 // 173 //***************************************************************************** 174 #define COMP_ACSTAT2_OVAL 0x00000002 // Comparator Output Value 175 176 //***************************************************************************** 177 // 178 // The following are defines for the bit fields in the COMP_O_ACCTL2 register. 179 // 180 //***************************************************************************** 181 #define COMP_ACCTL2_TOEN 0x00000800 // Trigger Output Enable 182 #define COMP_ACCTL2_ASRCP_M 0x00000600 // Analog Source Positive 183 #define COMP_ACCTL2_ASRCP_PIN 0x00000000 // Pin value of Cn+ 184 #define COMP_ACCTL2_ASRCP_PIN0 0x00000200 // Pin value of C0+ 185 #define COMP_ACCTL2_ASRCP_REF 0x00000400 // Internal voltage reference 186 // (VIREF) 187 #define COMP_ACCTL2_TSLVAL 0x00000080 // Trigger Sense Level Value 188 #define COMP_ACCTL2_TSEN_M 0x00000060 // Trigger Sense 189 #define COMP_ACCTL2_TSEN_LEVEL 0x00000000 // Level sense, see TSLVAL 190 #define COMP_ACCTL2_TSEN_FALL 0x00000020 // Falling edge 191 #define COMP_ACCTL2_TSEN_RISE 0x00000040 // Rising edge 192 #define COMP_ACCTL2_TSEN_BOTH 0x00000060 // Either edge 193 #define COMP_ACCTL2_ISLVAL 0x00000010 // Interrupt Sense Level Value 194 #define COMP_ACCTL2_ISEN_M 0x0000000C // Interrupt Sense 195 #define COMP_ACCTL2_ISEN_LEVEL 0x00000000 // Level sense, see ISLVAL 196 #define COMP_ACCTL2_ISEN_FALL 0x00000004 // Falling edge 197 #define COMP_ACCTL2_ISEN_RISE 0x00000008 // Rising edge 198 #define COMP_ACCTL2_ISEN_BOTH 0x0000000C // Either edge 199 #define COMP_ACCTL2_CINV 0x00000002 // Comparator Output Invert 200 201 //***************************************************************************** 202 // 203 // The following are defines for the bit fields in the COMP_O_PP register. 204 // 205 //***************************************************************************** 206 #define COMP_PP_C2O 0x00040000 // Comparator Output 2 Present 207 #define COMP_PP_C1O 0x00020000 // Comparator Output 1 Present 208 #define COMP_PP_C0O 0x00010000 // Comparator Output 0 Present 209 #define COMP_PP_CMP2 0x00000004 // Comparator 2 Present 210 #define COMP_PP_CMP1 0x00000002 // Comparator 1 Present 211 #define COMP_PP_CMP0 0x00000001 // Comparator 0 Present 212 213 //***************************************************************************** 214 // 215 // The following definitions are deprecated. 216 // 217 //***************************************************************************** 218 #ifndef DEPRECATED 219 220 //***************************************************************************** 221 // 222 // The following are deprecated defines for the Comparator register offsets. 223 // 224 //***************************************************************************** 225 #define COMP_O_MIS 0x00000000 // Interrupt status register 226 #define COMP_O_RIS 0x00000004 // Raw interrupt status register 227 #define COMP_O_INTEN 0x00000008 // Interrupt enable register 228 #define COMP_O_REFCTL 0x00000010 // Reference voltage control reg 229 230 //***************************************************************************** 231 // 232 // The following are deprecated defines for the bit fields in the COMP_O_REFCTL 233 // register. 234 // 235 //***************************************************************************** 236 #define COMP_REFCTL_EN 0x00000200 // Reference voltage enable 237 #define COMP_REFCTL_RNG 0x00000100 // Reference voltage range 238 #define COMP_REFCTL_VREF_MASK 0x0000000F // Reference voltage select mask 239 #define COMP_REFCTL_VREF_SHIFT 0 240 241 //***************************************************************************** 242 // 243 // The following are deprecated defines for the bit fields in the COMP_MIS, 244 // COMP_RIS, and COMP_INTEN registers. 245 // 246 //***************************************************************************** 247 #define COMP_INT_2 0x00000004 // Comp2 interrupt 248 #define COMP_INT_1 0x00000002 // Comp1 interrupt 249 #define COMP_INT_0 0x00000001 // Comp0 interrupt 250 251 //***************************************************************************** 252 // 253 // The following are deprecated defines for the bit fields in the COMP_ACSTAT0, 254 // COMP_ACSTAT1, and COMP_ACSTAT2 registers. 255 // 256 //***************************************************************************** 257 #define COMP_ACSTAT_OVAL 0x00000002 // Comparator output value 258 259 //***************************************************************************** 260 // 261 // The following are deprecated defines for the bit fields in the COMP_ACCTL0, 262 // COMP_ACCTL1, and COMP_ACCTL2 registers. 263 // 264 //***************************************************************************** 265 #define COMP_ACCTL_TMASK 0x00000800 // Trigger enable 266 #define COMP_ACCTL_ASRCP_MASK 0x00000600 // Vin+ source select mask 267 #define COMP_ACCTL_ASRCP_PIN 0x00000000 // Dedicated Comp+ pin 268 #define COMP_ACCTL_ASRCP_PIN0 0x00000200 // Comp0+ pin 269 #define COMP_ACCTL_ASRCP_REF 0x00000400 // Internal voltage reference 270 #define COMP_ACCTL_ASRCP_RES 0x00000600 // Reserved 271 #define COMP_ACCTL_OEN 0x00000100 // Comparator output enable 272 #define COMP_ACCTL_TSVAL 0x00000080 // Trigger polarity select 273 #define COMP_ACCTL_TSEN_MASK 0x00000060 // Trigger sense mask 274 #define COMP_ACCTL_TSEN_LEVEL 0x00000000 // Trigger is level sense 275 #define COMP_ACCTL_TSEN_FALL 0x00000020 // Trigger is falling edge 276 #define COMP_ACCTL_TSEN_RISE 0x00000040 // Trigger is rising edge 277 #define COMP_ACCTL_TSEN_BOTH 0x00000060 // Trigger is both edges 278 #define COMP_ACCTL_ISLVAL 0x00000010 // Interrupt polarity select 279 #define COMP_ACCTL_ISEN_MASK 0x0000000C // Interrupt sense mask 280 #define COMP_ACCTL_ISEN_LEVEL 0x00000000 // Interrupt is level sense 281 #define COMP_ACCTL_ISEN_FALL 0x00000004 // Interrupt is falling edge 282 #define COMP_ACCTL_ISEN_RISE 0x00000008 // Interrupt is rising edge 283 #define COMP_ACCTL_ISEN_BOTH 0x0000000C // Interrupt is both edges 284 #define COMP_ACCTL_CINV 0x00000002 // Comparator output invert 285 286 //***************************************************************************** 287 // 288 // The following are deprecated defines for the reset values for the comparator 289 // registers. 290 // 291 //***************************************************************************** 292 #define COMP_RV_ACCTL1 0x00000000 // Comp1 control register 293 #define COMP_RV_ACSTAT2 0x00000000 // Comp2 status register 294 #define COMP_RV_ACSTAT0 0x00000000 // Comp0 status register 295 #define COMP_RV_RIS 0x00000000 // Raw interrupt status register 296 #define COMP_RV_INTEN 0x00000000 // Interrupt enable register 297 #define COMP_RV_ACCTL2 0x00000000 // Comp2 control register 298 #define COMP_RV_MIS 0x00000000 // Interrupt status register 299 #define COMP_RV_ACCTL0 0x00000000 // Comp0 control register 300 #define COMP_RV_ACSTAT1 0x00000000 // Comp1 status register 301 #define COMP_RV_REFCTL 0x00000000 // Reference voltage control reg 302 303 #endif 304 305 #endif // __HW_COMP_H__ 306