1 //***************************************************************************** 2 // 3 // hw_ints.h - Macros that define the interrupt assignment on Stellaris. 4 // 5 // Copyright (c) 2005-2012 Texas Instruments Incorporated. All rights reserved. 6 // Software License Agreement 7 // 8 // Redistribution and use in source and binary forms, with or without 9 // modification, are permitted provided that the following conditions 10 // are met: 11 // 12 // Redistributions of source code must retain the above copyright 13 // notice, this list of conditions and the following disclaimer. 14 // 15 // Redistributions in binary form must reproduce the above copyright 16 // notice, this list of conditions and the following disclaimer in the 17 // documentation and/or other materials provided with the 18 // distribution. 19 // 20 // Neither the name of Texas Instruments Incorporated nor the names of 21 // its contributors may be used to endorse or promote products derived 22 // from this software without specific prior written permission. 23 // 24 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 25 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 26 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 27 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 28 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 29 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 30 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 31 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 32 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 33 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 34 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35 // 36 // This is part of revision 9453 of the Stellaris Firmware Development Package. 37 // 38 //***************************************************************************** 39 40 #ifndef __HW_INTS_H__ 41 #define __HW_INTS_H__ 42 43 //***************************************************************************** 44 // 45 // The following are defines for the fault assignments. 46 // 47 //***************************************************************************** 48 #define FAULT_NMI 2 // NMI fault 49 #define FAULT_HARD 3 // Hard fault 50 #define FAULT_MPU 4 // MPU fault 51 #define FAULT_BUS 5 // Bus fault 52 #define FAULT_USAGE 6 // Usage fault 53 #define FAULT_SVCALL 11 // SVCall 54 #define FAULT_DEBUG 12 // Debug monitor 55 #define FAULT_PENDSV 14 // PendSV 56 #define FAULT_SYSTICK 15 // System Tick 57 58 //***************************************************************************** 59 // 60 // The following are defines for the interrupt assignments. 61 // 62 //***************************************************************************** 63 #define INT_GPIOA 16 // GPIO Port A 64 #define INT_GPIOB 17 // GPIO Port B 65 #define INT_GPIOC 18 // GPIO Port C 66 #define INT_GPIOD 19 // GPIO Port D 67 #define INT_GPIOE 20 // GPIO Port E 68 #define INT_UART0 21 // UART0 Rx and Tx 69 #define INT_UART1 22 // UART1 Rx and Tx 70 #define INT_SSI0 23 // SSI0 Rx and Tx 71 #define INT_I2C0 24 // I2C0 Master and Slave 72 #define INT_PWM0_FAULT 25 // PWM0 Fault 73 #define INT_PWM0_0 26 // PWM0 Generator 0 74 #define INT_PWM0_1 27 // PWM0 Generator 1 75 #define INT_PWM0_2 28 // PWM0 Generator 2 76 #define INT_QEI0 29 // Quadrature Encoder 0 77 #define INT_ADC0SS0 30 // ADC0 Sequence 0 78 #define INT_ADC0SS1 31 // ADC0 Sequence 1 79 #define INT_ADC0SS2 32 // ADC0 Sequence 2 80 #define INT_ADC0SS3 33 // ADC0 Sequence 3 81 #define INT_WATCHDOG 34 // Watchdog timer 82 #define INT_TIMER0A 35 // Timer 0 subtimer A 83 #define INT_TIMER0B 36 // Timer 0 subtimer B 84 #define INT_TIMER1A 37 // Timer 1 subtimer A 85 #define INT_TIMER1B 38 // Timer 1 subtimer B 86 #define INT_TIMER2A 39 // Timer 2 subtimer A 87 #define INT_TIMER2B 40 // Timer 2 subtimer B 88 #define INT_COMP0 41 // Analog Comparator 0 89 #define INT_COMP1 42 // Analog Comparator 1 90 #define INT_COMP2 43 // Analog Comparator 2 91 #define INT_SYSCTL 44 // System Control (PLL, OSC, BO) 92 #define INT_FLASH 45 // FLASH Control 93 #define INT_GPIOF 46 // GPIO Port F 94 #define INT_GPIOG 47 // GPIO Port G 95 #define INT_GPIOH 48 // GPIO Port H 96 #define INT_UART2 49 // UART2 Rx and Tx 97 #define INT_SSI1 50 // SSI1 Rx and Tx 98 #define INT_TIMER3A 51 // Timer 3 subtimer A 99 #define INT_TIMER3B 52 // Timer 3 subtimer B 100 #define INT_I2C1 53 // I2C1 Master and Slave 101 #define INT_QEI1 54 // Quadrature Encoder 1 102 #define INT_CAN0 55 // CAN0 103 #define INT_CAN1 56 // CAN1 104 #define INT_CAN2 57 // CAN2 105 #define INT_ETH 58 // Ethernet 106 #define INT_HIBERNATE 59 // Hibernation module 107 #define INT_USB0 60 // USB 0 Controller 108 #define INT_PWM0_3 61 // PWM0 Generator 3 109 #define INT_UDMA 62 // uDMA controller 110 #define INT_UDMAERR 63 // uDMA Error 111 #define INT_ADC1SS0 64 // ADC1 Sequence 0 112 #define INT_ADC1SS1 65 // ADC1 Sequence 1 113 #define INT_ADC1SS2 66 // ADC1 Sequence 2 114 #define INT_ADC1SS3 67 // ADC1 Sequence 3 115 #define INT_I2S0 68 // I2S0 116 #define INT_EPI0 69 // EPI0 117 #define INT_GPIOJ 70 // GPIO Port J 118 #define INT_GPIOK 71 // GPIO Port K 119 #define INT_GPIOL 72 // GPIO Port L 120 #define INT_SSI2 73 // SSI2 121 #define INT_SSI3 74 // SSI3 122 #define INT_UART3 75 // UART3 123 #define INT_UART4 76 // UART4 124 #define INT_UART5 77 // UART5 125 #define INT_UART6 78 // UART6 126 #define INT_UART7 79 // UART7 127 #define INT_I2C2 84 // I2C2 128 #define INT_I2C3 85 // I2C3 129 #define INT_TIMER4A 86 // Timer 4A 130 #define INT_TIMER4B 87 // Timer 4B 131 #define INT_TIMER5A 108 // Timer 5A 132 #define INT_TIMER5B 109 // Timer 5B 133 #define INT_WTIMER0A 110 // Wide Timer 0A 134 #define INT_WTIMER0B 111 // Wide Timer 0B 135 #define INT_WTIMER1A 112 // Wide Timer 1A 136 #define INT_WTIMER1B 113 // Wide Timer 1B 137 #define INT_WTIMER2A 114 // Wide Timer 2A 138 #define INT_WTIMER2B 115 // Wide Timer 2B 139 #define INT_WTIMER3A 116 // Wide Timer 3A 140 #define INT_WTIMER3B 117 // Wide Timer 3B 141 #define INT_WTIMER4A 118 // Wide Timer 4A 142 #define INT_WTIMER4B 119 // Wide Timer 4B 143 #define INT_WTIMER5A 120 // Wide Timer 5A 144 #define INT_WTIMER5B 121 // Wide Timer 5B 145 #define INT_SYSEXC 122 // System Exception (imprecise) 146 #define INT_PECI0 123 // PECI 0 147 #define INT_LPC0 124 // LPC 0 148 #define INT_I2C4 125 // I2C4 149 #define INT_I2C5 126 // I2C5 150 #define INT_GPIOM 127 // GPIO Port M 151 #define INT_GPION 128 // GPIO Port N 152 #define INT_FAN0 130 // FAN 0 153 #define INT_GPIOP0 132 // GPIO Port P (Summary or P0) 154 #define INT_GPIOP1 133 // GPIO Port P1 155 #define INT_GPIOP2 134 // GPIO Port P2 156 #define INT_GPIOP3 135 // GPIO Port P3 157 #define INT_GPIOP4 136 // GPIO Port P4 158 #define INT_GPIOP5 137 // GPIO Port P5 159 #define INT_GPIOP6 138 // GPIO Port P6 160 #define INT_GPIOP7 139 // GPIO Port P7 161 #define INT_GPIOQ0 140 // GPIO Port Q (Summary or Q0) 162 #define INT_GPIOQ1 141 // GPIO Port Q1 163 #define INT_GPIOQ2 142 // GPIO Port Q2 164 #define INT_GPIOQ3 143 // GPIO Port Q3 165 #define INT_GPIOQ4 144 // GPIO Port Q4 166 #define INT_GPIOQ5 145 // GPIO Port Q5 167 #define INT_GPIOQ6 146 // GPIO Port Q6 168 #define INT_GPIOQ7 147 // GPIO Port Q7 169 #define INT_PWM1_0 150 // PWM1 Generator 0 170 #define INT_PWM1_1 151 // PWM1 Generator 1 171 #define INT_PWM1_2 152 // PWM1 Generator 2 172 #define INT_PWM1_3 153 // PWM1 Generator 3 173 #define INT_PWM1_FAULT 154 // PWM1 Fault 174 175 //***************************************************************************** 176 // 177 // The following are defines for the total number of interrupts. 178 // 179 //***************************************************************************** 180 #define NUM_INTERRUPTS 155 181 182 //***************************************************************************** 183 // 184 // The following are defines for the total number of priority levels. 185 // 186 //***************************************************************************** 187 #define NUM_PRIORITY 8 188 #define NUM_PRIORITY_BITS 3 189 190 //***************************************************************************** 191 // 192 // The following definitions are deprecated. 193 // 194 //***************************************************************************** 195 #ifndef DEPRECATED 196 197 //***************************************************************************** 198 // 199 // The following are deprecated defines for the interrupt assignments. 200 // 201 //***************************************************************************** 202 #define INT_SSI 23 // SSI Rx and Tx 203 #define INT_I2C 24 // I2C Master and Slave 204 #define INT_PWM_FAULT 25 // PWM Fault 205 #define INT_PWM0 26 // PWM Generator 0 206 #define INT_PWM1 27 // PWM Generator 1 207 #define INT_PWM2 28 // PWM Generator 2 208 #define INT_QEI 29 // Quadrature Encoder 209 #define INT_ADC0 30 // ADC Sequence 0 210 #define INT_ADC1 31 // ADC Sequence 1 211 #define INT_ADC2 32 // ADC Sequence 2 212 #define INT_ADC3 33 // ADC Sequence 3 213 #define INT_PWM3 61 // PWM Generator 3 214 215 #endif 216 217 #endif // __HW_INTS_H__ 218