1 /** 2 ****************************************************************************** 3 * @file stm32f7xx_hal_pwr.h 4 * @author MCD Application Team 5 * @version V1.0.1 6 * @date 25-June-2015 7 * @brief Header file of PWR HAL module. 8 ****************************************************************************** 9 * @attention 10 * 11 * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> 12 * 13 * Redistribution and use in source and binary forms, with or without modification, 14 * are permitted provided that the following conditions are met: 15 * 1. Redistributions of source code must retain the above copyright notice, 16 * this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright notice, 18 * this list of conditions and the following disclaimer in the documentation 19 * and/or other materials provided with the distribution. 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors 21 * may be used to endorse or promote products derived from this software 22 * without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 34 * 35 ****************************************************************************** 36 */ 37 38 /* Define to prevent recursive inclusion -------------------------------------*/ 39 #ifndef __STM32F7xx_HAL_PWR_H 40 #define __STM32F7xx_HAL_PWR_H 41 42 #ifdef __cplusplus 43 extern "C" { 44 #endif 45 46 /* Includes ------------------------------------------------------------------*/ 47 #include "stm32f7xx_hal_def.h" 48 49 /** @addtogroup STM32F7xx_HAL_Driver 50 * @{ 51 */ 52 53 /** @addtogroup PWR 54 * @{ 55 */ 56 57 /* Exported types ------------------------------------------------------------*/ 58 59 /** @defgroup PWR_Exported_Types PWR Exported Types 60 * @{ 61 */ 62 63 /** 64 * @brief PWR PVD configuration structure definition 65 */ 66 typedef struct { 67 uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level. 68 This parameter can be a value of @ref PWR_PVD_detection_level */ 69 70 uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins. 71 This parameter can be a value of @ref PWR_PVD_Mode */ 72 } PWR_PVDTypeDef; 73 74 /** 75 * @} 76 */ 77 78 /* Exported constants --------------------------------------------------------*/ 79 /** @defgroup PWR_Exported_Constants PWR Exported Constants 80 * @{ 81 */ 82 83 /** @defgroup PWR_PVD_detection_level PWR PVD detection level 84 * @{ 85 */ 86 #define PWR_PVDLEVEL_0 PWR_CR1_PLS_LEV0 87 #define PWR_PVDLEVEL_1 PWR_CR1_PLS_LEV1 88 #define PWR_PVDLEVEL_2 PWR_CR1_PLS_LEV2 89 #define PWR_PVDLEVEL_3 PWR_CR1_PLS_LEV3 90 #define PWR_PVDLEVEL_4 PWR_CR1_PLS_LEV4 91 #define PWR_PVDLEVEL_5 PWR_CR1_PLS_LEV5 92 #define PWR_PVDLEVEL_6 PWR_CR1_PLS_LEV6 93 #define PWR_PVDLEVEL_7 PWR_CR1_PLS_LEV7/* External input analog voltage 94 (Compare internally to VREFINT) */ 95 96 /** 97 * @} 98 */ 99 100 /** @defgroup PWR_PVD_Mode PWR PVD Mode 101 * @{ 102 */ 103 #define PWR_PVD_MODE_NORMAL ((uint32_t)0x00000000) /*!< basic mode is used */ 104 #define PWR_PVD_MODE_IT_RISING ((uint32_t)0x00010001) /*!< External Interrupt Mode with Rising edge trigger detection */ 105 #define PWR_PVD_MODE_IT_FALLING ((uint32_t)0x00010002) /*!< External Interrupt Mode with Falling edge trigger detection */ 106 #define PWR_PVD_MODE_IT_RISING_FALLING ((uint32_t)0x00010003) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */ 107 #define PWR_PVD_MODE_EVENT_RISING ((uint32_t)0x00020001) /*!< Event Mode with Rising edge trigger detection */ 108 #define PWR_PVD_MODE_EVENT_FALLING ((uint32_t)0x00020002) /*!< Event Mode with Falling edge trigger detection */ 109 #define PWR_PVD_MODE_EVENT_RISING_FALLING ((uint32_t)0x00020003) /*!< Event Mode with Rising/Falling edge trigger detection */ 110 /** 111 * @} 112 */ 113 114 /** @defgroup PWR_Regulator_state_in_STOP_mode PWR Regulator state in SLEEP/STOP mode 115 * @{ 116 */ 117 #define PWR_MAINREGULATOR_ON ((uint32_t)0x00000000) 118 #define PWR_LOWPOWERREGULATOR_ON PWR_CR1_LPDS 119 /** 120 * @} 121 */ 122 123 /** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry 124 * @{ 125 */ 126 #define PWR_SLEEPENTRY_WFI ((uint8_t)0x01) 127 #define PWR_SLEEPENTRY_WFE ((uint8_t)0x02) 128 /** 129 * @} 130 */ 131 132 /** @defgroup PWR_STOP_mode_entry PWR STOP mode entry 133 * @{ 134 */ 135 #define PWR_STOPENTRY_WFI ((uint8_t)0x01) 136 #define PWR_STOPENTRY_WFE ((uint8_t)0x02) 137 /** 138 * @} 139 */ 140 141 /** @defgroup PWR_Regulator_Voltage_Scale PWR Regulator Voltage Scale 142 * @{ 143 */ 144 #define PWR_REGULATOR_VOLTAGE_SCALE1 PWR_CR1_VOS 145 #define PWR_REGULATOR_VOLTAGE_SCALE2 PWR_CR1_VOS_1 146 #define PWR_REGULATOR_VOLTAGE_SCALE3 PWR_CR1_VOS_0 147 /** 148 * @} 149 */ 150 151 /** @defgroup PWR_Flag PWR Flag 152 * @{ 153 */ 154 #define PWR_FLAG_WU PWR_CSR1_WUIF 155 #define PWR_FLAG_SB PWR_CSR1_SBF 156 #define PWR_FLAG_PVDO PWR_CSR1_PVDO 157 #define PWR_FLAG_BRR PWR_CSR1_BRR 158 #define PWR_FLAG_VOSRDY PWR_CSR1_VOSRDY 159 /** 160 * @} 161 */ 162 163 /** 164 * @} 165 */ 166 167 /* Exported macro ------------------------------------------------------------*/ 168 /** @defgroup PWR_Exported_Macro PWR Exported Macro 169 * @{ 170 */ 171 172 /** @brief macros configure the main internal regulator output voltage. 173 * @param __REGULATOR__: specifies the regulator output voltage to achieve 174 * a tradeoff between performance and power consumption when the device does 175 * not operate at the maximum frequency (refer to the datasheets for more details). 176 * This parameter can be one of the following values: 177 * @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output Scale 1 mode 178 * @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output Scale 2 mode 179 * @arg PWR_REGULATOR_VOLTAGE_SCALE3: Regulator voltage output Scale 3 mode 180 * @retval None 181 */ 182 #define __HAL_PWR_VOLTAGESCALING_CONFIG(__REGULATOR__) do { \ 183 __IO uint32_t tmpreg; \ 184 MODIFY_REG(PWR->CR1, PWR_CR1_VOS, (__REGULATOR__)); \ 185 /* Delay after an RCC peripheral clock enabling */ \ 186 tmpreg = READ_BIT(PWR->CR1, PWR_CR1_VOS); \ 187 UNUSED(tmpreg); \ 188 } while(0) 189 190 /** @brief Check PWR flag is set or not. 191 * @param __FLAG__: specifies the flag to check. 192 * This parameter can be one of the following values: 193 * @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event 194 * was received on the internal wakeup line in standby mode (RTC alarm (Alarm A or Alarm B), 195 * RTC Tamper event, RTC TimeStamp event or RTC Wakeup)). 196 * @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was 197 * resumed from StandBy mode. 198 * @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled 199 * by the HAL_PWR_EnablePVD() function. The PVD is stopped by Standby mode 200 * For this reason, this bit is equal to 0 after Standby or reset 201 * until the PVDE bit is set. 202 * @arg PWR_FLAG_BRR: Backup regulator ready flag. This bit is not reset 203 * when the device wakes up from Standby mode or by a system reset 204 * or power reset. 205 * @arg PWR_FLAG_VOSRDY: This flag indicates that the Regulator voltage 206 * scaling output selection is ready. 207 * @retval The new state of __FLAG__ (TRUE or FALSE). 208 */ 209 #define __HAL_PWR_GET_FLAG(__FLAG__) ((PWR->CSR1 & (__FLAG__)) == (__FLAG__)) 210 211 /** @brief Clear the PWR's pending flags. 212 * @param __FLAG__: specifies the flag to clear. 213 * This parameter can be one of the following values: 214 * @arg PWR_FLAG_SB: StandBy flag 215 */ 216 #define __HAL_PWR_CLEAR_FLAG(__FLAG__) (PWR->CR1 |= (__FLAG__) << 2) 217 218 /** 219 * @brief Enable the PVD Exti Line 16. 220 * @retval None. 221 */ 222 #define __HAL_PWR_PVD_EXTI_ENABLE_IT() (EXTI->IMR |= (PWR_EXTI_LINE_PVD)) 223 224 /** 225 * @brief Disable the PVD EXTI Line 16. 226 * @retval None. 227 */ 228 #define __HAL_PWR_PVD_EXTI_DISABLE_IT() (EXTI->IMR &= ~(PWR_EXTI_LINE_PVD)) 229 230 /** 231 * @brief Enable event on PVD Exti Line 16. 232 * @retval None. 233 */ 234 #define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() (EXTI->EMR |= (PWR_EXTI_LINE_PVD)) 235 236 /** 237 * @brief Disable event on PVD Exti Line 16. 238 * @retval None. 239 */ 240 #define __HAL_PWR_PVD_EXTI_DISABLE_EVENT() (EXTI->EMR &= ~(PWR_EXTI_LINE_PVD)) 241 242 /** 243 * @brief Enable the PVD Extended Interrupt Rising Trigger. 244 * @retval None. 245 */ 246 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD) 247 248 /** 249 * @brief Disable the PVD Extended Interrupt Rising Trigger. 250 * @retval None. 251 */ 252 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD) 253 254 /** 255 * @brief Enable the PVD Extended Interrupt Falling Trigger. 256 * @retval None. 257 */ 258 #define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD) 259 260 261 /** 262 * @brief Disable the PVD Extended Interrupt Falling Trigger. 263 * @retval None. 264 */ 265 #define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD) 266 267 268 /** 269 * @brief PVD EXTI line configuration: set rising & falling edge trigger. 270 * @retval None. 271 */ 272 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE() __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE(); 273 274 /** 275 * @brief Disable the PVD Extended Interrupt Rising & Falling Trigger. 276 * @retval None. 277 */ 278 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE() __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); 279 280 /** 281 * @brief checks whether the specified PVD Exti interrupt flag is set or not. 282 * @retval EXTI PVD Line Status. 283 */ 284 #define __HAL_PWR_PVD_EXTI_GET_FLAG() (EXTI->PR & (PWR_EXTI_LINE_PVD)) 285 286 /** 287 * @brief Clear the PVD Exti flag. 288 * @retval None. 289 */ 290 #define __HAL_PWR_PVD_EXTI_CLEAR_FLAG() (EXTI->PR = (PWR_EXTI_LINE_PVD)) 291 292 /** 293 * @brief Generates a Software interrupt on PVD EXTI line. 294 * @retval None 295 */ 296 #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() (EXTI->SWIER |= (PWR_EXTI_LINE_PVD)) 297 298 /** 299 * @} 300 */ 301 302 /* Include PWR HAL Extension module */ 303 #include "stm32f7xx_hal_pwr_ex.h" 304 305 /* Exported functions --------------------------------------------------------*/ 306 /** @addtogroup PWR_Exported_Functions PWR Exported Functions 307 * @{ 308 */ 309 310 /** @addtogroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions 311 * @{ 312 */ 313 /* Initialization and de-initialization functions *****************************/ 314 void HAL_PWR_DeInit(void); 315 void HAL_PWR_EnableBkUpAccess(void); 316 void HAL_PWR_DisableBkUpAccess(void); 317 /** 318 * @} 319 */ 320 321 /** @addtogroup PWR_Exported_Functions_Group2 Peripheral Control functions 322 * @{ 323 */ 324 /* Peripheral Control functions **********************************************/ 325 /* PVD configuration */ 326 void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD); 327 void HAL_PWR_EnablePVD(void); 328 void HAL_PWR_DisablePVD(void); 329 330 /* WakeUp pins configuration */ 331 void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinPolarity); 332 void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx); 333 334 /* Low Power modes entry */ 335 void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry); 336 void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry); 337 void HAL_PWR_EnterSTANDBYMode(void); 338 339 /* Power PVD IRQ Handler */ 340 void HAL_PWR_PVD_IRQHandler(void); 341 void HAL_PWR_PVDCallback(void); 342 343 /* Cortex System Control functions *******************************************/ 344 void HAL_PWR_EnableSleepOnExit(void); 345 void HAL_PWR_DisableSleepOnExit(void); 346 void HAL_PWR_EnableSEVOnPend(void); 347 void HAL_PWR_DisableSEVOnPend(void); 348 /** 349 * @} 350 */ 351 352 /** 353 * @} 354 */ 355 356 /* Private types -------------------------------------------------------------*/ 357 /* Private variables ---------------------------------------------------------*/ 358 /* Private constants ---------------------------------------------------------*/ 359 /** @defgroup PWR_Private_Constants PWR Private Constants 360 * @{ 361 */ 362 363 /** @defgroup PWR_PVD_EXTI_Line PWR PVD EXTI Line 364 * @{ 365 */ 366 #define PWR_EXTI_LINE_PVD ((uint32_t)EXTI_IMR_MR16) /*!< External interrupt line 16 Connected to the PVD EXTI Line */ 367 /** 368 * @} 369 */ 370 371 /** 372 * @} 373 */ 374 /* Private macros ------------------------------------------------------------*/ 375 /** @defgroup PWR_Private_Macros PWR Private Macros 376 * @{ 377 */ 378 379 /** @defgroup PWR_IS_PWR_Definitions PWR Private macros to check input parameters 380 * @{ 381 */ 382 #define IS_PWR_WAKEUP_POLARITY(POLARITY) (((POLARITY) == PWR_POLARITY_RISINGEDGE) || \ 383 ((POLARITY) == PWR_POLARITY_FALLINGEDGE)) 384 #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \ 385 ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \ 386 ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \ 387 ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7)) 388 #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_IT_RISING)|| ((MODE) == PWR_PVD_MODE_IT_FALLING) || \ 389 ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING) || \ 390 ((MODE) == PWR_PVD_MODE_EVENT_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING) || \ 391 ((MODE) == PWR_PVD_MODE_NORMAL)) 392 #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \ 393 ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON)) 394 #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE)) 395 #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE)) 396 #define IS_PWR_REGULATOR_VOLTAGE(VOLTAGE) (((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE1) || \ 397 ((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE2) || \ 398 ((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE3)) 399 400 /** 401 * @} 402 */ 403 404 /** 405 * @} 406 */ 407 408 /** 409 * @} 410 */ 411 412 /** 413 * @} 414 */ 415 416 #ifdef __cplusplus 417 } 418 #endif 419 420 421 #endif /* __STM32F7xx_HAL_PWR_H */ 422 423 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 424