1 /*
2 * Copyright (c) 2015 MediaTek Inc.
3 *
4 * Use of this source code is governed by a MIT-style
5 * license that can be found in the LICENSE file or at
6 * https://opensource.org/licenses/MIT
7 */
8 #include <lk/debug.h>
9 #include <stdlib.h>
10 #include <string.h>
11 #include <lk/err.h>
12 #include <lk/reg.h>
13 #include <sys/types.h>
14 #include <kernel/vm.h>
15 #include <platform.h>
16 #include <mt_gic.h>
17 #include <dev/uart.h>
18 #include <arch/arm.h>
19 #include <arch/arm/mmu.h>
20 #include <arch/ops.h>
21 #include <platform/mt_reg_base.h>
22 #include <platform/mt_typedefs.h>
23 #include <platform/mt_gpt.h>
24
25 #define MTK_WDT_MODE TOPRGU_BASE
26
27 struct mmu_initial_mapping mmu_initial_mappings[] = {
28 // XXX needs to be filled in
29
30 /* Note: mapping entry should be 1MB alignment (address and size will be masked to 1MB boundaries in arch/arm/arm/start.S) */
31
32 /* mcusys (peripherals) */
33 {
34 .phys = (uint64_t)0,
35 .virt = (uint32_t)0,
36 .size = 0x40000000,
37 .flags = MMU_INITIAL_MAPPING_FLAG_DEVICE,
38 .name = "mcusys"
39 },
40 /* ram */
41 {
42 .phys = (uint64_t)0x40000000,
43 .virt = (uint32_t)0x40000000,
44 .size = 0xc0000000,
45 .flags = 0,
46 .name = "ram"
47 },
48
49 /* null entry to terminate the list */
50 { 0 }
51 };
52
53 static pmm_arena_t arena = {
54 .name = "dram",
55 .base = MEMBASE,
56 .size = MEMSIZE,
57 .flags = PMM_ARENA_FLAG_KMAP,
58 };
59
platform_init_mmu_mappings(void)60 void platform_init_mmu_mappings(void) {
61 }
62
platform_early_init(void)63 void platform_early_init(void) {
64 uart_init_early();
65
66 platform_init_interrupts();
67
68 gpt_init();
69
70 /* disable WDT */
71 DRV_WriteReg32(MTK_WDT_MODE, 0x22000000);
72
73 pmm_add_arena(&arena);
74 }
75
platform_init(void)76 void platform_init(void) {
77 }
78
79