1// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) 2/* 3 * Copyright (C) Linaro Ltd 2019 - All Rights Reserved 4 * Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> 5 * Copyright (C) 2020 Marek Vasut <marex@denx.de> 6 * Copyright (C) 2022 DH electronics GmbH 7 */ 8 9#include "stm32mp15-pinctrl.dtsi" 10#include "stm32mp15xxac-pinctrl.dtsi" 11#include <dt-bindings/gpio/gpio.h> 12#include <dt-bindings/mfd/st,stpmic1.h> 13 14/ { 15 aliases { 16 spi0 = &qspi; 17 }; 18 19 memory@c0000000 { 20 device_type = "memory"; 21 reg = <0xc0000000 0x40000000>; 22 }; 23 24 reserved-memory { 25 #address-cells = <1>; 26 #size-cells = <1>; 27 ranges; 28 29 mcuram2: mcuram2@10000000 { 30 compatible = "shared-dma-pool"; 31 reg = <0x10000000 0x40000>; 32 no-map; 33 }; 34 35 vdev0vring0: vdev0vring0@10040000 { 36 compatible = "shared-dma-pool"; 37 reg = <0x10040000 0x1000>; 38 no-map; 39 }; 40 41 vdev0vring1: vdev0vring1@10041000 { 42 compatible = "shared-dma-pool"; 43 reg = <0x10041000 0x1000>; 44 no-map; 45 }; 46 47 vdev0buffer: vdev0buffer@10042000 { 48 compatible = "shared-dma-pool"; 49 reg = <0x10042000 0x4000>; 50 no-map; 51 }; 52 53 mcuram: mcuram@30000000 { 54 compatible = "shared-dma-pool"; 55 reg = <0x30000000 0x40000>; 56 no-map; 57 }; 58 59 retram: retram@38000000 { 60 compatible = "shared-dma-pool"; 61 reg = <0x38000000 0x10000>; 62 no-map; 63 }; 64 }; 65}; 66 67&crc1 { 68 status = "okay"; 69}; 70 71&dts { 72 status = "okay"; 73}; 74 75&i2c4 { 76 pinctrl-names = "default"; 77 pinctrl-0 = <&i2c4_pins_a>; 78 i2c-scl-rising-time-ns = <185>; 79 i2c-scl-falling-time-ns = <20>; 80 status = "okay"; 81 /delete-property/dmas; 82 /delete-property/dma-names; 83 84 pmic: stpmic@33 { 85 compatible = "st,stpmic1"; 86 reg = <0x33>; 87 interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>; 88 interrupt-controller; 89 #interrupt-cells = <2>; 90 status = "okay"; 91 92 regulators { 93 compatible = "st,stpmic1-regulators"; 94 95 ldo1-supply = <&v3v3>; 96 ldo2-supply = <&v3v3>; 97 ldo3-supply = <&vdd_ddr>; 98 ldo5-supply = <&v3v3>; 99 ldo6-supply = <&v3v3>; 100 pwr_sw1-supply = <&bst_out>; 101 pwr_sw2-supply = <&bst_out>; 102 103 vddcore: buck1 { 104 regulator-name = "vddcore"; 105 regulator-min-microvolt = <1200000>; 106 regulator-max-microvolt = <1350000>; 107 regulator-always-on; 108 regulator-initial-mode = <0>; 109 regulator-over-current-protection; 110 }; 111 112 vdd_ddr: buck2 { 113 regulator-name = "vdd_ddr"; 114 regulator-min-microvolt = <1350000>; 115 regulator-max-microvolt = <1350000>; 116 regulator-always-on; 117 regulator-initial-mode = <0>; 118 regulator-over-current-protection; 119 }; 120 121 vdd: buck3 { 122 regulator-name = "vdd"; 123 regulator-min-microvolt = <2900000>; 124 regulator-max-microvolt = <2900000>; 125 regulator-always-on; 126 regulator-initial-mode = <0>; 127 regulator-over-current-protection; 128 }; 129 130 v3v3: buck4 { 131 regulator-name = "v3v3"; 132 regulator-min-microvolt = <3300000>; 133 regulator-max-microvolt = <3300000>; 134 regulator-always-on; 135 regulator-over-current-protection; 136 regulator-initial-mode = <0>; 137 }; 138 139 vdda: ldo1 { 140 regulator-name = "vdda"; 141 regulator-min-microvolt = <2900000>; 142 regulator-max-microvolt = <2900000>; 143 interrupts = <IT_CURLIM_LDO1 0>; 144 }; 145 146 v2v8: ldo2 { 147 regulator-name = "v2v8"; 148 regulator-min-microvolt = <2800000>; 149 regulator-max-microvolt = <2800000>; 150 interrupts = <IT_CURLIM_LDO2 0>; 151 }; 152 153 vtt_ddr: ldo3 { 154 regulator-name = "vtt_ddr"; 155 regulator-min-microvolt = <500000>; 156 regulator-max-microvolt = <750000>; 157 regulator-always-on; 158 regulator-over-current-protection; 159 }; 160 161 vdd_usb: ldo4 { 162 regulator-name = "vdd_usb"; 163 interrupts = <IT_CURLIM_LDO4 0>; 164 }; 165 166 vdd_sd: ldo5 { 167 regulator-name = "vdd_sd"; 168 regulator-min-microvolt = <2900000>; 169 regulator-max-microvolt = <2900000>; 170 interrupts = <IT_CURLIM_LDO5 0>; 171 regulator-boot-on; 172 }; 173 174 v1v8: ldo6 { 175 regulator-name = "v1v8"; 176 regulator-min-microvolt = <1800000>; 177 regulator-max-microvolt = <1800000>; 178 interrupts = <IT_CURLIM_LDO6 0>; 179 regulator-enable-ramp-delay = <300000>; 180 }; 181 182 vref_ddr: vref_ddr { 183 regulator-name = "vref_ddr"; 184 regulator-always-on; 185 }; 186 187 bst_out: boost { 188 regulator-name = "bst_out"; 189 interrupts = <IT_OCP_BOOST 0>; 190 }; 191 192 vbus_otg: pwr_sw1 { 193 regulator-name = "vbus_otg"; 194 interrupts = <IT_OCP_OTG 0>; 195 regulator-active-discharge = <1>; 196 }; 197 198 vbus_sw: pwr_sw2 { 199 regulator-name = "vbus_sw"; 200 interrupts = <IT_OCP_SWOUT 0>; 201 regulator-active-discharge = <1>; 202 }; 203 }; 204 205 onkey { 206 compatible = "st,stpmic1-onkey"; 207 interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 1>; 208 interrupt-names = "onkey-falling", "onkey-rising"; 209 status = "okay"; 210 }; 211 212 watchdog { 213 compatible = "st,stpmic1-wdt"; 214 status = "disabled"; 215 }; 216 }; 217 218 eeprom@53 { 219 compatible = "atmel,24c02"; 220 reg = <0x53>; 221 pagesize = <16>; 222 }; 223}; 224 225&ipcc { 226 status = "okay"; 227}; 228 229&iwdg2 { 230 timeout-sec = <32>; 231 status = "okay"; 232 secure-status = "disabled"; 233}; 234 235&m4_rproc { 236 memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>, 237 <&vdev0vring1>, <&vdev0buffer>; 238 mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>; 239 mbox-names = "vq0", "vq1", "shutdown"; 240 interrupt-parent = <&exti>; 241 interrupts = <68 1>; 242 status = "okay"; 243}; 244 245&pwr_regulators { 246 vdd-supply = <&vdd>; 247 vdd_3v3_usbfs-supply = <&vdd_usb>; 248}; 249 250&qspi { 251 pinctrl-names = "default", "sleep"; 252 pinctrl-0 = <&qspi_clk_pins_a &qspi_bk1_pins_a>; 253 pinctrl-1 = <&qspi_clk_sleep_pins_a &qspi_bk1_sleep_pins_a>; 254 reg = <0x58003000 0x1000>, <0x70000000 0x200000>; 255 #address-cells = <1>; 256 #size-cells = <0>; 257 status = "okay"; 258 259 flash0: flash@0 { 260 compatible = "jedec,spi-nor"; 261 reg = <0>; 262 spi-rx-bus-width = <4>; 263 spi-max-frequency = <50000000>; 264 #address-cells = <1>; 265 #size-cells = <1>; 266 }; 267}; 268 269&rcc { 270 status = "okay"; 271}; 272 273&rng1 { 274 status = "okay"; 275}; 276 277&rtc { 278 status = "okay"; 279}; 280