1 /* SPDX-License-Identifier: BSD-2-Clause */ 2 /* 3 * Copyright (c) 2018, Linaro Limited 4 */ 5 6 #ifndef __MM_GENERIC_RAM_LAYOUT_H 7 #define __MM_GENERIC_RAM_LAYOUT_H 8 9 #include <util.h> 10 11 /* 12 * Generic RAM layout configuration directives 13 * 14 * Mandatory directives: 15 * CFG_TZDRAM_START 16 * CFG_TZDRAM_SIZE 17 * CFG_SHMEM_START 18 * CFG_SHMEM_SIZE 19 * 20 * Optional directives: 21 * CFG_TEE_LOAD_ADDR If defined sets TEE_LOAD_ADDR. If not, TEE_LOAD_ADDR 22 * is set by the platform or defaults to TEE_RAM_START. 23 * CFG_TEE_RAM_VA_SIZE Some platforms may have specific needs 24 * 25 * Optional directives when pager is enabled: 26 * CFG_TZSRAM_START If no set, emulated at CFG_TZDRAM_START 27 * CFG_TZSRAM_SIZE Default to CFG_CORE_TZSRAM_EMUL_SIZE 28 * 29 * Optional directive when CFG_SECURE_DATA_PATH is enabled: 30 * CFG_TEE_SDP_MEM_SIZE If CFG_TEE_SDP_MEM_BASE is not defined, SDP test 31 * memory byte size can be set by CFG_TEE_SDP_MEM_SIZE. 32 * 33 * This header file produces the following generic macros upon the mandatory 34 * and optional configuration directives listed above: 35 * 36 * TEE_RAM_START TEE core RAM physical base address 37 * TEE_RAM_VA_SIZE TEE core virtual memory address range size 38 * TEE_RAM_PH_SIZE TEE core physical RAM byte size 39 * TA_RAM_START TA contexts/pagestore RAM physical base address 40 * TA_RAM_SIZE TA contexts/pagestore RAM byte size 41 * TEE_SHMEM_START Non-secure static shared memory physical base address 42 * TEE_SHMEM_SIZE Non-secure static shared memory byte size 43 * 44 * TZDRAM_BASE Main/external secure RAM base address 45 * TZDRAM_SIZE Main/external secure RAM byte size 46 * TZSRAM_BASE On-chip secure RAM base address, required by pager. 47 * TZSRAM_SIZE On-chip secure RAM byte size, required by pager. 48 * 49 * TEE_LOAD_ADDR Only defined here if CFG_TEE_LOAD_ADDR is defined. 50 * Otherwise we expect the platform_config.h to define it 51 * unless which LEE_LOAD_ADDR defaults to TEE_RAM_START. 52 * 53 * TEE_RAM_VA_SIZE Set to CFG_TEE_RAM_VA_SIZE or defaults to 54 * CORE_MMU_PGDIR_SIZE. 55 * 56 * TEE_SDP_TEST_MEM_BASE Define if a SDP memory pool is required and none set. 57 * Always defined in the inner top (high addresses) 58 * of CFG_TZDRAM_START/_SIZE. 59 * TEE_SDP_TEST_MEM_SIZE Set to CFG_TEE_SDP_MEM_SIZE or a default size. 60 * 61 * ---------------------------------------------------------------------------- 62 * TEE RAM layout without CFG_WITH_PAGER 63 *_ 64 * +----------------------------------+ <-- CFG_TZDRAM_START 65 * | TEE core secure RAM (TEE_RAM) | 66 * +----------------------------------+ 67 * | Trusted Application RAM (TA_RAM) | 68 * +----------------------------------+ 69 * | SDP test memory (optional) | 70 * +----------------------------------+ <-- CFG_TZDRAM_START + CFG_TZDRAM_SIZE 71 * 72 * +----------------------------------+ <-- CFG_SHMEM_START 73 * | Non-secure static SHM | 74 * +----------------------------------+ <-- CFG_SHMEM_START + CFG_SHMEM_SIZE 75 * 76 * ---------------------------------------------------------------------------- 77 * TEE RAM layout with CFG_WITH_PAGER=y and undefined CFG_TZSRAM_START/_SIZE 78 * 79 * +----------------------------------+ <-- CFG_TZDRAM_START 80 * | TEE core secure RAM (TEE_RAM) | | | CFG_CORE_TZSRAM_EMUL_SIZE 81 * +----------------------------------+ --|-' 82 * | reserved (for kasan) | | TEE_RAM_VA_SIZE 83 * +----------------------------------+ --' 84 * | TA RAM / Pagestore (TA_RAM) | 85 * +----------------------------------+ <---- align with CORE_MMU_PGDIR_SIZE 86 * +----------------------------------+ <-- 87 * | SDP test memory (optional) | | CFG_TEE_SDP_MEM_SIZE 88 * +----------------------------------+ <-+ CFG_TZDRAM_START + CFG_TZDRAM_SIZE 89 * 90 * +----------------------------------+ <-- CFG_SHMEM_START 91 * | Non-secure static SHM | | 92 * +----------------------------------+ v CFG_SHMEM_SIZE 93 * 94 * ---------------------------------------------------------------------------- 95 * TEE RAM layout with CFG_WITH_PAGER=y and define CFG_TZSRAM_START/_SIZE 96 * 97 * +----------------------------------+ <-- CFG_TZSRAM_START 98 * | TEE core secure RAM (TEE_RAM) | | CFG_TZSRAM_SIZE 99 * +----------------------------------+ --' 100 * 101 * +----------------------------------+ <- CFG_TZDRAM_START 102 * | TA RAM / Pagestore (TA_RAM) | 103 * |----------------------------------+ <---- align with CORE_MMU_PGDIR_SIZE 104 * |----------------------------------+ <-- 105 * | SDP test memory (optional) | | CFG_TEE_SDP_MEM_SIZE 106 * +----------------------------------+ <-+ CFG_TZDRAM_START + CFG_TZDRAM_SIZE 107 * 108 * +----------------------------------+ <-- CFG_SHMEM_START 109 * | Non-secure static SHM | | 110 * +----------------------------------+ v CFG_SHMEM_SIZE 111 */ 112 113 #ifdef CFG_TEE_LOAD_ADDR 114 #define TEE_LOAD_ADDR CFG_TEE_LOAD_ADDR 115 #else 116 /* Platform specific platform_config.h may set TEE_LOAD_ADDR */ 117 #endif 118 119 #ifdef CFG_TEE_RAM_VA_SIZE 120 #define TEE_RAM_VA_SIZE CFG_TEE_RAM_VA_SIZE 121 #else 122 #define TEE_RAM_VA_SIZE CORE_MMU_PGDIR_SIZE 123 #endif 124 125 #ifdef CFG_SHMEM_SIZE 126 #define TEE_SHMEM_SIZE CFG_SHMEM_SIZE 127 #endif 128 129 #ifdef CFG_SHMEM_START 130 #define TEE_SHMEM_START CFG_SHMEM_START 131 #ifndef CFG_SHMEM_SIZE 132 #error CFG_SHMEM_START mandates CFG_SHMEM_SIZE 133 #endif 134 #endif 135 136 #if defined(CFG_TZSRAM_START) 137 #define TZSRAM_BASE CFG_TZSRAM_START 138 #define TZSRAM_SIZE CFG_TZSRAM_SIZE 139 #endif 140 141 #ifdef CFG_TZDRAM_START 142 #if !defined(CFG_WITH_PAGER) || defined(CFG_TZSRAM_START) 143 #define TZDRAM_BASE CFG_TZDRAM_START 144 #define TZDRAM_SIZE CFG_TZDRAM_SIZE 145 #else 146 #define TZSRAM_BASE CFG_TZDRAM_START 147 #define TZSRAM_SIZE CFG_CORE_TZSRAM_EMUL_SIZE 148 #define TZDRAM_BASE ROUNDUP(TZSRAM_BASE + TZSRAM_SIZE, \ 149 TEE_RAM_VA_SIZE) 150 #define TZDRAM_SIZE (CFG_TZDRAM_START + (CFG_TZDRAM_SIZE - \ 151 TZDRAM_BASE)) 152 #endif 153 154 #ifdef CFG_WITH_PAGER 155 #define TEE_RAM_START TZSRAM_BASE 156 #define TEE_RAM_PH_SIZE TZSRAM_SIZE 157 #define TA_RAM_START ROUNDUP(TZDRAM_BASE, CORE_MMU_PGDIR_SIZE) 158 #else 159 #define TEE_RAM_START TZDRAM_BASE 160 #define TEE_RAM_PH_SIZE TEE_RAM_VA_SIZE 161 #define TA_RAM_START ROUNDUP(TZDRAM_BASE + TEE_RAM_VA_SIZE, \ 162 SMALL_PAGE_SIZE) 163 #endif /*CFG_WITH_PAGER*/ 164 165 #define TA_RAM_SIZE (ROUNDDOWN(TZDRAM_BASE + (TZDRAM_SIZE - \ 166 TEE_SDP_TEST_MEM_SIZE), \ 167 SMALL_PAGE_SIZE) - TA_RAM_START) 168 #endif /*CFG_TZDRAM_START*/ 169 170 /* 171 * Secure data path test memory pool 172 * - If SDP is disabled, no SDP test memory needed. 173 * - If SDP is enabled, if CFG_TEE_SDP_MEM_BASE, SDP test pool is not needed. 174 * - If SDP is enabled and CFG_TEE_SDP_MEM_BASE not defined, a SDP test pool 175 * is defined at the end of the secure RAM. CFG_TEE_SDP_MEM_SIZE can set 176 * its size otherwise it defaults to 4MB. 177 */ 178 #if !defined(CFG_SECURE_DATA_PATH) || defined(CFG_TEE_SDP_MEM_BASE) 179 #define TEE_SDP_TEST_MEM_SIZE 0 180 #else 181 #ifdef CFG_TEE_SDP_MEM_SIZE 182 #define TEE_SDP_TEST_MEM_SIZE CFG_TEE_SDP_MEM_SIZE 183 #else 184 #define TEE_SDP_TEST_MEM_SIZE SIZE_4M 185 #endif 186 #define TEE_SDP_TEST_MEM_BASE (CFG_TZDRAM_START + (CFG_TZDRAM_SIZE - \ 187 TEE_SDP_TEST_MEM_SIZE)) 188 #endif 189 190 #endif /*__MM_GENERIC_RAM_LAYOUT_H*/ 191 192