1 // SPDX-License-Identifier: BSD-2-Clause
2 /*
3  * Copyright (c) 2018, Linaro Limited
4  */
5 
6 #include <gen-asm-defines.h>
7 #include "imx_pm.h"
8 
9 DEFINES
10 {
11 	DEFINE(PM_INFO_MX7_M4_RESERVE0_OFF,
12 	       offsetof(struct imx7_pm_info, m4_reserve0));
13 	DEFINE(PM_INFO_MX7_M4_RESERVE1_OFF,
14 	       offsetof(struct imx7_pm_info, m4_reserve1));
15 	DEFINE(PM_INFO_MX7_M4_RESERVE2_OFF,
16 	       offsetof(struct imx7_pm_info, m4_reserve2));
17 	DEFINE(PM_INFO_MX7_VBASE_OFF, offsetof(struct imx7_pm_info, va_base));
18 	DEFINE(PM_INFO_MX7_PBASE_OFF, offsetof(struct imx7_pm_info, pa_base));
19 	DEFINE(PM_INFO_MX7_ENTRY_OFF, offsetof(struct imx7_pm_info, entry));
20 	DEFINE(PM_INFO_MX7_RESUME_ADDR_OFF,
21 	       offsetof(struct imx7_pm_info, tee_resume));
22 	DEFINE(PM_INFO_MX7_DDR_TYPE_OFF,
23 	       offsetof(struct imx7_pm_info, ddr_type));
24 	DEFINE(PM_INFO_MX7_SIZE_OFF,
25 	       offsetof(struct imx7_pm_info, pm_info_size));
26 	DEFINE(PM_INFO_MX7_DDRC_P_OFF,
27 	       offsetof(struct imx7_pm_info, ddrc_pa_base));
28 	DEFINE(PM_INFO_MX7_DDRC_V_OFF,
29 	       offsetof(struct imx7_pm_info, ddrc_va_base));
30 	DEFINE(PM_INFO_MX7_DDRC_PHY_P_OFF,
31 	       offsetof(struct imx7_pm_info, ddrc_phy_pa_base));
32 	DEFINE(PM_INFO_MX7_DDRC_PHY_V_OFF,
33 	       offsetof(struct imx7_pm_info, ddrc_phy_va_base));
34 	DEFINE(PM_INFO_MX7_SRC_P_OFF,
35 	       offsetof(struct imx7_pm_info, src_pa_base));
36 	DEFINE(PM_INFO_MX7_SRC_V_OFF,
37 	       offsetof(struct imx7_pm_info, src_va_base));
38 	DEFINE(PM_INFO_MX7_IOMUXC_GPR_P_OFF,
39 	       offsetof(struct imx7_pm_info, iomuxc_gpr_pa_base));
40 	DEFINE(PM_INFO_MX7_IOMUXC_GPR_V_OFF,
41 	       offsetof(struct imx7_pm_info, iomuxc_gpr_va_base));
42 	DEFINE(PM_INFO_MX7_CCM_P_OFF,
43 	       offsetof(struct imx7_pm_info, ccm_pa_base));
44 	DEFINE(PM_INFO_MX7_CCM_V_OFF,
45 	       offsetof(struct imx7_pm_info, ccm_va_base));
46 	DEFINE(PM_INFO_MX7_GPC_P_OFF,
47 	       offsetof(struct imx7_pm_info, gpc_pa_base));
48 	DEFINE(PM_INFO_MX7_GPC_V_OFF,
49 	       offsetof(struct imx7_pm_info, gpc_va_base));
50 	DEFINE(PM_INFO_MX7_SNVS_P_OFF,
51 	       offsetof(struct imx7_pm_info, snvs_pa_base));
52 	DEFINE(PM_INFO_MX7_SNVS_V_OFF,
53 	       offsetof(struct imx7_pm_info, snvs_va_base));
54 	DEFINE(PM_INFO_MX7_ANATOP_P_OFF,
55 	       offsetof(struct imx7_pm_info, anatop_pa_base));
56 	DEFINE(PM_INFO_MX7_ANATOP_V_OFF,
57 	       offsetof(struct imx7_pm_info, anatop_va_base));
58 	DEFINE(PM_INFO_MX7_LPSR_P_OFF,
59 	       offsetof(struct imx7_pm_info, lpsr_pa_base));
60 	DEFINE(PM_INFO_MX7_LPSR_V_OFF,
61 	       offsetof(struct imx7_pm_info, lpsr_va_base));
62 	DEFINE(PM_INFO_MX7_GIC_DIST_P_OFF,
63 	       offsetof(struct imx7_pm_info, gic_pa_base));
64 	DEFINE(PM_INFO_MX7_GIC_DIST_V_OFF,
65 	       offsetof(struct imx7_pm_info, gic_va_base));
66 	DEFINE(PM_INFO_MX7_TTBR0_OFF, offsetof(struct imx7_pm_info, ttbr0));
67 	DEFINE(PM_INFO_MX7_TTBR1_OFF, offsetof(struct imx7_pm_info, ttbr1));
68 	DEFINE(PM_INFO_MX7_NUM_ONLINE_CPUS_OFF,
69 	       offsetof(struct imx7_pm_info, num_online_cpus));
70 	DEFINE(PM_INFO_MX7_NUM_LPI_CPUS_OFF,
71 	       offsetof(struct imx7_pm_info, num_lpi_cpus));
72 	DEFINE(PM_INFO_MX7_VAL_OFF, offsetof(struct imx7_pm_info, val));
73 	DEFINE(PM_INFO_MX7_FLAG0_OFF, offsetof(struct imx7_pm_info, flag0));
74 	DEFINE(PM_INFO_MX7_FLAG1_OFF, offsetof(struct imx7_pm_info, flag1));
75 	DEFINE(PM_INFO_MX7_DDRC_REG_NUM_OFF,
76 	       offsetof(struct imx7_pm_info, ddrc_num));
77 	DEFINE(PM_INFO_MX7_DDRC_REG_OFF,
78 	       offsetof(struct imx7_pm_info, ddrc_val));
79 	DEFINE(PM_INFO_MX7_DDRC_PHY_REG_NUM_OFF,
80 	       offsetof(struct imx7_pm_info, ddrc_phy_num));
81 	DEFINE(PM_INFO_MX7_DDRC_PHY_REG_OFF,
82 	       offsetof(struct imx7_pm_info, ddrc_phy_val));
83 }
84