1PLATFORM_FLAVOR ?= mt8173
2
3CFG_ARM64_core ?= y
4
5include core/arch/arm/cpu/cortex-armv8-0.mk
6
7$(call force,CFG_8250_UART,y)
8$(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y)
9$(call force,CFG_WITH_ARM_TRUSTED_FW,y)
10
11# default DRAM base address
12CFG_DRAM_BASE ?= 0x40000000
13
14# default DRAM size 1 GiB
15CFG_DRAM_SIZE ?= 0x40000000
16
17ifeq ($(PLATFORM_FLAVOR),mt8173)
18# 2**1 = 2 cores per cluster
19$(call force,CFG_TEE_CORE_NB_CORE,4)
20$(call force,CFG_CORE_CLUSTER_SHIFT,1)
21CFG_TZDRAM_START ?= 0xbe000000
22CFG_TZDRAM_SIZE ?= 0x01e00000
23CFG_SHMEM_START ?= 0xbfe00000
24CFG_SHMEM_SIZE ?= 0x00200000
25endif
26
27ifeq ($(PLATFORM_FLAVOR),mt8175)
28$(call force,CFG_TEE_CORE_NB_CORE,4)
29$(call force,CFG_CORE_CLUSTER_SHIFT,2)
30$(call force,CFG_ARM_GICV3,y)
31$(call force,CFG_GIC,y)
32CFG_TZDRAM_START ?= 0x43200000
33CFG_TZDRAM_SIZE ?=  0x00a00000
34CFG_SHMEM_START ?= ($(CFG_TZDRAM_START) + $(CFG_TZDRAM_SIZE))
35CFG_SHMEM_SIZE ?= 0x00200000
36endif
37
38ifeq ($(PLATFORM_FLAVOR),mt8516)
39$(call force,CFG_TEE_CORE_NB_CORE,4)
40$(call force,CFG_CORE_CLUSTER_SHIFT,2)
41CFG_TZDRAM_START ?= 0x4fd00000
42CFG_TZDRAM_SIZE ?=  0x00300000
43CFG_SHMEM_START ?= ($(CFG_TZDRAM_START) + $(CFG_TZDRAM_SIZE))
44CFG_SHMEM_SIZE ?= 0x00200000
45endif
46
47ifeq ($(PLATFORM_FLAVOR),mt8183)
48$(call force,CFG_TEE_CORE_NB_CORE,8)
49$(call force,CFG_CORE_CLUSTER_SHIFT,2)
50$(call force,CFG_ARM_GICV3,y)
51$(call force,CFG_GIC,y)
52CFG_TZDRAM_START ?= 0x4fd00000
53CFG_TZDRAM_SIZE ?=  0x00300000
54CFG_SHMEM_START ?= ($(CFG_TZDRAM_START) + $(CFG_TZDRAM_SIZE))
55CFG_SHMEM_SIZE ?= 0x00200000
56endif
57
58ifeq ($(PLATFORM_FLAVOR),mt8195)
59$(call force,CFG_TEE_CORE_NB_CORE,8)
60$(call force,CFG_CORE_CLUSTER_SHIFT,2)
61$(call force,CFG_ARM_GICV3,y)
62$(call force,CFG_GIC,y)
63$(call force,CFG_CORE_ARM64_PA_BITS,36)
64CFG_TZDRAM_START ?= 0x43200000
65CFG_TZDRAM_SIZE ?=  0x00a00000
66CFG_SHMEM_START ?= ($(CFG_TZDRAM_START) + $(CFG_TZDRAM_SIZE))
67CFG_SHMEM_SIZE ?= 0x00200000
68endif
69