1PLATFORM_FLAVOR ?= zc702 2 3include core/arch/arm/cpu/cortex-a9.mk 4 5$(call force,CFG_TEE_CORE_NB_CORE,2) 6$(call force,CFG_ARM32_core,y) 7$(call force,CFG_GIC,y) 8$(call force,CFG_CDNS_UART,y) 9$(call force,CFG_WITH_SOFTWARE_PRNG,y) 10$(call force,CFG_PL310,y) 11$(call force,CFG_PL310_LOCKED,y) 12$(call force,CFG_SECURE_TIME_SOURCE_REE,y) 13 14# Xilinx Zynq-7000's Cortex-A9 core has been configured with Non-maskable FIQ 15# (NMFI) support. This means that FIQ interrupts cannot be used in system 16# designs as atomic contexts cannot mask FIQ out. 17$(call force,CFG_CORE_WORKAROUND_ARM_NMFI,y) 18 19CFG_BOOT_SYNC_CPU ?= y 20CFG_BOOT_SECONDARY_REQUEST ?= y 21CFG_CRYPTO_SIZE_OPTIMIZATION ?= n 22CFG_ENABLE_SCTLR_RR ?= y 23