1 /* SPDX-License-Identifier: BSD-2-Clause */ 2 /* 3 * Copyright (c) 2018, Linaro Limited 4 * Copyright 2022 NXP 5 */ 6 7 #ifndef __MM_GENERIC_RAM_LAYOUT_H 8 #define __MM_GENERIC_RAM_LAYOUT_H 9 10 #include <util.h> 11 12 /* 13 * Generic RAM layout configuration directives 14 * 15 * Mandatory directives: 16 * CFG_TDDRAM_START 17 * CFG_TDDRAM_SIZE 18 * CFG_SHMEM_START 19 * CFG_SHMEM_SIZE 20 * 21 * Optional directives: 22 * CFG_TEE_LOAD_ADDR If defined sets TEE_LOAD_ADDR. If not, TEE_LOAD_ADDR 23 * is set by the platform or defaults to TEE_RAM_START. 24 * CFG_TEE_RAM_VA_SIZE Some platforms may have specific needs 25 * 26 * Optional directives when pager is enabled: 27 * CFG_TDSRAM_START If no set, emulated at CFG_TDDRAM_START 28 * CFG_TDSRAM_SIZE Default to CFG_CORE_TDSRAM_EMUL_SIZE 29 * 30 * Optional directive when CFG_SECURE_DATA_PATH is enabled: 31 * CFG_TEE_SDP_MEM_SIZE If CFG_TEE_SDP_MEM_BASE is not defined, SDP test 32 * memory byte size can be set by CFG_TEE_SDP_MEM_SIZE. 33 * 34 * This header file produces the following generic macros upon the mandatory 35 * and optional configuration directives listed above: 36 * 37 * TEE_RAM_START TEE core RAM physical base address 38 * TEE_RAM_VA_SIZE TEE core virtual memory address range size 39 * TEE_RAM_PH_SIZE TEE core physical RAM byte size 40 * TA_RAM_START TA contexts/pagestore RAM physical base address 41 * TA_RAM_SIZE TA contexts/pagestore RAM byte size 42 * TEE_SHMEM_START Non-secure static shared memory physical base address 43 * TEE_SHMEM_SIZE Non-secure static shared memory byte size 44 * 45 * TDDRAM_BASE Main/external secure RAM base address 46 * TDDRAM_SIZE Main/external secure RAM byte size 47 * TDSRAM_BASE On-chip secure RAM base address, required by pager. 48 * TDSRAM_SIZE On-chip secure RAM byte size, required by pager. 49 * 50 * TEE_LOAD_ADDR Only defined here if CFG_TEE_LOAD_ADDR is defined. 51 * Otherwise we expect the platform_config.h to define it 52 * unless which LEE_LOAD_ADDR defaults to TEE_RAM_START. 53 * 54 * TEE_RAM_VA_SIZE Set to CFG_TEE_RAM_VA_SIZE or defaults to 55 * CORE_MMU_PGDIR_SIZE. 56 * 57 * TEE_SDP_TEST_MEM_BASE Define if a SDP memory pool is required and none set. 58 * Always defined in the inner top (high addresses) 59 * of CFG_TDDRAM_START/_SIZE. 60 * TEE_SDP_TEST_MEM_SIZE Set to CFG_TEE_SDP_MEM_SIZE or a default size. 61 * 62 * ---------------------------------------------------------------------------- 63 * TEE RAM layout without CFG_WITH_PAGER 64 *_ 65 * +----------------------------------+ <-- CFG_TDDRAM_START 66 * | TEE core secure RAM (TEE_RAM) | 67 * +----------------------------------+ 68 * | Trusted Application RAM (TA_RAM) | 69 * +----------------------------------+ 70 * | SDP test memory (optional) | 71 * +----------------------------------+ <-- CFG_TDDRAM_START + CFG_TDDRAM_SIZE 72 * 73 * +----------------------------------+ <-- CFG_SHMEM_START 74 * | Non-secure static SHM | 75 * +----------------------------------+ <-- CFG_SHMEM_START + CFG_SHMEM_SIZE 76 * 77 * ---------------------------------------------------------------------------- 78 * TEE RAM layout with CFG_WITH_PAGER=y and undefined CFG_TDSRAM_START/_SIZE 79 * 80 * +----------------------------------+ <-- CFG_TDDRAM_START 81 * | TEE core secure RAM (TEE_RAM) | | | CFG_CORE_TDSRAM_EMUL_SIZE 82 * +----------------------------------+ --|-' 83 * | reserved (for kasan) | | TEE_RAM_VA_SIZE 84 * +----------------------------------+ --' 85 * | TA RAM / Pagestore (TA_RAM) | 86 * +----------------------------------+ <---- align with CORE_MMU_PGDIR_SIZE 87 * +----------------------------------+ <-- 88 * | SDP test memory (optional) | | CFG_TEE_SDP_MEM_SIZE 89 * +----------------------------------+ <-+ CFG_TDDRAM_START + CFG_TDDRAM_SIZE 90 * 91 * +----------------------------------+ <-- CFG_SHMEM_START 92 * | Non-secure static SHM | | 93 * +----------------------------------+ v CFG_SHMEM_SIZE 94 * 95 * ---------------------------------------------------------------------------- 96 * TEE RAM layout with CFG_WITH_PAGER=y and define CFG_TDSRAM_START/_SIZE 97 * 98 * +----------------------------------+ <-- CFG_TDSRAM_START 99 * | TEE core secure RAM (TEE_RAM) | | CFG_TDSRAM_SIZE 100 * +----------------------------------+ --' 101 * 102 * +----------------------------------+ <- CFG_TDDRAM_START 103 * | TA RAM / Pagestore (TA_RAM) | 104 * |----------------------------------+ <---- align with CORE_MMU_PGDIR_SIZE 105 * |----------------------------------+ <-- 106 * | SDP test memory (optional) | | CFG_TEE_SDP_MEM_SIZE 107 * +----------------------------------+ <-+ CFG_TDDRAM_START + CFG_TDDRAM_SIZE 108 * 109 * +----------------------------------+ <-- CFG_SHMEM_START 110 * | Non-secure static SHM | | 111 * +----------------------------------+ v CFG_SHMEM_SIZE 112 */ 113 114 #ifdef CFG_TEE_LOAD_ADDR 115 #define TEE_LOAD_ADDR CFG_TEE_LOAD_ADDR 116 #else 117 /* Platform specific platform_config.h may set TEE_LOAD_ADDR */ 118 #endif 119 120 #ifdef CFG_TEE_RAM_VA_SIZE 121 #define TEE_RAM_VA_SIZE CFG_TEE_RAM_VA_SIZE 122 #else 123 #define TEE_RAM_VA_SIZE CORE_MMU_PGDIR_SIZE 124 #endif 125 126 #ifdef CFG_SHMEM_SIZE 127 #define TEE_SHMEM_SIZE CFG_SHMEM_SIZE 128 #endif 129 130 #ifdef CFG_SHMEM_START 131 #define TEE_SHMEM_START CFG_SHMEM_START 132 #ifndef CFG_SHMEM_SIZE 133 #error CFG_SHMEM_START mandates CFG_SHMEM_SIZE 134 #endif 135 #endif 136 137 #if defined(CFG_TDSRAM_START) 138 #define TDSRAM_BASE CFG_TDSRAM_START 139 #define TDSRAM_SIZE CFG_TDSRAM_SIZE 140 #endif 141 142 #ifdef CFG_TDDRAM_START 143 #if !defined(CFG_WITH_PAGER) || defined(CFG_TDSRAM_START) 144 #define TDDRAM_BASE CFG_TDDRAM_START 145 #define TDDRAM_SIZE CFG_TDDRAM_SIZE 146 #else 147 #define TDSRAM_BASE CFG_TDDRAM_START 148 #define TDSRAM_SIZE CFG_CORE_TDSRAM_EMUL_SIZE 149 #define TDDRAM_BASE ROUNDUP(TDSRAM_BASE + TDSRAM_SIZE, \ 150 TEE_RAM_VA_SIZE) 151 #define TDDRAM_SIZE (CFG_TDDRAM_START + (CFG_TDDRAM_SIZE - \ 152 TDDRAM_BASE)) 153 #endif 154 155 #ifdef CFG_WITH_PAGER 156 #define TEE_RAM_START TDSRAM_BASE 157 #define TEE_RAM_PH_SIZE TDSRAM_SIZE 158 #define TA_RAM_START ROUNDUP(TDDRAM_BASE, CORE_MMU_PGDIR_SIZE) 159 #else 160 #define TEE_RAM_START TDDRAM_BASE 161 #define TEE_RAM_PH_SIZE TEE_RAM_VA_SIZE 162 #define TA_RAM_START ROUNDUP(TDDRAM_BASE + TEE_RAM_VA_SIZE, \ 163 SMALL_PAGE_SIZE) 164 #endif /*CFG_WITH_PAGER*/ 165 166 #define TA_RAM_SIZE (ROUNDDOWN(TDDRAM_BASE + (TDDRAM_SIZE - \ 167 TEE_SDP_TEST_MEM_SIZE), \ 168 SMALL_PAGE_SIZE) - TA_RAM_START) 169 #endif /*CFG_TDDRAM_START*/ 170 171 /* 172 * Secure data path test memory pool 173 * - If SDP is disabled, no SDP test memory needed. 174 * - If SDP is enabled, if CFG_TEE_SDP_MEM_BASE, SDP test pool is not needed. 175 * - If SDP is enabled and CFG_TEE_SDP_MEM_BASE not defined, a SDP test pool 176 * is defined at the end of the secure RAM. CFG_TEE_SDP_MEM_SIZE can set 177 * its size otherwise it defaults to 4MB. 178 */ 179 #if !defined(CFG_SECURE_DATA_PATH) || defined(CFG_TEE_SDP_MEM_BASE) 180 #define TEE_SDP_TEST_MEM_SIZE 0 181 #else 182 #ifdef CFG_TEE_SDP_MEM_SIZE 183 #define TEE_SDP_TEST_MEM_SIZE CFG_TEE_SDP_MEM_SIZE 184 #else 185 #define TEE_SDP_TEST_MEM_SIZE SIZE_4M 186 #endif 187 #define TEE_SDP_TEST_MEM_BASE (CFG_TDDRAM_START + (CFG_TDDRAM_SIZE - \ 188 TEE_SDP_TEST_MEM_SIZE)) 189 #endif 190 191 #endif /*__MM_GENERIC_RAM_LAYOUT_H*/ 192