1 /* SPDX-License-Identifier: BSD-2-Clause */ 2 /* 3 * Copyright 2021 NXP 4 * 5 * Brief Control Registers. 6 */ 7 #ifndef __CTRL_REGS_H__ 8 #define __CTRL_REGS_H__ 9 10 #include <util.h> 11 12 /* Master Configuration */ 13 #define MCFGR 0x0004 14 #define MCFGR_WDE BIT32(30) 15 16 /* Job Ring x MID */ 17 #define JRxDID_SIZE 0x8 18 #define JR0DID_MS 0x0010 19 #define JR0DID_LS 0x0014 20 #define JRxDID_MS(idx) (JR0DID_MS + ((idx) * (JRxDID_SIZE))) 21 #define JRxDID_LS(idx) (JR0DID_LS + ((idx) * (JRxDID_SIZE))) 22 23 #define JRxDID_MS_LDID BIT32(31) 24 #define JRxDID_MS_PRIM_ICID(val) SHIFT_U32(((val) & (0x3FF)), 19) 25 #define JRxDID_MS_LAMTD BIT32(17) 26 #define JRxDID_MS_AMTD BIT32(16) 27 #define JRxDID_MS_TZ_OWN BIT32(15) 28 #define JRxDID_MS_PRIM_TZ BIT32(4) 29 #define JRxDID_MS_PRIM_DID(val) SHIFT_U32(((val) & (0xF)), 0) 30 31 /* Security Configuration */ 32 #define SCFGR 0x000C 33 #define BS_SCFGR_MPCURVE 28 34 #define BM_SCFGR_MPCURVE SHIFT_U32(0xF, BS_SCFGR_MPCURVE) 35 #define BM_SCFGR_MPMRL BIT32(26) 36 37 /* Secure Memory Virtual Base Address */ 38 #define JRX_SMVBAR(idx) (0x0184 + (idx) * (8)) 39 40 /* Manufacturing Protection Message */ 41 #define MPMR 0x0380 42 #define MPMR_NB_REG 0x20 43 44 #endif /* __CTRL_REGS_H__ */ 45