1 /* SPDX-License-Identifier: BSD-2-Clause */ 2 /* 3 * Copyright (c) 2021, Microchip 4 */ 5 6 #ifndef __DRIVERS_ATMEL_SAIC_H 7 #define __DRIVERS_ATMEL_SAIC_H 8 9 #include <tee_api_types.h> 10 #include <util.h> 11 12 #define AT91_AIC_WPKEY 0x414943 13 14 #define AT91_AIC_SSR 0x0 15 #define AT91_AIC_SSR_ITSEL_MASK GENMASK_32(6, 0) 16 17 #define AT91_AIC_SMR 0x4 18 #define AT91_AIC_SMR_SRC_SHIFT 5 19 #define AT91_AIC_SMR_LEVEL SHIFT_U32(0, AT91_AIC_SMR_SRC_SHIFT) 20 #define AT91_AIC_SMR_NEG_EDGE SHIFT_U32(1, AT91_AIC_SMR_SRC_SHIFT) 21 #define AT91_AIC_SMR_HIGH_LEVEL SHIFT_U32(2, AT91_AIC_SMR_SRC_SHIFT) 22 #define AT91_AIC_SMR_POS_EDGE SHIFT_U32(3, AT91_AIC_SMR_SRC_SHIFT) 23 24 #define AT91_AIC_SVR 0x8 25 #define AT91_AIC_IVR 0x10 26 #define AT91_AIC_ISR 0x18 27 28 #define AT91_AIC_IPR0 0x20 29 #define AT91_AIC_IPR1 0x24 30 #define AT91_AIC_IPR2 0x28 31 #define AT91_AIC_IPR3 0x2c 32 #define AT91_AIC_IMR 0x30 33 #define AT91_AIC_CISR 0x34 34 #define AT91_AIC_EOICR 0x38 35 #define AT91_AIC_SPU 0x3c 36 #define AT91_AIC_IECR 0x40 37 #define AT91_AIC_IDCR 0x44 38 #define AT91_AIC_ICCR 0x48 39 #define AT91_AIC_ISCR 0x4c 40 #define AT91_AIC_DCR 0x6c 41 #define AT91_AIC_WPMR 0xe4 42 #define AT91_AIC_WPSR 0xe8 43 44 void atmel_saic_it_handle(void); 45 46 TEE_Result atmel_saic_setup(void); 47 48 #endif /*__DRIVERS_ATMEL_SAIC_H*/ 49