1 /* SPDX-License-Identifier: BSD-2-Clause */ 2 /* 3 * Copyright (c) 2014, STMicroelectronics International N.V. 4 */ 5 #ifndef TEE_MISC_H 6 #define TEE_MISC_H 7 8 #include <types_ext.h> 9 10 /* 11 * Macro to derive hex string buffer size from binary buffer size & the 12 * reverse 13 */ 14 #define TEE_B2HS_HSBUF_SIZE(x) ((x) * 2 + 1) 15 #define TEE_HS2B_BBUF_SIZE(x) ((x + 1) >> 1) 16 17 /* 18 * binary to hex string buffer 19 * Returns the number of data bytes written to the hex string 20 */ 21 uint32_t tee_b2hs(uint8_t *b, uint8_t *hs, uint32_t blen, uint32_t hslen); 22 23 /* 24 * hex string to binary buffer 25 * Returns the number of data bytes written to the bin buffer 26 */ 27 uint32_t tee_hs2b(uint8_t *hs, uint8_t *b, uint32_t hslen, uint32_t blen); 28 29 /* 30 * Is buffer 'b' inside/outside/overlapping area 'a'? 31 * 32 * core_is_buffer_inside() - return true if buffer is inside memory area 33 * core_is_buffer_outside() - return true if buffer is outside area 34 * core_is_buffer_intersect() - return true if buffer overlaps area 35 * 36 * Warning: core_is_buffer_inside(x,x,x,x)==false does NOT mean 37 * core_is_buffer_outside(x,x,x,x)==true. 38 * 39 * Arguments use by each of these routines: 40 * @b - buffer start address (handled has an unsigned offset) 41 * @bl - length (in bytes) of the target buffer 42 * @a - memory area start address (handled has an unsigned offset) 43 * @al - memory area length (in byte) 44 */ 45 bool core_is_buffer_inside(paddr_t b, paddr_size_t bl, 46 paddr_t a, paddr_size_t al); 47 bool core_is_buffer_outside(paddr_t b, paddr_size_t bl, 48 paddr_t a, paddr_size_t al); 49 bool core_is_buffer_intersect(paddr_t b, paddr_size_t bl, 50 paddr_t a, paddr_size_t al); 51 52 /** 53 * Allocate maximum cache line aligned memory buffer. 54 * 55 * Both size and base address of the memory buffer will be maximum cache line 56 * aligned to make it safe to perform cache maintenance operations over the 57 * allocated area. 58 * 59 * This is needed when non-cache coherent peripherals are used and memory area 60 * is shared between CPU and peripheral. 61 * 62 * Allocated memory is zeroed. 63 * 64 * Release memory with free(). 65 * 66 * @size Size in bytes to allocate 67 * @return NULL on failure or a pointer to allocated memory on success. 68 */ 69 void *alloc_cache_aligned(size_t size); 70 71 #endif /* TEE_MISC_H */ 72