1 /*
2  * Copyright 2020, Data61, CSIRO (ABN 41 687 119 230)
3  *
4  * SPDX-License-Identifier: GPL-2.0-only
5  */
6 
7 #pragma once
8 
9 #include <config.h>
10 
11 #ifdef CONFIG_HARDWARE_DEBUG_API
12 
13 #include <arch/machine/debug.h>
14 
15 #define DEBUG_REPLY_N_EXPECTED_REGISTERS        (1)
16 
17 /* Arch specific setup functions */
18 BOOT_CODE bool_t Arch_initHardwareBreakpoints(void);
19 void Arch_breakpointThreadDelete(tcb_t *thread);
20 
21 /** Sets up (and overwrites) the current configuration of a hardware breakpoint.
22  * @param bp_num Hardware breakpoint ID. Usually an integer from 0..N.
23  * @param vaddr Address that the breakpoint should be triggered by.
24  * @param type Type of operation that should trigger the breakpoint.
25  * @param size Operand size that should trigger the breakpoint.
26  * @param rwx Access type (read/write) that should trigger the breakpoint.
27  * @param uds If NULL, this function call will write directly to the hardware
28  *            registers.
29  *            If non-NULL, 'uds' is assumed to be a pointer to a debug register
30  *            context-saving memory block, and this function will write to that
31  *            context-saving memory block instead.
32  */
33 void setBreakpoint(tcb_t *t,
34                    uint16_t bp_num,
35                    word_t vaddr, word_t type, word_t size, word_t rw);
36 
37 /** Reads and returns the current configuration of a hardware breakpoint.
38  * @param bp_num Hardware breakpoint ID. Usually an integer from 0..N.
39  *
40  * @return Filled out getBreakpoint_t with the following fields:
41  * @param vaddr[out] Address that the breakpoint is set to trigger on.
42  * @param type[out] Type of operation that will trigger the breakpoint.
43  * @param size[out] operand size that will trigger the breakpoint.
44  * @param rw[out] Access type (read/write) that will trigger thr breakpoint.
45  * @param uds If NULL, this function call will read directly from the hardware
46  *            registers.
47  *            If non-NULL, 'uds' is assumed to be a pointer to a debug register
48  *            context-saving memory block, and this function will read from that
49  *            context-saving memory block instead.
50  * @param is_enabled Bool stating whether or not the breakpoint is enabled.
51  */
52 typedef struct getBreakpointRet {
53     word_t vaddr, type, size, rw;
54     bool_t is_enabled;
55 } getBreakpoint_t;
56 
57 getBreakpoint_t getBreakpoint(tcb_t *t, uint16_t bp_num);
58 
59 /** Clears a breakpoint's configuration and disables it.
60  * @param bp_num Hardware breakpoint ID. Usually an integer from 0..N.
61  * @param uds If NULL, this function call will write directly to the hardware
62  *            registers.
63  *            If non-NULL, 'uds' is assumed to be a pointer to a debug register
64  *            context-saving memory block, and this function will write to that
65  *            context-saving memory block instead.
66  */
67 void unsetBreakpoint(tcb_t *t, uint16_t bp_num);
68 
69 bool_t configureSingleStepping(tcb_t *t,
70                                uint16_t bp_num,
71                                word_t n_instr,
72                                bool_t is_reply);
73 
singleStepFaultCounterReady(tcb_t * t)74 static inline bool_t singleStepFaultCounterReady(tcb_t *t)
75 {
76     /* For a single-step exception, the user may have specified a certain
77      * number of instructions to skip over before the next stop-point, so
78      * we need to decrement the counter.
79      *
80      * We will check the counter's value when deciding whether or not to
81      * actually send a fault message to userspace.
82      */
83     if (t->tcbArch.tcbContext.breakpointState.n_instructions > 0) {
84         t->tcbArch.tcbContext.breakpointState.n_instructions--;
85     }
86     return t->tcbArch.tcbContext.breakpointState.n_instructions == 0;
87 }
88 
89 #endif /* CONFIG_HARDWARE_DEBUG_API */
90 
91