1 /* 2 * Copyright 2014, General Dynamics C4 Systems 3 * 4 * SPDX-License-Identifier: GPL-2.0-only 5 */ 6 7 #include <config.h> 8 #include <util.h> 9 #include <api/types.h> 10 #include <arch/types.h> 11 #include <arch/model/statedata.h> 12 #include <arch/object/structures.h> 13 14 /* ==== read/write kernel state not preserved across kernel entries ==== */ 15 16 /* Interrupt currently being handled */ 17 UP_STATE_DEFINE(interrupt_t, x86KScurInterrupt VISIBLE); 18 19 UP_STATE_DEFINE(interrupt_t, x86KSPendingInterrupt); 20 21 /* ==== proper read/write kernel state ==== */ 22 23 x86_arch_global_state_t x86KSGlobalState[CONFIG_MAX_NUM_NODES] ALIGN(L1_CACHE_LINE_SIZE) SKIM_BSS; 24 25 /* The top level ASID table */ 26 asid_pool_t *x86KSASIDTable[BIT(asidHighBits)]; 27 28 /* Current user value of the fs/gs base */ 29 UP_STATE_DEFINE(word_t, x86KSCurrentFSBase); 30 UP_STATE_DEFINE(word_t, x86KSCurrentGSBase); 31 32 UP_STATE_DEFINE(word_t, x86KSGPExceptReturnTo); 33 34 /* ==== read-only kernel state (only written during bootstrapping) ==== */ 35 36 /* Defines a translation of cpu ids from an index of our actual CPUs */ 37 SMP_STATE_DEFINE(cpu_id_mapping_t, cpu_mapping); 38 39 /* CPU Cache Line Size */ 40 uint32_t x86KScacheLineSizeBits; 41 42 /* A valid initial FPU state, copied to every new thread. */ 43 user_fpu_state_t x86KSnullFpuState ALIGN(MIN_FPU_ALIGNMENT); 44 45 /* Number of IOMMUs (DMA Remapping Hardware Units) */ 46 uint32_t x86KSnumDrhu; 47 48 #ifdef CONFIG_IOMMU 49 /* Intel VT-d Root Entry Table */ 50 vtd_rte_t *x86KSvtdRootTable; 51 uint32_t x86KSnumIOPTLevels; 52 uint32_t x86KSnumIODomainIDBits; 53 uint32_t x86KSFirstValidIODomain; 54 #endif 55 56 #ifdef CONFIG_VTX 57 UP_STATE_DEFINE(vcpu_t *, x86KSCurrentVCPU); 58 #endif 59 60 #ifdef CONFIG_PRINTING 61 uint16_t x86KSconsolePort; 62 #endif 63 #if defined(CONFIG_PRINTING) || defined(CONFIG_DEBUG_BUILD) 64 uint16_t x86KSdebugPort; 65 #endif 66 67 /* State data tracking what IRQ source is related to each 68 * CPU vector */ 69 x86_irq_state_t x86KSIRQState[maxIRQ + 1]; 70 71 word_t x86KSAllocatedIOPorts[NUM_IO_PORTS / CONFIG_WORD_SIZE]; 72 #ifdef CONFIG_KERNEL_MCS 73 uint32_t x86KStscMhz; 74 uint32_t x86KSapicRatio; 75 #endif 76